CN112379200B - Fault positioning and solving method - Google Patents
Fault positioning and solving method Download PDFInfo
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- CN112379200B CN112379200B CN202011247415.0A CN202011247415A CN112379200B CN 112379200 B CN112379200 B CN 112379200B CN 202011247415 A CN202011247415 A CN 202011247415A CN 112379200 B CN112379200 B CN 112379200B
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 238000004458 analytical method Methods 0.000 claims abstract description 27
- 238000012544 monitoring process Methods 0.000 claims abstract description 25
- 239000003990 capacitor Substances 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000003066 decision tree Methods 0.000 claims description 11
- 238000001514 detection method Methods 0.000 claims description 10
- 238000004088 simulation Methods 0.000 claims description 6
- 238000004590 computer program Methods 0.000 claims description 3
- 238000000605 extraction Methods 0.000 claims description 2
- 230000002159 abnormal effect Effects 0.000 description 21
- 238000012423 maintenance Methods 0.000 description 5
- 230000005856 abnormality Effects 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
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- 230000005540 biological transmission Effects 0.000 description 2
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- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
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- 238000007796 conventional method Methods 0.000 description 1
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- 238000009434 installation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
- F04D—NON-POSITIVE-DISPLACEMENT PUMPS
- F04D27/00—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids
- F04D27/001—Testing thereof; Determination or simulation of flow characteristics; Stall or surge detection, e.g. condition monitoring
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
- F04D—NON-POSITIVE-DISPLACEMENT PUMPS
- F04D27/00—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids
- F04D27/008—Stop safety or alarm devices, e.g. stop-and-go control; Disposition of check-valves
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/281—Specific types of tests or tests for a specific type of fault, e.g. thermal mapping, shorts testing
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- General Physics & Mathematics (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention provides a fault locating and solving method, a device and a storage medium, wherein the method comprises the following steps: acquiring a monitoring signal; according to the types of the fault factors, matching the fault factors in the monitoring signals with thresholds in at least one rule expert library; if the types of the fault factors in the monitoring signals cover the types of the thresholds in the ith rule expert database, acquiring fault conditions of the jth component from the ith rule expert database; and comparing the real-time information of the fault factor with the fault condition of the j-th component, and detecting and analyzing the fault of the j-th component. Therefore, the original big data set is divided into a plurality of small data sets, the original data structure is changed, and in actual use, the step of selecting the database is applied, so that the calculated amount of fault analysis is saved, and the auditing efficiency of faults is higher.
Description
Technical Field
The present invention relates to electrical performance testing methods, and more particularly, to a fault locating and solving method, device and storage medium.
Background
The UPS is also called as uninterrupted power supply, is a protective power supply device, can ensure continuous power supply when the supply of the commercial power is suspended, has the functions of voltage stabilization, frequency stabilization, filtering, electromagnetic and radio frequency disturbance resistance, voltage surge resistance and the like, and is widely applied to various links of information acquisition, transmission, analysis and storage.
However, due to the unreasonable design of the conventional system, there are many hidden dangers, which may be a problem of a certain component, a problem of current and voltage, and a problem of layout interference of a transmission line, and these problems bring about many difficulties to installation, operation, management and maintenance of the system, so that parts of the UPS are easily damaged.
To solve the above problems, a conventional method is to hire professional UPS maintenance personnel. However, there is a very small number of maintenance personnel with comprehensive and high levels of UPS, and the skill level of most maintenance personnel is not compromised.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: a method, apparatus and storage medium for fault detection and analysis are provided, by which the manpower requirements are reduced.
In order to solve the technical problems, the invention adopts the following technical scheme: acquiring a monitoring signal; wherein the monitoring signal comprises at least one fault factor; according to the types of the fault factors, matching the fault factors in the monitoring signals with thresholds in at least one rule expert library; if the types of the fault factors in the monitoring signals cover the types of the thresholds in the ith rule expert database, acquiring fault conditions of the jth component from the ith rule expert database; and comparing the real-time information of the fault factor with the fault condition of the j-th component, and detecting and analyzing the fault of the j-th component.
Acquiring parameter information and duration time when the temperature, the voltage and/or the current of the semiconductor device exceed corresponding threshold values;
and comparing the parameter information and the duration time which exceed the corresponding threshold values with preset fault conditions, and carrying out fault analysis.
Optionally, if the jth component is a capacitor, the step of comparing the real-time information of the fault factor with the fault condition of the jth component, and detecting and analyzing the fault of the jth component includes:
performing simulation operation by applying the real-time temperature, voltage and ripple of the capacitor to generate the temperature, voltage and ripple when faults occur;
and comparing corresponding fault judgment information by using the temperature, voltage and ripple when the fault occurs, and estimating the fault of the capacitor.
Optionally, if the jth component is a fan, the step of comparing the real-time information of the fault factor with the fault condition of the jth component, and detecting and analyzing the fault of the jth component includes:
and obtaining the rotating speed of the fan, comparing the rotating speed threshold value of the fan, and judging the fault of the fan.
Optionally, if the jth component is a control board, the step of comparing the real-time information of the fault factor with the fault condition of the jth component, and detecting and analyzing the fault of the jth component includes:
and acquiring signal pulse or level of the control board, comparing preset fault waveform information, and judging the fault of the control board.
Further, the method further comprises:
acquiring the temperature of a target object;
acquiring a curve of the temperature of the target object according to the temperature of the target object;
and comparing the temperature curve of the target object with a threshold value curve of the temperature of the target object, and analyzing the fault of the target object.
Further, according to the working condition of the target object, the matching degree of the temperature and the load rate of the target object is obtained;
and analyzing the fault of the target object by applying the matching degree of the temperature and the load rate of the target object and a corresponding threshold value.
Optionally, the method further comprises:
obtaining root nodes and leaf nodes of a fault analysis decision tree, and carrying out layer-by-layer refinement analysis on the fault categories;
and determining specific damaged devices and/or fault reasons according to the results of the layer-by-layer refinement analysis of the fault categories.
The application also provides a fault prediction system, comprising:
the monitoring module is used for acquiring a monitoring signal; wherein the monitoring signal comprises at least one fault factor;
the matching module is used for matching the fault factors in the monitoring signals with the threshold value in at least one rule expert database;
the extraction module is used for acquiring the fault condition of the j-th component from the i-th rule expert library if the type of the fault factor in the monitoring signal covers the type of the threshold value in the i-th rule expert library;
and the detection module is used for applying the fault condition of the j-th component and detecting and analyzing the fault of the j-th component.
The present application also provides a storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described method.
The invention has the following effects: and splitting the complete fault library to form a plurality of fault libraries, wherein each fault library only aims at one or a plurality of faults. In practical use, the type information of the fault factor is applied to select an expert database, and then the corresponding fault condition is selected from the specific expert database. Therefore, the original big data set is divided into a plurality of small data sets, the original data structure is changed, and in actual use, the step of selecting the database is applied, so that the calculated amount of fault analysis is saved, and the auditing efficiency of faults is higher.
Drawings
The following details the specific construction of the present invention with reference to the accompanying drawings
FIG. 1 is a flow chart of a fault locating and solving method in a first embodiment of the present invention;
FIG. 2 is a decision tree for the "output exception" status word in a second embodiment of the present invention;
fig. 3 is a block diagram of a fault detection analysis system in a first embodiment of the present invention.
Detailed Description
In order to describe the technical content, the constructional features, the achieved objects and effects of the present invention in detail, the following description is made in connection with the embodiments and the accompanying drawings.
Referring to fig. 1, fig. 1 is a diagram illustrating a fault locating and solving method according to a first embodiment of the present invention; the invention provides a fault positioning and solving method of UPS, which is used for carrying out fault detection analysis on a target object, wherein the target object is provided with a j-th component, and comprises the following steps:
step S100, obtaining a monitoring signal; wherein the monitoring signal comprises at least one fault factor;
step 200, matching the fault factors in the monitoring signals with thresholds in at least one rule expert database according to the types of the fault factors;
step S300, if the types of the fault factors in the monitoring signals cover the types of the threshold values in the ith rule expert database, acquiring fault conditions of the jth component from the ith rule expert database;
step S400, comparing the real-time information of the fault factor with the fault condition of the j-th component, and detecting and analyzing the fault of the j-th component;
wherein i and j are positive integers
In the invention, the complete fault library is split to form a plurality of fault libraries, and each fault library only aims at one or a plurality of faults. In practical use, the type information of the fault factor is applied to select an expert database, and then the corresponding fault condition is selected from the specific expert database. Therefore, the original big data set is divided into a plurality of small data sets, the original data structure is changed, and in actual use, the step of selecting the database is applied, so that the calculated amount of fault analysis is saved, and the auditing efficiency of faults is higher.
Optionally, if the jth component is a semiconductor device, step S400 compares the real-time information of the fault factor with the fault condition of the jth component, and the step of detecting and analyzing the fault of the jth component includes:
step S411, acquiring parameter information and duration time when the temperature, voltage and/or current of the semiconductor device exceeds a corresponding threshold value;
and step S412, comparing the parameter information and the duration time exceeding the corresponding threshold values with preset fault conditions to perform fault analysis.
The semiconductor device comprises common semiconductor devices, IGBT, SCR and other parts.
It should be understood that, starting with the analysis of the temperature and the current, the analysis is performed with the parameter information when the threshold value is exceeded and the duration time when the threshold value is exceeded, and after comparing the two dimensions with the corresponding threshold value information, the following faults of the semiconductor can be analyzed: overvoltage breakdown, overcurrent damage, thermal damage.
Optionally, if the jth component is a capacitor, step S400 compares the real-time information of the fault factor with the fault condition of the jth component, and the step of detecting and analyzing the fault of the jth component includes:
step S421, performing simulation operation by applying the real-time temperature, voltage and ripple of the capacitor to generate temperature, voltage and ripple when a fault occurs;
and step 422, comparing the temperature, voltage and ripple when the fault occurs with corresponding fault judgment information, and estimating the fault of the capacitor.
In this embodiment, a simulation operation is performed to obtain the temperature, voltage and ripple when the fault occurs, so as to estimate the fault of the capacitor. In this embodiment, the faults of the capacitor can be analyzed, including over-voltage damage, over-current, thermal damage, and capacitance decay. Through simulation operation, the damage caused by overhigh voltage, the damage caused by overlarge current or the thermal damage can be analyzed, the capacitance attenuation rule can be obtained, and the service life of the capacitor is predicted.
It can be understood that under different working conditions, the temperature, voltage and ripple of the capacitor have different combination modes, so that the fault cause of the capacitor can be obtained more clearly by applying simulation operation of different working environments.
Optionally, if the jth component is a fan, step S400 compares the real-time information of the fault factor with the fault condition of the jth component, and the step of detecting and analyzing the fault of the jth component includes:
step S431, obtaining the rotating speed of the fan, comparing the rotating speed threshold value of the fan, and judging the fault of the fan.
The failure of the fan includes excessive voltage and other abnormal rotation speed. When the rotation speed of the fan exceeds the rotation speed threshold value, the cause of the fault can be judged. It will be appreciated that the same fan has a plurality of different rotational speed thresholds, and that within the different rotational speed thresholds, it may be determined whether the fan is experiencing a voltage anomaly or another rotational speed anomaly.
Optionally, if the jth component is a control board, step S400 compares the real-time information of the fault factor with the fault condition of the jth component, and the step of detecting and analyzing the fault of the jth component includes:
step S441, signal pulse or level of the control board is obtained, preset fault waveform information is compared, and fault of the control board is judged.
It can be understood that the signal pulse is a regular signal and the level is an irregular signal, and the two kinds of information are compared with the preset waveform information, so that the fault of the control board can be more clearly analyzed.
The method only aims at processing a certain part, and besides the processing of the certain part, the method also comprises fault analysis on the whole target object:
step S451, acquiring the temperature and the working condition temperature of a target object;
step 452, acquiring a curve of the temperature of the target object according to the temperature of the target object;
step S453, a curve of the temperature of the target object and a threshold curve of the temperature of the target object are applied, and a fault of the target object is analyzed.
It will be appreciated that in actual diagnosis, the target object should also be analyzed when processing for a certain component. Because the target object has different temperature change curves under different working condition temperatures, the temperature curve of the target object and the threshold value curve of the temperature of the target object are compared, so that faults of all components of the target object can be better analyzed.
Further, the method further comprises:
step S461, according to the working condition of the target object, acquiring the matching degree of the temperature and the load rate of the target object;
step S462, applying the matching degree of the temperature and the load factor of the target object and the corresponding threshold value to analyze the fault of the target object.
It should be appreciated that the degree of matching between the temperature of the target object and the load factor may be obtained according to some historical data, because the degree of matching between the temperature of the target object and the load factor is different under different working conditions. Therefore, when the temperature of the target object is too high relative to the load factor, the temperature of the target object is too low relative to the load factor, and the temperature of the target object can be used as a basis for judging that different faults occur in the target object.
By adopting the method, the target UPS can be taken as a target object, the fault condition of the target UPS is analyzed, and the fault abnormal condition of the j-th component of the target UPS comprises the following steps: a first semiconductor abnormal condition, at least one of a capacitance abnormal condition, a fan abnormal condition, a control board abnormal condition and a complete machine temperature abnormal condition;
wherein the first semiconductor abnormal condition comprises a first semiconductor device temperature abnormality and/or a first semiconductor device current abnormality;
wherein the abnormal conditions of the capacitor comprise abnormal temperature of the capacitor, abnormal voltage of the capacitor and/or abnormal ripple;
the abnormal fan conditions comprise abnormal rotating speed;
the abnormal conditions of the control panel comprise signal pulse and/or level abnormality;
the abnormal conditions of the temperature of the whole machine comprise abnormal temperature and/or load rate in the machine.
It is to be appreciated that the control board can also have a self-checking function, can monitor the state in real time, and can realize fault early warning and positioning.
The abnormal temperature of the whole machine comprises overhigh temperature in the machine and unmatched temperature and load rate. By detecting the temperature and the load rate in the machine. According to the load rate and the running condition of the built-in temperature evaluation equipment, in the embodiment, the time and the reason of the fault can be controlled by adopting a temperature curve so as to perform fixed-point analysis on specific components.
In the above solution, the condition of fault detection is described, and in practical use, a fault detection method should be used, based on which the method further includes:
step S471, obtaining root nodes and leaf nodes of a fault analysis decision tree, and carrying out layer-by-layer refinement analysis on the fault categories;
step S481, determining specific damaged devices and/or fault reasons according to the result of the layer-by-layer refinement analysis of the fault categories.
The decision tree is built from bottom to top by depending on a plurality of fault categories, and in one embodiment, two nodes of rectification over-temperature protection and balance bridge current limiting form a lower node with abnormal rectifier, and the three nodes form a small decision tree; in another embodiment, the two nodes of the abnormal rectifier and the overload protection of the inverter form a lower node of the abnormal inverter. And so on, a decision tree as shown in figure 2 can be constructed. It should be understood that the decision tree in this embodiment is only a simple decision tree.
In this embodiment, starting from the output abnormality, the fault decision tree is applied to analyze the UPS fault category in a layer-by-layer refinement manner, so that the UPS fault category is expanded from a larger category to a finer category. In this embodiment, the specific degree of refinement may be determined according to the degree to which the UPS fault category is refined.
In one embodiment, after the target UPS generates an output exception, if the UPS fault category is refined to a low degree, we have two lower nodes associated with "output loop exception" and "output overload or output low voltage". It will be appreciated that the amount of computation required at this time is small, and the problems and the cause of the primary failure caused by the target UPS can be roughly estimated, thus reducing the workload of maintenance personnel. In another embodiment, the UPS fault categories are refined to a greater degree, so that specific damaged devices and causes of faults can be determined more carefully.
It can be understood that the decision tree can be displayed in a state word mode, so that a user can conveniently use the product, and the product can be conveniently sold by the user.
In this embodiment, for a relatively complete understanding of the fault category of the UPS, reference may be made to table 1:
TABLE 1
Referring to fig. 3, fig. 3 is a block diagram of a failure detection and analysis system of a UPS according to a first embodiment of the present invention. The invention also provides a fault detection and analysis system of the UPS, which comprises:
it should be understood that the above modules are only roughly divided modules, and each function of the modules can be formed by combining various units. Essentially, the device is a virtual execution body as the method for carrying the method.
The invention also provides a storage medium comprising a computer program which, when loaded and executed by a processor, implements the steps of the method described above.
The processor may be a central analysis unit, but may also be other general purpose processors, digital signal processors, application specific integrated circuits, field programmable gate arrays or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present invention.
Claims (10)
1. A fault locating and solving method for performing fault detection analysis on a target object, the target object being mounted with a j-th component, the method comprising the steps of:
acquiring a monitoring signal; wherein the monitoring signal comprises at least one fault factor;
matching the types of fault factors in the monitoring signals with the types of thresholds in at least one rule expert database;
if the types of the fault factors in the monitoring signals cover the types of the thresholds in the ith rule expert database, acquiring fault conditions of the jth component from the ith rule expert database;
comparing the real-time information of the fault factor with the fault condition of the j-th component, and detecting and analyzing the fault of the j-th component;
wherein i and j are positive integers.
2. The fault locating and resolving method of claim 1 wherein if the j-th component is a semiconductor device, the step of comparing the real-time information of the fault factor with the fault condition of the j-th component, detecting and analyzing the fault of the j-th component comprises:
acquiring parameter information and duration time when the temperature, the voltage and/or the current of the semiconductor device exceed corresponding threshold values;
and comparing the parameter information and the duration time which exceed the corresponding threshold values with preset fault conditions, and carrying out fault analysis.
3. The fault locating and resolving method of claim 1 wherein if the j-th component is a capacitor, the step of comparing the real-time information of the fault factor with fault conditions of the j-th component, detecting and analyzing the fault of the j-th component comprises:
performing simulation operation by applying the real-time temperature, voltage and ripple of the capacitor to generate the temperature, voltage and ripple when faults occur;
and comparing corresponding fault judgment information by using the temperature, voltage and ripple when the fault occurs, and estimating the fault of the capacitor.
4. The fault locating and resolving method of claim 1 wherein if the j-th component is a fan, the step of comparing the real-time information of the fault factor with fault conditions of the j-th component, detecting and analyzing the fault of the j-th component comprises:
and obtaining the rotating speed of the fan, comparing the rotating speed threshold value of the fan, and judging the fault of the fan.
5. The fault locating and resolving method of claim 1 wherein if the j-th component is a control board, the step of comparing the real-time information of the fault factor with fault conditions of the j-th component, detecting and analyzing the fault of the j-th component comprises:
and acquiring signal pulse or level of the control board, comparing preset fault waveform information, and judging the fault of the control board.
6. The fault locating and solving method according to any one of claims 1-5, further comprising:
acquiring the temperature of a target object;
acquiring a curve of the temperature of the target object according to the temperature of the target object;
and comparing the temperature curve of the target object with a threshold value curve of the temperature of the target object, and analyzing the fault of the target object.
7. The fault locating and resolving method of claim 6, wherein the method further comprises:
according to the working condition of the target object, acquiring the matching degree of the temperature and the load rate of the target object;
and analyzing the fault of the target object by applying the matching degree of the temperature and the load rate of the target object and a corresponding threshold value.
8. The fault locating and resolving method of claim 1, wherein the method further comprises:
obtaining root nodes and leaf nodes of a fault analysis decision tree, and carrying out layer-by-layer refinement analysis on the fault categories;
and determining specific damaged devices and/or fault reasons according to the results of the layer-by-layer refinement analysis of the fault categories.
9. A fault prediction system, comprising:
the monitoring module is used for acquiring a monitoring signal; wherein the monitoring signal comprises at least one fault factor;
the matching module is used for matching the types of the fault factors in the monitoring signals with the types of the thresholds in at least one rule expert library;
the extraction module is used for acquiring the fault condition of the j-th component from the i-th rule expert library if the type of the fault factor in the monitoring signal covers the type of the threshold value in the i-th rule expert library;
and the detection module is used for applying the fault condition of the j-th component and detecting and analyzing the fault of the j-th component.
10. A storage medium having stored thereon a computer program, which, when executed by a processor, implements the steps of the method according to one of claims 1-8.
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