CN112366190B - High-voltage semiconductor device terminal with low sensitivity to surface charge - Google Patents
High-voltage semiconductor device terminal with low sensitivity to surface charge Download PDFInfo
- Publication number
- CN112366190B CN112366190B CN202011247049.9A CN202011247049A CN112366190B CN 112366190 B CN112366190 B CN 112366190B CN 202011247049 A CN202011247049 A CN 202011247049A CN 112366190 B CN112366190 B CN 112366190B
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- wall
- semiconductor device
- fixedly connected
- hole
- side inner
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
Abstract
The invention discloses a high-voltage semiconductor device terminal with low sensitivity to surface charge, which comprises a semiconductor device body, a shell, a through groove, a tooth trace, a metal sheet, a radiating fin, a first accommodating groove, a limiting block, a spring, a clamping block, a third accommodating groove, a second binding post, a clamping groove, pins, a spring piece, a third through hole, a screw, a threaded hole and a cushion block.
Description
Technical Field
The invention relates to the technical field of semiconductor device terminals, in particular to a high-voltage semiconductor device terminal with low sensitivity to surface charge.
Background
The semiconductor device is an electronic device with conductivity between good conductors and insulators, utilizes special electrical characteristics of semiconductor materials to complete specific functions, can be used for generating, controlling, receiving, converting, amplifying signals and converting energy, and has the advantages that the service life of the semiconductor device terminal can be reduced due to the fact that the existing semiconductor device terminal lacks a heat dissipation structure, pins of the existing semiconductor device terminal are fixed with a body, once the pins are broken, the whole semiconductor device terminal can become waste, great waste is caused, the existing semiconductor device terminal lacks an electrostatic shielding device, and external electric field interference and electrostatic breakdown are easy to cause.
Disclosure of Invention
The present invention aims to provide a terminal of a high-voltage semiconductor device with low sensitivity to surface charges, so as to solve the problems in the prior art.
In order to solve the technical problems, the invention provides the following technical scheme: the utility model provides a low sensitive high-pressure semiconductor device terminal of surface charge, including semiconductor device body, shell, logical groove, insection, sheetmetal, fin, first through-hole, first dog, slider, spout, connecting axle, base, the second through-hole, first holding tank, the second dog, the second holding tank, first terminal, the spacing groove, the stopper, a spring, the fixture block, the third holding tank, the second terminal, the draw-in groove, the pin, the shell fragment, the third through-hole, the screw hole, the cushion, N type silicon, P type silicon and silica protective layer, fixedly connected with connecting axle on the bottom outer wall of semiconductor device body, cup jointed the base on one side outer wall of connecting axle, set up the second through-hole on the top outer wall of base, and the connecting axle cup joints on one side inner wall of second through-hole, set up first holding tank on one side inner wall of second through-hole, set up the third through-hole on the bottom outer wall of second dog, on one side inner wall of third through-hole, the connecting axle on the outer wall of first holding tank, the top end of second through-hole has been seted up on the first side inner wall, the connecting axle has the first side of the connecting axle on the first side of second through-hole has the first through-hole, the screw hole has been seted up on the outer wall of the first side inner wall, the top end of the first side of the first through-hole has been connected on the first side of the first through-hole on the first side inner wall, the first side inner wall has the first side of the first side wall, the first end has been fixed groove on the first end has set up on the one end on the first side end on the first end, the second binding post is fixedly connected to one side inner wall of the third containing groove, the clamping groove is formed in the outer wall of the bottom end of the second binding post, and the clamping block is clamped and connected to one side inner wall of the clamping groove.
According to the technical scheme, the shell is sleeved on the outer wall of one side of the semiconductor device body, the sliding blocks are symmetrically fixed on the inner walls of two sides of the shell, the sliding grooves are symmetrically formed in the outer walls of two sides of the semiconductor device body, and the sliding blocks are slidably connected on the inner wall of one side of the sliding grooves.
According to the technical scheme, the external walls of the two sides of the shell are symmetrically provided with insections.
According to the technical scheme, the metal sheet is fixedly connected to the outer wall of the top end of the semiconductor device body, the radiating fin is fixedly connected to the outer wall of the top end of the metal sheet, the through groove is formed in the outer wall of the top end of the shell, the radiating fin is sleeved on the inner wall of one side of the through groove, and the first stop block is fixedly connected to the outer wall of the top end of the radiating fin.
According to the technical scheme, the first through hole is formed in the outer wall of one side of the radiating fin.
According to the technical scheme, fixedly connected with pin on the bottom outer wall of first terminal, cup jointed the cushion on the outer wall of one side of pin, and cushion fixed connection is on the bottom outer wall of base.
According to the technical scheme, the elastic pieces are fixedly distributed on the outer wall of the base, and the elastic pieces are attached to and connected to the inner wall of the shell.
According to the technical scheme, the N-type silicon is fixedly connected to one side inner wall of the semiconductor device body, the second binding post is fixedly connected to one side outer wall of the N-type silicon, the P-type silicon is fixedly connected to one side inner wall of the N-type silicon, the silicon dioxide protection layer is fixedly connected to one side outer wall of the P-type silicon, the silicon dioxide protection layer is fixedly connected to one side outer wall of the N-type silicon, the contact is embedded and connected to one side inner wall of the silicon dioxide protection layer, and the contact is fixedly connected to one side outer wall of the second binding post.
Compared with the prior art, the invention has the following beneficial effects: compared with the existing high-voltage semiconductor device terminal, the invention is provided with the radiating fin, can radiate heat of the semiconductor device terminal, prevents overheat damage, is provided with the replaceable base, can be replaced after the pins are broken, is environment-friendly and economical, can also rotate, can separate the semiconductor device terminal from the pins for detection, is convenient for circuit fault investigation, and has the electrostatic shielding function, can shield an external electric field and an electric field generated by the semiconductor device terminal, reduces electric field interference among elements and simultaneously prevents electrostatic breakdown.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
FIG. 1 is a schematic diagram of the overall side view of the present invention in cross-section;
FIG. 2 is an enlarged view of the area A structure in FIG. 1;
FIG. 3 is a schematic view of the overall front cut-away structure of the present invention;
FIG. 4 is an enlarged view of the structure of area B in FIG. 3;
FIG. 5 is an enlarged view of the structure of region C in FIG. 3;
FIG. 6 is a schematic perspective view of a heat sink according to the present invention;
FIG. 7 is a schematic perspective view of the housing of the present invention;
fig. 8 is a schematic view showing a three-dimensional structure of a semiconductor device body of the present invention;
in the figure: 1. a semiconductor device body; 2. a housing; 3. a through groove; 4. tooth patterns; 5. a metal sheet; 6. a heat sink; 7. a first through hole; 8. a first stopper; 9. a slide block; 10. a chute; 11. a connecting shaft; 12. a base; 13. a second through hole; 14. a first accommodation groove; 15. a second stopper; 16. a second accommodation groove; 17. a first terminal; 18. a limit groove; 19. a limiting block; 20. a spring; 21. a clamping block; 22. a third accommodation groove; 23. a second binding post; 24. a clamping groove; 25. pins; 26. a spring plate; 27. a third through hole; 28. a screw; 29. a threaded hole; 30. a cushion block; 31. n-type silicon; 32. p-type silicon; 33. and a silicon dioxide protective layer.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-8, the present invention provides a technical solution: the high-voltage semiconductor device terminal with low sensitivity to surface charge comprises a semiconductor device body 1, a shell 2, a through groove 3, a tooth pattern 4, a metal sheet 5, a radiating fin 6, a first through hole 7, a first stop block 8, a sliding block 9, a sliding groove 10, a connecting shaft 11, a base 12, a second through hole 13, a first accommodating groove 14, a second stop block 15, a second accommodating groove 16, a first binding post 17, a limit groove 18, a limit block 19, a spring 20, a clamping block 21, a third accommodating groove 22, a second binding post 23, a clamping groove 24, a pin 25, a spring piece 26, a third through hole 27, a screw 28, a threaded hole 29, a cushion block 30, N-type silicon 31, P-type silicon 32 and a silicon dioxide protective layer 33, wherein the connecting shaft 11 is fixedly connected to the outer wall of the bottom end of the semiconductor device body 1, the base 12 is sleeved on one side outer wall of the connecting shaft 11, the second through hole 13 is arranged on the outer wall of the top end of the base 12, the connecting shaft 11 is sleeved on one side inner wall of the second through hole 13, a first accommodating groove 14 is formed on one side inner wall of the second through hole 13, a second stop block 15 is sleeved on one side inner wall of the first accommodating groove 14, a third through hole 27 is formed on the bottom end outer wall of the second stop block 15, a screw 28 is sleeved on one side inner wall of the third through hole 27, a threaded hole 29 is formed on the bottom end outer wall of the connecting shaft 11, the screw 28 is connected on one side inner wall of the threaded hole 29 in a threaded manner, a second accommodating groove 16 is symmetrically formed on the top end outer wall of the base 12, a first binding post 17 is fixedly connected on one side inner wall of the second accommodating groove 16, a limit groove 18 is formed on the top end outer wall of the first binding post 17, a limit block 19 is slidably connected on one side inner wall of the limit groove 18, a spring 20 is fixedly connected on the bottom end outer wall of the limit groove 19, one end of the spring 20 is fixedly connected on the bottom end inner wall of the limit groove 18, the outer wall of the top end of the limiting block 19 is fixedly connected with a clamping block 21, the outer wall of the bottom end of the semiconductor device body 1 is symmetrically provided with a third accommodating groove 22, one side inner wall of the third accommodating groove 22 is fixedly connected with a second binding post 23, the outer wall of the bottom end of the second binding post 23 is provided with a clamping groove 24, and the clamping block 21 is connected to one side inner wall of the clamping groove 24 in a clamping manner; the outer wall of one side of the semiconductor device body 1 is sleeved with the shell 2, sliding blocks 9 are symmetrically fixed on the inner walls of two sides of the shell 2, sliding grooves 10 are symmetrically formed on the outer walls of two sides of the semiconductor device body 1, the sliding blocks 9 are slidably connected to the inner wall of one side of the sliding grooves 10, the shell 2 is used for constructing a shielding body, and the sliding grooves 10 and the sliding blocks 9 can enable the shell 2 to flexibly slide; the outer walls of the two sides of the shell 2 are symmetrically provided with insections 4 for skid resistance; the semiconductor device comprises a semiconductor device body 1, wherein a metal sheet 5 is fixedly connected to the outer wall of the top end of the semiconductor device body 1, a radiating fin 6 is fixedly connected to the outer wall of the top end of the metal sheet 5, a through groove 3 is formed in the outer wall of the top end of a shell 2, the radiating fin 6 is sleeved on the inner wall of one side of the through groove 3, a first stop block 8 is fixedly connected to the outer wall of the top end of the radiating fin 6, the metal sheet 5 is used for transferring heat and constructing a shielding body, the radiating fin 6 is used for radiating heat, and the first stop block 8 is used for limiting the shell 2; the first through holes 7 are formed in the outer wall of one side of the radiating fin 6, so that the contact area between the radiating fin 6 and air is increased, and the radiating effect is improved; the outer wall of the bottom end of the first binding post 17 is fixedly connected with a pin 25, a cushion block 30 is sleeved on the outer wall of one side of the pin 25, the cushion block 30 is fixedly connected to the outer wall of the bottom end of the base 12, the pin 25 is used for welding and mounting, and the cushion block 30 is used for heightening the base 12 to prevent heat transfer; the elastic sheet 26 is fixedly distributed on the outer wall of the base 12, the elastic sheet 26 is attached to and connected with the inner wall of the shell 2, and the insulating base 12, the conductive elastic sheet 26, the conductive shell 2 and the metal sheet 5 form a closed shell to shield an external electric field; an N-type silicon 31 is fixedly connected to one side inner wall of the semiconductor device body 1, a second binding post 23 is fixedly connected to one side outer wall of the N-type silicon 31, a P-type silicon 32 is fixedly connected to one side inner wall of the N-type silicon 31, a silicon dioxide protection layer 33 is fixedly connected to one side outer wall of the P-type silicon 32, the silicon dioxide protection layer 33 is fixedly connected to one side outer wall of the N-type silicon 31, a contact is inlaid and connected to one side inner wall of the silicon dioxide protection layer 33, the contact is fixedly connected to one side outer wall of the second binding post 23, and the N-type silicon 31, the P-type silicon 32 and the silicon dioxide protection layer 33 jointly form an internal structure of the semiconductor device body 1;
when the invention is used, the pins 25 can be welded or plugged on the circuit board, if the pins 25 are damaged and broken, and the semiconductor device body 1 is still intact, the pins 25 can be removed from the circuit board, then the screws 28 are unscrewed, the semiconductor device body 1 is removed, a new base 12 is replaced, the base 12 is sleeved on the connecting shaft 11 through the second through holes 13, then the second stop block 15 is fixed on the connecting shaft 11 through the screws 28, the invention can be used continuously, when the circuit at the semiconductor device body 1 is faulty, the index finger can be used for pressing the first stop block 8, the thumb and the middle finger can be used for holding the toothed pattern 4 on the shell 2, then the shell 2 is slid upwards along the radiating fin 6 in the through groove 3, at this time, the slide block 9 slides in the slide groove 10, the shell 2 is separated from the base 12, at this time, the shell 2 can be rotated, the clamping block 21 is separated from the clamping groove 24, the first binding post 17 is separated from the second binding post 23, at this time, the detection probe can be abutted against the clamping block 21, whether the detection pin 25 is in a cold joint or not, the detection probe is abutted against the clamping groove 24, whether the semiconductor device body 1 is damaged or not is detected, wherein the base 12, the shell 2, the metal sheet 5 and the elastic sheet 26 can form a shielding shell for preventing electrostatic breakdown and external electric field interference, the radiating fin 6 provided with the first through hole 7 can accelerate heat dissipation of the semiconductor device body 1 and prevent overheat damage, the second containing groove 16 is used for installing the first binding post 17, the third containing groove 22 is used for installing the second binding post 23, the first containing groove 14 is used for containing the second stop block 15, the limiting block 19 in the limiting groove 18 is used for limiting the clamping block 21, the spring 20 can enable the clamping block 21 to be tightly attached to the clamping groove 24, the third through hole 27 and the threaded hole 29 are used for installing the screw 28, and the cushion block 30 is used for heightening the base 12.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: the above is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that the present invention is described in detail with reference to the foregoing embodiments, and modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. The utility model provides a low sensitive high-voltage semiconductor device terminal of surface charge, including semiconductor device body (1), shell (2), logical groove (3), insection (4), sheetmetal (5), fin (6), first through-hole (7), first dog (8), slider (9), spout (10), connecting axle (11), base (12), second through-hole (13), first holding tank (14), second dog (15), second holding tank (16), first terminal (17), spacing groove (18), stopper (19), spring (20), fixture block (21), third holding tank (22), second terminal (23), draw-in groove (24), pin (25), shell fragment (26), third through-hole (27), screw (28), screw hole (29), cushion (30), N type silicon (31), P type silicon (32) and silica protective layer (33), its characterized in that: the utility model discloses a semiconductor device, including semiconductor device body (1), connecting axle (11) have been fixedly connected with on the bottom outer wall of semiconductor device body (1), cup joint base (12) on the outer wall of one side of connecting axle (11), set up second through-hole (13) on the top outer wall of base (12), and connecting axle (11) cup joint on one side inner wall of second through-hole (13), first holding tank (14) have been seted up on one side inner wall of second through-hole (13), cup joint second dog (15) on one side inner wall of first holding tank (14), third through-hole (27) have been seted up on the bottom outer wall of second dog (15), screw (28) have been cup jointed on one side inner wall of third through-hole (27), threaded hole (29) have been seted up on the bottom outer wall of connecting axle (11), and screw (28) threaded connection is on one side inner wall of threaded hole (29), second holding tank (16) have been seted up on the outer wall of top of base (12), fixedly connected with first holding tank (17) on one side inner wall of second holding tank (16), limit block (18) have been seted up on one side inner wall of limit block (19), and one end fixed connection of spring (20) is on the bottom inner wall of spacing groove (18), fixedly connected with fixture block (21) on the top outer wall of stopper (19), third holding tank (22) have been seted up to symmetry on the bottom outer wall of semiconductor device body (1), fixedly connected with second terminal (23) on the inner wall of one side of third holding tank (22), draw-in groove (24) have been seted up on the bottom outer wall of second terminal (23), and fixture block (21) block connection is on the inner wall of one side of draw-in groove (24).
2. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: the semiconductor device comprises a semiconductor device body (1), wherein a shell (2) is sleeved on one side outer wall of the semiconductor device body (1), sliding blocks (9) are symmetrically fixed on two side inner walls of the shell (2), sliding grooves (10) are symmetrically formed in two side outer walls of the semiconductor device body (1), and the sliding blocks (9) are slidably connected onto one side inner wall of the sliding grooves (10).
3. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: the outer walls of the two sides of the shell (2) are symmetrically provided with insections (4).
4. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: fixedly connected with sheetmetal (5) on the top outer wall of semiconductor device body (1), fixedly connected with fin (6) on the top outer wall of sheetmetal (5), logical groove (3) have been seted up on the top outer wall of shell (2), and fin (6) cup joint on one side inner wall of logical groove (3), fixedly connected with first dog (8) on the top outer wall of fin (6).
5. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: a first through hole (7) is formed in the outer wall of one side of the radiating fin (6).
6. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: the pin (25) is fixedly connected to the outer wall of the bottom end of the first binding post (17), a cushion block (30) is sleeved on the outer wall of one side of the pin (25), and the cushion block (30) is fixedly connected to the outer wall of the bottom end of the base (12).
7. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: the elastic pieces (26) are fixedly distributed on the outer wall of the base (12), and the elastic pieces (26) are attached to and connected with the inner wall of the shell (2).
8. A high voltage semiconductor device termination having low sensitivity to surface charge as recited in claim 1, wherein: the semiconductor device comprises a semiconductor device body (1), wherein N-type silicon (31) is fixedly connected to one side inner wall of the semiconductor device body (1), a second binding post (23) is fixedly connected to one side outer wall of the N-type silicon (31), P-type silicon (32) is fixedly connected to one side inner wall of the N-type silicon (31), a silicon dioxide protection layer (33) is fixedly connected to one side outer wall of the P-type silicon (32), the silicon dioxide protection layer (33) is fixedly connected to one side outer wall of the N-type silicon (31), a contact is inlaid and connected to one side inner wall of the silicon dioxide protection layer (33), and the contact is fixedly connected to one side outer wall of the second binding post (23).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011247049.9A CN112366190B (en) | 2020-11-10 | 2020-11-10 | High-voltage semiconductor device terminal with low sensitivity to surface charge |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011247049.9A CN112366190B (en) | 2020-11-10 | 2020-11-10 | High-voltage semiconductor device terminal with low sensitivity to surface charge |
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| Publication Number | Publication Date |
|---|---|
| CN112366190A CN112366190A (en) | 2021-02-12 |
| CN112366190B true CN112366190B (en) | 2023-10-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202011247049.9A Active CN112366190B (en) | 2020-11-10 | 2020-11-10 | High-voltage semiconductor device terminal with low sensitivity to surface charge |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09139448A (en) * | 1995-11-13 | 1997-05-27 | Fujitsu Denso Ltd | Semiconductor fitting, its mounting method and semiconductor device using it |
| CN109041422A (en) * | 2018-09-10 | 2018-12-18 | 广州高雅电器有限公司 | A kind of Spliced type LED circuit board |
| CN208420782U (en) * | 2018-06-13 | 2019-01-22 | 伟华科技(天津)有限公司 | A kind of semiconductor-type gas sensor |
| CN211014574U (en) * | 2019-10-16 | 2020-07-14 | 安徽扬能新能源科技有限公司 | Car as a house battery charge time detects accounting device |
-
2020
- 2020-11-10 CN CN202011247049.9A patent/CN112366190B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09139448A (en) * | 1995-11-13 | 1997-05-27 | Fujitsu Denso Ltd | Semiconductor fitting, its mounting method and semiconductor device using it |
| CN208420782U (en) * | 2018-06-13 | 2019-01-22 | 伟华科技(天津)有限公司 | A kind of semiconductor-type gas sensor |
| CN109041422A (en) * | 2018-09-10 | 2018-12-18 | 广州高雅电器有限公司 | A kind of Spliced type LED circuit board |
| CN211014574U (en) * | 2019-10-16 | 2020-07-14 | 安徽扬能新能源科技有限公司 | Car as a house battery charge time detects accounting device |
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| Publication number | Publication date |
|---|---|
| CN112366190A (en) | 2021-02-12 |
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