CN112364592A - Silicon-based PIN photoelectric detector modeling method capable of representing technological parameter deviation - Google Patents
Silicon-based PIN photoelectric detector modeling method capable of representing technological parameter deviation Download PDFInfo
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Abstract
A silicon-based PIN photoelectric detector modeling method capable of representing process parameter deviation relates to the field of device modeling and circuit design, and solves the problems that how to perform optimization based on statistical distribution data and test results of process parameters, the model accuracy of a silicon-based PIN photoelectric detector is effectively improved, and powerful support is provided for design, manufacture and reading circuit design of the PIN photoelectric detector; aiming at the problem that the process parameter deviation influences the response of a high-precision detector in the existing device manufacturing process, a device model capable of representing the process parameter deviation is provided, the traditional modeling method and the traditional process are optimized, non-ideal factors in the device manufacturing process are considered in the device modeling theoretical analysis process, a theoretical analysis and actual measurement data feedback research method is adopted, the optimization of the modeling method is focused on, the influence brought by production manufacturing and practical application is focused on, the influence and distribution of the process parameter deviation factors are considered, and the scientificity and the practicability of modeling are realized.
Description
Technical Field
The invention belongs to the field of device modeling and circuit design, and particularly relates to a silicon-based PIN photoelectric detector modeling method capable of representing technological parameter deviation.
Background
The silicon-based PIN photoelectric detector is a common photoelectric device and has important application value in the fields of short-distance high-speed optical communication, chip optical interconnection, optical storage medium information reading and writing and the like. In the occasions of high-precision photoelectric detection and the like, the silicon-based PIN photoelectric detector is often required to have the characteristics of high response speed, extremely low dark current, low noise and the like so as to meet the application requirements, and higher requirements are provided for the design and manufacture of the detector and the design of a reading circuit. A silicon-based PIN photoelectric detector is used as a photoelectric conversion device, researchers often represent the response characteristics of the silicon-based PIN photoelectric detector through an equivalent circuit model to provide design basis for the design of a detector and the design of a reading circuit chip, and the precision of the equivalent circuit model can directly influence the design of the device and a circuit.
In the prior art, a document published in 2013, namely influence of structural parameters of a silicon-based PIN photoelectric detector on performance (Wang Wei, Baichenxu, Von, etc.; semiconductor photoelectricity), theoretically analyzes and explains a device model of the PIN photoelectric detector, focuses on key parameter analysis performed for device design and performance optimization, such as simulation of I-V characteristics and other key indexes of specific structural parameters such as I-zone thickness, integral device width, junction area and the like, and develops and analyzes, and aims to obtain better design parameters from the aspects of theoretical modeling and simulation design.
In the document of "Suppression of Dark Current in semiconductor-on Silicon Pin photodetector by a Silicon Surface simulation Technique" (Dong Y, Wang W, Lei D, et al. optics Express) and "Pspie modeling simulation analysis of PIN photodetector based on OrCad software" (Pennsy, Wei, Wang wave; semiconductor photoelectricity), which was published in 2015, board level circuit design simulation software is widely used to establish Pspie or Hspie electrical simulation model of Silicon-based PIN photodetector, and by comparing simulation results of the simulation model with physical electrical parameter tests, parameter settings of the simulation model are corrected, and finally an equivalent circuit model which can be used for circuit simulation software to simulate is established. The established model is used for assisting designers to improve the key topological structure and key process parameters of the detector, and meanwhile, circuit simulation software can be used for carrying out simulation optimization on the photoelectric receiving circuit to complete the design of a reading circuit module or a chip. In this process, researchers often complete characteristic parameter curve fitting through a plurality of data points on various characteristic parameter curves input into the device, and then establish a simulation model of the device through the characteristic parameter curves. The common characteristic parameter curve fitting of the diode model comprises core parameters such as forward current, junction capacitance, reverse leakage current, reverse breakdown voltage, reverse recovery time and the like. In the parameter fitting link, different fitting methods can be selected to fit the characteristic parameters to obtain corresponding fitting curves.
With the development of the research, a document 'high-speed PIN photodetector microwave modeling and parameter extraction analysis' (Xuzhixia, university of east China) published in 2017 proposes complete modeling of a PIN photodetector comprising a linear part and a nonlinear part based on scattering parameters (S parameters) and direct current I-V characteristics obtained by testing. In the modeling process, for the establishment of a linear and nonlinear part model of the PIN photodetector, a linear and nonlinear circuit model conforming to the characteristics of a device is established first, then the element parameter values in a small signal model are extracted according to the tested S parameters, and finally the element parameter values in a large signal model are extracted according to the test result.
In the document "modeling and simulation analysis of PIN photodetector" (zhanghui, koehu, liushoui; applied optics) published in 2019, in order to optimize the response characteristics of the PIN photodetector, an equivalent circuit model of the photodetector is established according to a carrier rate equation and considering chip parasitic parameters and packaging parasitic parameters. The influence of reverse bias voltage, the width of an I area, a photosensitive surface, chip parasitic resistance and capacitance, packaging parasitic resistance, capacitance and inductance on the pulse response characteristic and the frequency response characteristic of the photoelectric detector is comprehensively simulated and analyzed. The reverse bias voltage is increased, the photosensitive surface and parasitic parameters (chip parasitic capacitance and resistance and packaging parasitic capacitance and resistance) are reduced, the proper width of the I area is selected, the resonance effect phenomenon of lead inductance is utilized, the waveform distortion of impulse response can be inhibited, the frequency response bandwidth is improved, and a new thought is provided for establishing a model of the silicon-based PIN photodiode in the research process.
Through literature research and patent retrieval, an electrical equivalent circuit model establishing method for a silicon-based PIN photoelectric detector is proposed, parameter fitting is completed based on a test result, key element parameters in the equivalent circuit model are assigned, and circuit simulation can be carried out according to the key element parameters. The detection method can meet design simulation requirements in most application scenes, but with continuous and deep research on high-precision photoelectric detection and rapid multi-element detection, the traditional modeling mode cannot represent the influence of the process parameter change of the silicon-based PIN photoelectric detector on the photoelectric conversion process, and the change of key parameters such as response rate, dark current and the like is an error factor which cannot be ignored in a photoelectric detection system.
Therefore, how to optimize based on the statistical distribution data of the process parameters and the test results, a silicon-based PIN photoelectric detector modeling method for representing the process parameter deviation is designed, so that the model precision of the silicon-based PIN photoelectric detector is effectively improved, and the silicon-based PIN photoelectric detector becomes urgent in urgent need of providing powerful support for the design and manufacture of the PIN photoelectric detector and the design of a reading circuit.
Disclosure of Invention
The invention aims to solve the technical problem of how to develop optimization based on process parameter statistical distribution data and test results and design a silicon-based PIN photoelectric detector modeling method for representing process parameter deviation, thereby effectively improving the model precision of the silicon-based PIN photoelectric detector and providing powerful support for design and manufacture of the PIN photoelectric detector and design of a reading circuit.
The invention solves the technical problems through the following technical scheme:
a silicon-based PIN photoelectric detector modeling method capable of representing process parameter deviation comprises the following steps:
step (1), carrying out physical process analysis on a PIN photoelectric detector to obtain carrier behavior level data and device key topological structure data in the PIN photoelectric detector in the prior art, and establishing an ideal electrical model of the PIN photoelectric detector; meanwhile, carrying out process analysis of the PIN photoelectric detector to obtain the statistical distribution condition of process parameters, and establishing a process parameter deviation equivalent model;
step (2), based on the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector obtained in the step (1), preliminarily establishing a device-level model capable of representing the process parameter deviation;
and (3) carrying out photoelectric characteristic test analysis facing the modeling technology, wherein the test analysis result is used for correcting and optimizing a device-level model capable of representing the process parameter deviation to obtain a final device-level model capable of representing the process parameter deviation.
The silicon-based PIN photoelectric detector model established by the method has higher precision, can complete non-parametric analysis and statistical analysis, is highly consistent with photoelectric characteristic test and application data, and provides a theoretical basis for realizing the design of a high-precision photoelectric detection system; the problems that an equivalent circuit model of the PIN photoelectric detector is low in precision, the core electrical parameter process dependence is high and the like are solved, and model reference is provided for manufacturing process optimization and special reading circuit chip design of the PIN photoelectric detector.
As a further improvement of the technical scheme of the invention, the analysis method of the process technology analysis comprises the following steps: and (3) testing the testing PIN photoelectric detectors of the modeling object in the same production batch, forming the basic distribution condition of the process parameter deviation according to the tested I-V characteristic curve, and establishing the process parameter deviation equivalent model in the step (2) by predicting the influence of the process parameters on the I-V characteristic curve and the Gaussian distribution of the deviation in the manufacturing of the PIN photoelectric detectors by adopting a BP neural network.
As a further improvement of the technical scheme of the invention, the specific process for establishing the process parameter deviation equivalent model comprises the following steps:
step a), quantifying process parameters: quantifying parameters of doping concentration and implantation dosage In the manufacturing process of the PIN photoelectric detector to form a neural network input matrix In ═ (p)1，p2，...，pi，...，pn)T；
In denotes the input matrix of the neural network, piA quantized vector representing a process parameter, i ═ 1,2, …, n; n represents a positive integer;
step b), output vector quantization: effect of Process parameters on IV curves by Curve parameters [ a, b, c]Expressing, from the deviation, the Gaussian distribution parameters [ H, mu, sigma ]]Combine to form an output vector Out ═ (a, b, cH, μ, σ)T；
Step c), designing a network structure: designing the number of hidden layers and the number of neurons of the whole neural network, wherein the calculation formula of the number of neurons is as follows:
the ith neuron output of the hidden layer is:
the nth output neuron expression is:
step d), setting the loss function loss as (Out _ pre-Out) ^ (2), wherein Out _ pre is the output of forward propagation;
step e), minimizing a loss function, and training and updating the weight coefficients of the output layer and the hidden layer by adopting a gradient descent method, wherein new _ ω is ω (ω - η) grad _ ω), wherein η is a learning rate, and grad _ ω is a gradient;
and f), using the trained model for reasoning new data to finish the prediction analysis of the performance of the detector of the next batch.
As a further improvement of the technical scheme of the invention, the analysis method of the physical process analysis comprises the following steps: and analyzing the working principle of the silicon-based PIN and the electrical characteristic index by combining the design parameters of the ideal manufacturing process and the effective bias voltage, and quantitatively calculating internal physical parameters to obtain the calculation result of the key parameters of the doping concentration and the mobility of the core region.
As a further improvement of the technical scheme of the invention, the final device-level model capable of representing the process parameter deviation comprises an ideal electrical model of the PIN photoelectric detector and a process parameter deviation equivalent model; after external optical signals are respectively input into the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector, current data are output under the combined action of the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector.
As a further improvement of the technical scheme of the invention, the ideal electrical model of the PIN photoelectric detector comprises an optical signal input model, a PIN photoelectric detector carrier behavior model and an electrical signal output model; external optical signals are input into the optical signal input model and output after passing through the PIN photoelectric detector carrier behavior model and the electric signal output model.
As a further improvement of the technical scheme of the invention, the method for establishing the PIN photoelectric detector carrier behavior model comprises the following steps: firstly, a circuit topological structure design is completed based on a small-signal equivalent circuit model of a PIN photodetector and physical process analysis, a parameter extraction formula in the small-signal equivalent circuit model is deduced, and the parameter extraction formula is combined with experimental data of photoelectric characteristic test of a device to optimize parameter selection; secondly, designing equivalent circuits of an optical signal input model and an electric signal output model according to design indexes of the PIN photoelectric detector, and quantifying key parameters representing input and output impedance and parasitic capacitance.
As a further improvement of the technical scheme of the invention, the photoelectric characteristic test analysis comprises a responsivity test, a bandwidth test and a noise test; the test instrument employed included: the device comprises a power-adjustable seed source, a high-sensitivity optical power meter, a high-bandwidth low-noise trans-impedance amplifier circuit, a high-precision multimeter, an electro-optical intensity modulator, a high-bandwidth signal source and a high-bandwidth high-sampling-rate oscilloscope.
As a further improvement of the technical scheme of the invention, the method for testing the responsiveness comprises the following steps:
1) adjusting the output optical power of the seed source, and testing the output of the seed source by using a high-sensitivity optical power meter, wherein the output is measured as P and is used as the actual output power of the seed source;
2) electrifying the transimpedance amplifier circuit, measuring the voltage of an output end by using a universal meter, and recording as V1;
3) connecting the PIN photoelectric detector with a transimpedance amplifier circuit;
4) the optical fiber output end of the seed source is tightly attached to the photosensitive element of the PIN photoelectric detector, so that all light is received by the photosensitive element of the PIN photoelectric detector;
5) measuring the voltage of the output end of the transimpedance amplifier circuit by using a universal meter, and recording as V2;
6) calculating the responsivity according to a formula, wherein the responsivity is the output light power of the seed source, and repeating 1) -5), and measuring for multiple times; calculating the average value of the multiple measurements;
the method for testing the bandwidth comprises the following steps:
a) the output of the seed source is connected with the input end 1 of the electro-optical intensity modulator, the output end of the signal source is connected with the input end 2 of the electro-optical intensity modulator, the optical fiber output port of the electro-optical intensity modulator is tightly attached to the photosensitive element of the PIN, the PIN is connected with the transimpedance amplifier circuit, and the output of the transimpedance amplifier is connected with an oscilloscope;
b) setting the output of a signal source as sine wave, recording the amplitude of the sine wave displayed by the oscilloscope as V3 when the frequency of the signal source is set to be 1Hz, adjusting the frequency of the sine wave to change from 1Hz to 10GHz, stepping by 1Hz, observing and recording the amplitude of the sine wave displayed by the oscilloscope until the amplitude of the sine wave displayed by the oscilloscope is reduced to 0.707 times of V3, and recording the frequency of the signal source at the moment, wherein the frequency is the-3 dB bandwidth of PIN.
As a further improvement of the technical scheme of the invention, the noise testing method comprises the following steps:
i) connecting a transimpedance amplifier circuit with an oscilloscope, sampling and storing data for 100 times by the oscilloscope, and calculating the root mean square of the data;
II) connecting the PIN with a transimpedance amplifier circuit on the basis of the step I), then sampling and storing data for 100 times by using an oscilloscope, and solving the root mean square of the data;
III) the root mean square of the step II) is subtracted from the root mean square of the step I), and the difference value is used as the evaluation of PIN noise.
The invention has the advantages that:
(1) the silicon-based PIN photoelectric detector model established by the method has higher precision, can complete non-parametric analysis and statistical analysis, is highly consistent with photoelectric characteristic test and application data, and provides a theoretical basis for realizing the design of a high-precision photoelectric detection system; the problems that an equivalent circuit model of the PIN photoelectric detector is low in precision, the core electrical parameter process dependence is high and the like are solved, and model reference is provided for manufacturing process optimization and special reading circuit chip design of the PIN photoelectric detector.
(2) Aiming at the actual problem that the process parameter deviation influences the response of a high-precision detector in the existing device manufacturing process, the invention provides a device model capable of representing the process parameter deviation, optimizes the traditional modeling method and the traditional process, considers non-ideal factors in the device manufacturing process in the theoretical analysis process of device modeling, adopts a research method of theoretical analysis and actual measurement data feedback, focuses on the optimization of the modeling method, focuses on the influence brought by production manufacturing and practical application, focuses on the influence and distribution of the process deviation factor, and aims at realizing the scientificity and practicability of modeling.
(3) The method provided by the invention can accurately describe the complete response characteristics of the silicon-based PIN photoelectric detector and characterize the influence of process parameter deviation, and the established model supports circuit design software to complete simulation analysis.
Drawings
Fig. 1 is a flow chart for establishing an equivalent model of a silicon-based PIN photodetector including an equivalent model of process parameter deviation according to a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviation according to an embodiment of the present invention;
fig. 2 is a silicon-based PIN photodetector equivalent model architecture diagram including a process parameter deviation equivalent model of a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviations according to an embodiment of the present invention;
FIG. 3 is a basic circuit diagram of a process parameter equivalent model of a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviations according to a first embodiment of the present invention;
FIG. 4 is a circuit diagram of an optical signal input model of a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviations according to a first embodiment of the present invention;
fig. 5 is a circuit diagram of an electrical signal output model of a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviations according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The technical scheme of the invention is further described by combining the drawings and the specific embodiments in the specification:
example one
As shown in fig. 1, a silicon-based PIN photodetector modeling method capable of characterizing process parameter deviations includes the following steps:
1) carrying out physical process analysis on the PIN photoelectric detector to obtain the carrier behavior level data and the device key topological structure data in the PIN photoelectric detector in the prior art, and establishing an ideal electrical model of the PIN photoelectric detector; meanwhile, carrying out process analysis of the PIN photoelectric detector to obtain the statistical distribution condition of process parameters, and establishing a process parameter deviation equivalent model;
2) based on the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector obtained in the step 1), preliminarily establishing a device-level model capable of representing the process parameter deviation;
3) and carrying out photoelectric characteristic test analysis facing the modeling technology, wherein the test analysis result is used for correcting and optimizing a device-level model capable of representing the process parameter deviation to obtain a final device-level model capable of representing the process parameter deviation.
Physical process analysis and adopted process analysis of the PIN photoelectric detector are firstly carried out, and carrier behavior level data, error statistical distribution data of key process parameters and device key topological structure data in the PIN photoelectric detector in the prior art are obtained. On the basis, an ideal electrical model of the PIN photoelectric detector and the statistical distribution condition of the process parameters are obtained, a device-level model capable of representing the process parameter deviation is preliminarily established, and a simplest electrical topological structure is shown in fig. 3. And finally, carrying out photoelectric characteristic test analysis facing the modeling technology. The photoelectric characteristic test analysis is a necessary link in the modeling process, and the test analysis result is used for correcting and optimizing an ideal electrical model, statistical distribution of process parameters and a device-level model capable of representing process parameter deviation.
Physical process analysis: and analyzing the working principle of the silicon-based PIN and the electrical characteristic index by combining the design parameters of the ideal manufacturing process and the effective bias voltage, and quantitatively calculating internal physical parameters to obtain the calculation results of key parameters such as the doping concentration and the mobility of the core region.
The analysis method of the process technology analysis comprises the following steps: and testing the test PIN photoelectric detectors of the modeling object in the same production batch, forming the basic distribution condition of the process parameter deviation according to the measured I-V characteristic curve, and predicting the influence of the process parameters on the I-V characteristic curve and the Gaussian distribution of the deviation in the manufacturing process of the PIN photoelectric detectors by adopting a BP neural network to establish the process parameter deviation equivalent model. The specific process is as follows:
1. quantifying process parameters: for the doping concentration in the PIN manufacturing process,Quantizing parameters such as implantation dosage to form a neural network input matrix In ═ p1，p2，...，pi，...，pn)T；
In denotes the input matrix of the neural network, piA quantized vector representing a process parameter, i ═ 1,2, …, n; wherein n is a positive integer;
2. output vector quantization: effect of Process parameters on IV curves by Curve parameters [ a, b, c]Expressing, from the deviation, the Gaussian distribution parameters [ H, mu, sigma ]]Combine to form an output vector Out ═ (a, b, c, H, μ, σ)TWherein a, b and c represent a zero-order term coefficient, a primary term coefficient and a secondary term coefficient in the polynomial fitting of the probability function, and H, mu and sigma respectively represent the amplitude of the Gaussian function, the coordinate of a peak center and a standard deviation;
3. designing a network structure: the number of hidden layers and the number of neurons in the whole neural network are designed, and the following formula derivation is performed by taking a single hidden layer as an example. Implicit layer neuron number referable
Wherein n isiTo imply the number of neurons, ninAnd noutThe number of neurons in the input layer and the output layer, respectively.
The ith neuron output of the hidden layer is:
wherein f is1() Representing the hidden layer activation function, r being the total number of input neurons, ω1ijRepresents the weight, h, of the jth input neuron to the ith hidden layer neuronjIs the value of the jth input neuron, b1iTo be offset, s1Representing the total number of hidden layer neurons.
The nth output neuron expression is:
wherein f is2() Representing the output layer activation function, ω2niRepresenting the weight, y, of the ith hidden layer neuron to the nth output layer neuron1iAs a result of the above formula, b2nTo be offset, s2Representing the total number of output layer neurons.
4. The loss function loss is set to (Out _ pre-Out) ^ (2), where Out _ pre is the forward propagated output and Out represents the actual output.
5. And minimizing a loss function, and training and updating the weight coefficients of the output layer and the hidden layer by adopting a gradient descent method, wherein new _ omega is omega (omega-eta _ grad _ omega), wherein omega represents the original weight, new _ omega represents the updated weight, eta is the learning rate, and grad _ omega is the weight gradient.
6. And (4) applying the trained model to the inference of new data to finish the prediction analysis of the performance of the detector of the next batch.
Different from a common PN junction, the base region I is added between a P-type silicon material region and an N-type silicon material region of the silicon-based PIN photoelectric detector to form a PIN silicon wafer, namely a light doping layer with low concentration is doped in the common PN junction and is similar to an intrinsic semiconductor, so that the doping concentrations and the error statistical distribution of the three doping regions are data of the modeling method. In addition, the width of each region of the PIN photodetector directly affects the junction parasitic resistance and parasitic capacitance, and has an important effect on the photoelectric conversion process and the electrical signal transmission, and the key parameters related to the process parameters adopted by the modeling method provided by this embodiment include the junction width and the error statistical distribution of the PIN photodetector, the specified doping concentrations and the error statistical distribution of the three doping regions, and the impurity types, the metering and doping process modes adopted by the three doping regions. The intrinsic layer in the detector increases the width of the depletion layer, so that the breakdown voltage of the device is not limited by the matrix material any more, and the base material with low resistivity can be selected, thereby being beneficial to the absorption of light irradiation, improving the quantum efficiency, reducing the junction capacitance and further reducing the response time of the device, and therefore, the resistivity of the base material is also a core parameter in the method.
As shown in fig. 2, the equivalent model in the silicon-based PIN photodetector modeling method capable of characterizing the process parameter deviation provided by this embodiment mainly includes four parts, which are an optical signal input model, a PIN photodetector carrier behavior model, an electrical signal output model, and a process parameter deviation equivalent model.
In each submodel, constructing a PIN photoelectric detector carrier behavior model, namely, firstly, completing circuit topology structure design based on a small-signal equivalent circuit model of the PIN photoelectric detector and physical process analysis, deducing a parameter extraction formula in the small-signal equivalent circuit model, combining the parameter extraction formula with experimental data of photoelectric characteristic test of a device, and optimizing parameter selection; secondly, designing equivalent circuits of an optical signal input model and an electric signal output model according to design indexes of the PIN photoelectric detector, and quantitatively representing key parameters such as input and output impedance, parasitic capacitance and the like.
The establishment of the process parameter deviation equivalent model is to comprehensively refer to a test result and a conclusion of process analysis on the basis of a PIN photoelectric detector carrier behavior model, build a process parameter deviation equivalent circuit model with device parameters obeying process parameter deviation statistical distribution on the basis of nonlinear resistors, nonlinear capacitors and the like, quantitatively characterize the influence of process parameter deviation on the silicon-based PIN photoelectric detector, and the model supports circuit simulation and statistical analysis.
Establishing an optical signal input model: when light is incident on the PIN detector, a photo-generated current is generated due to the photoelectric conversion characteristic of the PIN detector. Ideally, we believe that a photocurrent Iideal is generated. However, due to the fact that the multispectral characteristics of light and the non-ideal effects such as the absorption efficiency of the PIN detector cannot reach 100%, the actually generated photocurrent cannot reach Iideal, the influence of the non-ideal effects is equivalent to the current opposite to the Iideal, which is expressed as In, and therefore the optical signal input model shown In FIG. 4 can be built.
Establishing an electric signal output model: when the photocurrent is generated and the photoelectric conversion process is completed, the next step of electrical signal output model modeling is performed, as shown in fig. 5, the parasitic capacitance is represented by Cc and includes junction capacitance and parallel capacitance between the chip and the electrodes; the series resistance is denoted by Rc and includes the ohmic contact resistance between the chip and the electrodes and the bulk resistance, and Lc denotes the parasitic inductance introduced by the package.
There are many factors causing the deviation of the process parameters, and there are the following main reasons analyzed from the perspective of theoretical modeling: surface effects; generation and recombination in the barrier region; large injection conditions; series resistance effect. Since the PIN photodetector used by us usually operates under reverse bias voltage, the effect of generation and recombination in the barrier region will be described by taking the reverse bias state as an example. Firstly, when the pn junction is in a thermal equilibrium state, the carrier generation rate passing through the recombination center in the barrier region is equal to the recombination rate, and after a reverse bias voltage is applied, the electric field of the barrier region is strengthened, so that the electron-hole pairs passing through the recombination center are driven away by the electric field before recombination, that is, the carrier generation rate passing through the recombination center is greater than the recombination rate, thereby forming a part of current, and enabling the I-V curve to deviate from an ideal condition.
From the viewpoint of manufacturing, when manufacturing a pn junction, the actual value may fluctuate around the theoretical value due to the variation of the manufacturing process in the parameters such as the doping concentration n, the I region width L, and the junction area a, and the actual doping concentration n may occur*Actual I-width L*And the actual junction area A*. The invention is based on the process parameter deviation delta n ═ n of the actual and modeling*-n，ΔL＝L*-L and Δ a ═ a*And A, carrying out in-depth modeling analysis and actual measurement.
When the light irradiates the PIN detector, photons enter the pn junction, and photons with energy larger than the forbidden band width generate electron-hole pairs on two sides of the junction through intrinsic absorption. Because the potential barrier region of the pn junction has a self-established electric field, photogenerated carriers on two sides of the junction move in opposite directions under the action of the electric field, so that photogenerated electromotive force is generated on two ends of the pn junction, namely a forward voltage V is applied to the two ends of the pn junction, the original balance state of the pn junction is changed, and a photogenerated current IF is generated.
In the embodiment, the deviation of the process parameters of the conventional theoretical modeling method is extracted by comparing and analyzing the production application of the conventional theoretical modeling method and practice, and the deviation of the process parameters can be represented in the modeling process by adopting a scheme of theoretical analysis and actual test, so that more parameter supports are provided for the improvement of the subsequent production process, and the integrity of the PIN photoelectric detector model is realized. At present, in a modeling technology for a silicon-based PIN photoelectric detector, an influence caused by process deviation of key analysis and a corresponding modeling method are not provided, so that a detector model which is matched with measured data and has higher precision can be obtained under the double measures of developing forward theoretical analysis and adopting the measured data for feedback optimization, and an important reference basis is provided for design and process improvement of a reading circuit of the detector.
Photoelectric characteristic test analysis:
the invention provides a series of photoelectric characteristic test schemes, which specifically comprise the following steps: the responsivity is used as an important parameter of the PIN photoelectric detector, is defined as a ratio of output photocurrent to input photocurrent, reflects an important characteristic of the detector for realizing conversion of optical signals and electric signals, and scientificalness of a test scheme directly determines authenticity of model establishment.
The invention provides a scientific responsivity test scheme which comprises the following steps:
an experimental instrument: the device comprises an adjustable power seed source, a high-sensitivity optical power meter, a high-bandwidth low-noise trans-impedance amplifier circuit (the amplification speed is recorded as G) and a high-precision universal meter.
Step 1: adjusting the output optical power of the seed source, and testing the output of the seed source by using a high-sensitivity optical power meter, wherein the output is measured as P and is used as the actual output power of the seed source;
step 2: electrifying the transimpedance amplifier circuit, measuring the voltage of an output end by using a universal meter, and recording as V1;
and step 3: connecting the PIN photoelectric detector with a transimpedance amplifier circuit;
and 4, step 4: the optical fiber output end of the seed source is tightly attached to the photosensitive element of the PIN, so that all light is received by the photosensitive element of the PIN;
and 5: measuring the output end of the transimpedance amplifier circuit by using a multimeter, and recording as V2;
step 6: calculating responsivity according to a formula, namely changing the output light power of the seed source, repeating the steps 1-5, and measuring for multiple times;
and 7: and calculating the average value of multiple measurements, and reducing experimental errors.
Meanwhile, in order to describe the complete response characteristics of the PIN detector and reflect the integrity and authenticity of an electrical model of the PIN detector, the bandwidth, noise and other electrical parameters of the PIN detector need to be actually considered, so that the modeling and practical application are highly consistent.
The invention provides a scientific test scheme for bandwidth and noise respectively:
1. testing scheme of bandwidth:
an experimental instrument: the power adjustable oscilloscope comprises a power adjustable seed source, an electro-optic intensity modulator, a high-bandwidth low-noise trans-impedance amplifier circuit (the amplification speed is recorded as G), a high-bandwidth signal source and a high-bandwidth high-sampling rate oscilloscope
Step 1: the output of the seed source is connected with the input end 1 of the electro-optical intensity modulator, the output end of the signal source is connected with the input end 2 of the electro-optical intensity modulator, the optical fiber output port of the electro-optical intensity modulator is tightly attached to the photosensitive element of the PIN, the PIN is connected with the transimpedance amplifier circuit, and the output of the transimpedance amplifier is connected with an oscilloscope;
step 2: setting the output of a signal source as sine wave, recording the amplitude of the sine wave displayed by the oscilloscope as V3 when the frequency of the signal source is set to be 1Hz, adjusting the frequency of the sine wave to change from 1Hz to 10GHz, stepping by 1Hz, observing and recording the amplitude of the sine wave displayed by the oscilloscope until the amplitude of the sine wave displayed by the oscilloscope is reduced to 0.707 times of V3, and recording the frequency of the signal source at the moment, wherein the frequency is the-3 dB bandwidth of PIN.
2. Test scheme of noise:
an experimental instrument: high-bandwidth low-noise trans-impedance amplifier circuit (the amplification speed is recorded as G), high-bandwidth high-sampling rate oscilloscope
Step 1: connecting the transimpedance amplifier circuit with an oscilloscope, sampling and storing data for 100 times by the oscilloscope, and calculating the root mean square of the data;
step 2: connecting the PIN with a transimpedance amplifier circuit on the basis of the step 1, then sampling and storing data for 100 times by using an oscilloscope, and solving the root mean square of the data;
and step 3: and (4) subtracting the root mean square of the step (2) from the root mean square of the step (1), and taking the difference value as the evaluation of PIN noise.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A silicon-based PIN photoelectric detector modeling method capable of representing process parameter deviation is characterized by comprising the following steps:
step (1), carrying out physical process analysis on a PIN photoelectric detector to obtain carrier behavior level data and device key topological structure data in the PIN photoelectric detector in the prior art, and establishing an ideal electrical model of the PIN photoelectric detector; meanwhile, carrying out process analysis of the PIN photoelectric detector to obtain the statistical distribution condition of process parameters, and establishing a process parameter deviation equivalent model;
step (2), based on the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector obtained in the step (1), preliminarily establishing a device-level model capable of representing the process parameter deviation;
and (3) carrying out photoelectric characteristic test analysis facing the modeling technology, wherein the test analysis result is used for correcting and optimizing a device-level model capable of representing the process parameter deviation to obtain a final device-level model capable of representing the process parameter deviation.
2. The method of claim 1, wherein the process analysis is performed by a silicon-based PIN photodetector modeling method capable of characterizing process parameter variations, the method comprising: and (3) testing the testing PIN photoelectric detectors of the modeling object in the same production batch, forming the basic distribution condition of the process parameter deviation according to the tested I-V characteristic curve, and establishing the process parameter deviation equivalent model in the step (2) by predicting the influence of the process parameters on the I-V characteristic curve and the Gaussian distribution of the deviation in the manufacturing of the PIN photoelectric detectors by adopting a BP neural network.
3. The method for modeling a silicon-based PIN photodetector capable of characterizing the process parameter deviation according to claim 2, wherein the process parameter deviation equivalent model is established by a specific process comprising the following steps:
step a), quantifying process parameters: quantifying parameters of doping concentration and implantation dosage In the manufacturing process of the PIN photoelectric detector to form a neural network input matrix In ═ (p)1，p2，...，pi，...，pn)T；
In denotes the input matrix of the neural network, piA quantized vector representing a process parameter, i ═ 1,2, …, n; n represents a positive integer;
step b), output vector quantization: effect of Process parameters on IV curves by Curve parameters [ a, b, c]Expressing, from the deviation, the Gaussian distribution parameters [ H, mu, sigma ]]Combine to form an output vector Out ═ (a, b, c, H, μ, σ)T；
Step c), designing a network structure: designing the number of hidden layers and the number of neurons of the whole neural network, wherein the calculation formula of the number of neurons is as follows:
the ith neuron output of the hidden layer is:
the nth output neuron expression is:
step d), setting the loss function loss as (Out _ pre-Out) ^ (2), wherein Out _ pre is the output of forward propagation;
step e), minimizing a loss function, and training and updating the weight coefficients of the output layer and the hidden layer by adopting a gradient descent method, wherein new _ ω is ω (ω - η) grad _ ω), wherein η is a learning rate, and grad _ ω is a gradient;
and f), using the trained model for reasoning new data to finish the prediction analysis of the performance of the detector of the next batch.
4. The silicon-based PIN photodetector modeling method capable of characterizing process parameter variations according to claim 1, wherein the physical process analysis method comprises: and analyzing the working principle of the silicon-based PIN and the electrical characteristic index by combining the design parameters of the ideal manufacturing process and the effective bias voltage, and quantitatively calculating internal physical parameters to obtain the calculation result of the key parameters of the doping concentration and the mobility of the core region.
5. The method according to claim 1, wherein the final device-level model capable of characterizing the process parameter deviation comprises an ideal electrical model of the PIN photodetector and a process parameter deviation equivalent model; after external optical signals are respectively input into the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector, current data are output under the combined action of the ideal electrical model and the process parameter deviation equivalent model of the PIN photoelectric detector.
6. The silicon-based PIN photodetector modeling method capable of characterizing the process parameter deviation according to claim 5, wherein the ideal electrical model of the PIN photodetector comprises an optical signal input model, a PIN photodetector carrier behavior model and an electrical signal output model; external optical signals are input into the optical signal input model and output after passing through the PIN photoelectric detector carrier behavior model and the electric signal output model.
7. The silicon-based PIN photodetector modeling method capable of characterizing the process parameter deviation according to claim 6, wherein the PIN photodetector carrier behavior model is established by a method comprising the following steps: firstly, a circuit topological structure design is completed based on a small-signal equivalent circuit model of a PIN photodetector and physical process analysis, a parameter extraction formula in the small-signal equivalent circuit model is deduced, and the parameter extraction formula is combined with experimental data of photoelectric characteristic test of a device to optimize parameter selection; secondly, designing equivalent circuits of an optical signal input model and an electric signal output model according to design indexes of the PIN photoelectric detector, and quantifying key parameters representing input and output impedance and parasitic capacitance.
8. The modeling method for the silicon-based PIN photodetector capable of characterizing the process parameter deviation according to claim 1, wherein the photoelectric characteristic test analysis comprises a responsivity test, a bandwidth test and a noise test; the test instrument employed included: the device comprises a power-adjustable seed source, a high-sensitivity optical power meter, a high-bandwidth low-noise trans-impedance amplifier circuit, a high-precision multimeter, an electro-optical intensity modulator, a high-bandwidth signal source and a high-bandwidth high-sampling-rate oscilloscope.
9. The modeling method of the silicon-based PIN photodetector capable of characterizing the deviation of the process parameters according to claim 8, wherein the responsivity test method comprises the following steps:
1) adjusting the output optical power of the seed source, and testing the output of the seed source by using a high-sensitivity optical power meter, wherein the output is measured as P and is used as the actual output power of the seed source;
2) electrifying the transimpedance amplifier circuit, measuring the voltage of an output end by using a universal meter, and recording as V1;
3) connecting the PIN photoelectric detector with a transimpedance amplifier circuit;
4) the optical fiber output end of the seed source is tightly attached to the photosensitive element of the PIN photoelectric detector, so that all light is received by the photosensitive element of the PIN photoelectric detector;
5) measuring the voltage of the output end of the transimpedance amplifier circuit by using a universal meter, and recording as V2;
6) calculating the responsivity according to a formula, wherein the responsivity is the output light power of the seed source, and repeating 1) -5), and measuring for multiple times; calculating the average value of the multiple measurements;
the method for testing the bandwidth comprises the following steps:
a) the output of the seed source is connected with the input end 1 of the electro-optical intensity modulator, the output end of the signal source is connected with the input end 2 of the electro-optical intensity modulator, the optical fiber output port of the electro-optical intensity modulator is tightly attached to the photosensitive element of the PIN, the PIN is connected with the transimpedance amplifier circuit, and the output of the transimpedance amplifier is connected with an oscilloscope;
b) setting the output of a signal source as sine wave, recording the amplitude of the sine wave displayed by the oscilloscope as V3 when the frequency of the signal source is set to be 1Hz, adjusting the frequency of the sine wave to change from 1Hz to 10GHz, stepping by 1Hz, observing and recording the amplitude of the sine wave displayed by the oscilloscope until the amplitude of the sine wave displayed by the oscilloscope is reduced to 0.707 times of V3, and recording the frequency of the signal source at the moment, wherein the frequency is the-3 dB bandwidth of PIN.
10. The method for modeling a silicon-based PIN photodetector capable of characterizing process parameter variations according to claim 7, wherein the noise testing method comprises:
i) connecting a transimpedance amplifier circuit with an oscilloscope, sampling and storing data for 100 times by the oscilloscope, and calculating the root mean square of the data;
II) connecting the PIN with a transimpedance amplifier circuit on the basis of the step I), then sampling and storing data for 100 times by using an oscilloscope, and solving the root mean square of the data;
III) the root mean square of the step II) is subtracted from the root mean square of the step I), and the difference value is used as the evaluation of PIN noise.
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