CN112363670B - SATA NCQ command scheduling method - Google Patents

SATA NCQ command scheduling method Download PDF

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Publication number
CN112363670B
CN112363670B CN202011099189.6A CN202011099189A CN112363670B CN 112363670 B CN112363670 B CN 112363670B CN 202011099189 A CN202011099189 A CN 202011099189A CN 112363670 B CN112363670 B CN 112363670B
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Prior art keywords
fis
queue
command
sending
fpdma
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CN112363670A (en
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刘超
杨硕
杨阳
王晓璐
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Tianjin Jinhang Computing Technology Research Institute
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Tianjin Jinhang Computing Technology Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0674—Disk device
    • G06F3/0676—Magnetic disk device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Numerical Control (AREA)

Abstract

The invention relates to a method for scheduling SATA NCQ commands, belonging to the field of hard disk reading and writing. In the invention, a Device receives a Read or Write FPDMA queue command with TAG of 0, then responds to a Register FIS from the corresponding Device to Host, and adds DMA Setup FIS, data FIS and Set Device Bits FIS corresponding to the command into a sending queue; when a Read or Write FPDMA queue command is received subsequently, a Register FIS from Device to Host corresponding to the new command is inserted into the forefront of the sending queue, and the corresponding DMA Setup FIS, data FIS and Set Device Bits FIS are sequentially added to the tail end of the sending queue. The invention can enable the SATA Device to respond to the Register FIS from Device to Host corresponding to the Read FPDMA queue or Write FPDMA queue command in time; and can manage FIS that Device needs to transmit using the transmit queue.

Description

SATA NCQ command scheduling method
Technical Field
The invention belongs to the field of hard disk reading and writing, and particularly relates to a method for scheduling SATA NCQ commands.
Background
NCQ is a command protocol in SATA, allowing multiple commands to be executed in a hard disk drive at the same time. When an application program of a Host (Host) sends a plurality of commands to a hard disk Device (Device), the execution sequence of the commands can be optimized by using NCQ, so that the total time for completing the commands is reduced, and the performance of the system is improved.
An NCQ function is defined in the SATA protocol: first-Party DMA (FPDMA). The SATA allows the hard disk end to directly send a data transmission request to the Host controller through the DMA setup FIS, the DMA engine of the Host can directly transmit data, and the intervention of Host end software is not needed in the process. In response to two SATA NCQ commands, namely, a Read FPDMA queue command and a Write FPDMA queue command, the Device needs to respond to a Device-to-Host Register FIS immediately after receiving a Host-to-Device Register FIS with the Read FPDMA queue command or the Write FPDMA queue command. If Device inserts other types of FISs in the Register FIS that sends Device to Host, host reports an error.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is how to provide a method for scheduling SATA NCQ commands, so as to solve the problem that command execution errors are caused when a Device to Host Register FIS of a SATA Host is not timely replied by a hard disk Device in the process of responding to continuous NCQ commands by a hard disk.
(II) technical scheme
In order to solve the above technical problem, the present invention provides a SATA NCQ command scheduling method, which includes the following steps:
s1, the Device receives a Read FPDMA (fast Data memory access) queue command with TAG 0, responds to a Register FIS (FIS) corresponding to the Device to Host, and adds a DMA Setup FIS, a Data FIS and a Set Device Bits FIS corresponding to the command to a sending queue;
s2, in the process of sequentially executing the sending queue, if the Device receives a Read FPDMA (fast data access) queue command with TAG 1, suspending the sending execution process of the current queue, inserting a Register FIS (FIS) from the Device to the Host corresponding to the Read FPDMA queue command with TAG 1 into the forefront of the sending queue, and sending the Register FIS from the Device to the Host firstly; simultaneously, sequentially adding a Read FPDMA queue command with TAG of 1 to the tail end of the sending queue corresponding to DMA Setup FIS, data FIS and Set Device Bits FIS;
and S3, in the process of sequentially executing the sending queue, if the Device receives a new Read FPDMA queue command, executing the operation in the step S2.
The invention also provides a SATA NCQ command scheduling method, which comprises the following steps:
t1, the Device receives a Write FPDMA queue command with TAG of 0, then the Device responds to a Register FIS from the corresponding Device to Host, and DMA Setup FIS, DMA Activate FIS and Set Device Bits FIS corresponding to the command are added into a sending queue;
t2, in the process of sequentially executing the sending queue, if the Device receives a Write FPDMA queue command with TAG 1, suspending the sending execution process of the current queue, inserting a Device-Host Register FIS corresponding to the Write FPDMA queue command with TAG 1 into the forefront of the sending queue, and sending the Device-Host Register FIS to the Host first; simultaneously, sequentially adding DMA Setup FIS, data FIS and Set Device Bits FIS corresponding to the Write FPDMA queue command with TAG of 1 to the tail end of the sending queue;
and T3, in the process of sequentially executing the sending queue, if the Device receives a new Write FPDMA queue command, executing the operation according to the step T2.
(III) advantageous effects
The invention provides a SATA NCQ command scheduling method, which has the advantages that:
the SATA Device can respond to Device to Host Register FIS corresponding to Read FPDMA queue or Write FPDMA queue commands in time;
the FIS that the Device needs to transmit is managed using the transmit queue.
Detailed Description
In order to make the objects, contents and advantages of the present invention more apparent, the following detailed description of the present invention will be given in conjunction with examples.
The invention provides a method for processing two SATA NCQ commands of Read FPDMA queue and Write FPDMA queue in a Device, which can enable the Device to respond to the Register FIS from the Device to the Host corresponding to the received NCQ command in time.
The following is a description of the inventive content in Read FPDMA queue. The invention comprises the following steps:
s1, the Device receives a Read FPDMA (fast Data memory access) queue command with TAG 0, responds to a Register FIS (FIS) corresponding to the Device to Host, and adds a DMA Setup FIS, a Data FIS and a Set Device Bits FIS corresponding to the command to a sending queue;
s2, in the process of sequentially executing the sending queue, if the Device receives a Read FPDMA queue command with TAG 1, the sending execution process of the current queue is suspended, and a Register FIS from the Device to the Host corresponding to the Read FPDMA queue command with TAG 1 is inserted into the forefront of the sending queue, so that the Register FIS from the Device to the Host is firstly sent to the Host. Simultaneously, sequentially adding a Read FPDMA queue command with TAG of 1 to the tail end of the sending queue corresponding to DMA Setup FIS, data FIS and Set Device Bits FIS;
and S3, in the process of sequentially executing the sending queue, if the Device receives a new Read FPDMA queue command, executing the operation in the step S2.
The following is a description of the inventive content in Write FPDMA queue. The invention comprises the following steps:
t1, the Device receives a Write FPDMA queue command with TAG of 0, then the Device responds to a corresponding Register FIS from the Device to Host, and adds a DMA Setup FIS, a DMA Activate FIS and a Set Device Bits FIS corresponding to the command into a sending queue;
and T2, in the process of sequentially executing the sending queue, if the Device receives a Write FPDMA queue command with TAG 1, suspending the sending execution process of the current queue, inserting a Device-Host Register FIS corresponding to the Write FPDMA queue command with TAG 1 into the forefront of the sending queue, and sending the Device-Host Register FIS to the Host first. Simultaneously, sequentially adding a Write FPDMA queue command with TAG of 1 to the tail end of the sending queue corresponding to DMA Setup FIS, data FIS and Set Device Bits FIS;
and T3, in the process of sequentially executing the sending queue, if the Device receives a new Write FPDMA queue command, executing the operation according to the step T2.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (2)

1. A SATA NCQ command scheduling method is characterized by comprising the following steps:
s1, a Device receives a Read FPDMA queue command with TAG of 0, then responds to a Register FIS from the corresponding Device to Host, and adds DMA Setup FIS, data FIS and Set Device Bits FIS corresponding to the command into a sending queue;
s2, in the process of sequentially executing the sending queue, if the Device receives a Read FPDMA (fast data access) queue command with TAG 1, suspending the sending execution process of the current queue, inserting a Register FIS (FIS) from the Device to the Host corresponding to the Read FPDMA queue command with TAG 1 into the forefront of the sending queue, and sending the Register FIS from the Device to the Host firstly; simultaneously, adding a Read FPDMA queue command with TAG of 1 corresponding to DMA Setup FIS, data FIS and Set Device Bits FIS to the tail end of the sending queue in sequence;
and S3, in the process of sequentially executing the sending queue, if the Device receives a new Read FPDMA queue command, executing the operation in the step S2.
2. A SATA NCQ command scheduling method is characterized by comprising the following steps:
t1, the Device receives a Write FPDMA queue command with TAG of 0, then the Device responds to a Register FIS from the corresponding Device to Host, and adds a DMA Setup FIS, a DMA Activate FIS and a Set Device Bits FIS corresponding to the command into a sending queue;
t2, in the process of sequentially executing the sending queue, if the Device receives a Write FPDMA queue command with TAG 1, suspending the sending execution process of the current queue, inserting a Device-Host Register FIS corresponding to the Write FPDMA queue command with TAG 1 into the forefront of the sending queue, and sending the Device-Host Register FIS to the Host first; simultaneously, sequentially adding a Write FPDMA queue command with TAG of 1 to the tail end of the sending queue, wherein the DMA Setup FIS, the Data FIS and the Set Device Bits FIS correspond to the DMA Setup FIS;
and T3, in the process of sequentially executing the sending queue, if the Device receives a new Write FPDMA queue command, executing the operation according to the step T2.
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US20090006657A1 (en) * 2007-06-26 2009-01-01 Asad Azam Enabling consecutive command message transmission to different devices
JP5611909B2 (en) * 2011-08-19 2014-10-22 株式会社東芝 Information processing device, performance evaluation tool, and external storage device performance evaluation method
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