CN112350558B - Dynamic overshot suppression circuit and suppression method - Google Patents

Dynamic overshot suppression circuit and suppression method Download PDF

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CN112350558B
CN112350558B CN202011053129.0A CN202011053129A CN112350558B CN 112350558 B CN112350558 B CN 112350558B CN 202011053129 A CN202011053129 A CN 202011053129A CN 112350558 B CN112350558 B CN 112350558B
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voltage
circuit
load
common
tube
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CN112350558A (en
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冯子秋
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0038Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a dynamic overshot suppression circuit and a suppression method, and belongs to the technical field of power supply systems. The suppression circuit comprises a control circuit and an energy release circuit; the control circuit is electrically connected with the energy release circuit, and the energy release circuit adopts a circuit structure with a common-mode inductor as a core. The suppression method comprises a corresponding step of realizing overshot suppression by the suppression circuit.

Description

Dynamic overshot suppression circuit and suppression method
Technical Field
The invention provides a dynamic overshot suppression circuit and a suppression method, and belongs to the technical field of power supply systems.
Background
Most integrated circuits currently use an average voltage of 5V, such as CPU, CPLD, FPGA, and other devices. Therefore, in a power supply system of an integrated circuit, the 220V ac power of the mains supply is converted into 12V or 54V ac power by the PSU and then is output to the circuit, and then is converted into a lower level by the BUCK for use by a load.
Meanwhile, with the development of information technology, the data volume processed by devices such as a CPU and a memory in a unit time is required to increase explosively. While processing large amounts of data, the power required by the load also rises linearly. Taking the CPU as an example, the CPU is not always in a stable operating state in actual use, and reflects a dynamic change of a current in a required current. However, the BUCK line has an inductance, and its current value cannot change instantaneously. Therefore, the output voltage value changes dramatically in a moment, and the relevant waveform is shown in fig. 1. The lower portion of fig. 1 is a current waveform that is typically tested to simulate poor operation, typically by ramping the electronic load from 0A to full load current at a fast rate. When the current rises, the inductive current does not change instantaneously, and the energy required by the load is provided by the output capacitor. Meanwhile, when the VR monitors the output voltage to be too low, the working frequency can be adjusted, and the energy transmission speed is improved. When the current suddenly decreases from the maximum value, the voltage will rise instantaneously because the inductor current cannot change instantaneously. At this time, the lower MOS of VR is turned on, and the voltage can only be discharged by an external circuit.
However, too many resistors cannot be added to the output end, and when the VR is powered on, because no charge exists in the capacitor, a large amount of energy is needed when the VR is turned on, so that the starting current is too large due to too much capacitor, and the VR cannot be normally powered on.
Meanwhile, in practical use, the damage caused by overshot is far higher than that of undershoot, and because the overshot is caused because current cannot react quickly when the load changes instantaneously, redundant energy can only be stored through an output capacitor or released through other lines. Generally, in the product design stage, the inductance value is calculated according to the optimal working state, and if the ripple of the output voltage of the inductance value is reduced, the VR efficiency is lowered and the quality of the output voltage is reduced.
The current method is to increase the output capacitance, but if too much capacitance is added, the VR will not start up properly. Indeed, a fast VR response speed may significantly improve the dynamic voltage parameter, but may cause instability of the control loop during normal VR static operation, and a small disturbance may also cause a large regulation amplitude.
Disclosure of Invention
The invention provides a dynamic overshot suppression circuit and a suppression method, which are applied to an additional hardware circuit of a BUCK, reduce overshot voltage peak value and protect load equipment by changing the circuit working state of the BUCK during load dynamic adjustment, and are used for solving the problems that the conventional common overshot suppression method easily causes that VR cannot be normally started and a control loop is unstable during VR static work to generate interference so as to cause larger regulation amplitude, and the adopted technical scheme is as follows:
a dynamic overshot suppression circuit, the suppression circuit comprising a control circuit and an energy bleed circuit; the control circuit is electrically connected with the energy release circuit, and the energy release circuit adopts a circuit structure with a common-mode inductor as a core.
Further, the energy release circuit comprises a common-mode inductor, a linear voltage regulator tube and a second capacitor; and the first output end of the common-mode inductor is connected with the negative end of the linear voltage-stabilizing tube, and the positive end of the linear voltage-stabilizing tube is connected with the first input end of the common-mode inductor through a second capacitor and a second MOS tube.
Further, the second capacitor is connected in series with the positive terminal of the linear voltage-stabilizing tube, and the positive terminal of the linear voltage-stabilizing tube is connected with the drain terminal of the second MOS tube through the second capacitor connected in series with the positive terminal of the linear voltage-stabilizing tube.
Furthermore, the energy release circuit further comprises a voltage-dividing resistor module, and one end of the voltage-dividing resistor module is connected with the second output end of the common-mode inductor; the other end of the voltage-dividing resistor module is connected with the first input end of the common-mode inductor through the second MOS tube; and the Vref signal end of the linear voltage-stabilizing tube is connected with the voltage-dividing end of the voltage-dividing resistor module.
Furthermore, the voltage-dividing resistor module comprises a first resistor and a second resistor; the first resistor R1 and the second resistor are connected in series, and a connection line between the first resistor and the second resistor is a voltage dividing end of the voltage dividing resistor module.
Further, the energy release circuit further comprises a first capacitor, and the first capacitor is connected with the voltage division resistor module in parallel.
Further, the control circuit comprises a controller, a first MOS tube and a second MOS tube; and the MOS tube of the controller is respectively electrically connected with the grid ends of the first MOS tube and the second MOS tube.
Further, the drain end of the first MOS transistor is connected to the second input end of the common mode inductor; the source terminal of the first MOS tube is connected with a power supply input signal terminal, and the source terminal of the second MOS tube is connected with the first input terminal of the common-mode inductor; and the drain end of the second MOS tube is connected with one end of the second capacitor.
Furthermore, a first input end of the common mode inductor is connected with one end of a load through a drain end of a second MOS tube; the second output end of the common mode inductor is connected with the other end of the load, and the load, the first capacitor and the voltage division resistor module are connected in parallel.
A voltage suppression method of a dynamic overshot suppression circuit, the voltage suppression method comprising:
setting and adjusting the voltage value of a Vref end of a trigger linear voltage regulator tube according to the output value of the voltage Vout;
detecting load current, wherein when the load current is detected to change from large current to small current, the voltage at two ends of the load is increased;
the voltage at two ends of the load is fed back to an output voltage feedback pin of the controller, and when the voltage at two ends of the load exceeds an internal set voltage value of the controller, the controller controls the second MOS tube to keep a starting state;
when the second MOS tube is kept in an opening state, the common-mode inductor continuously releases energy to the load side; the voltage Vout continuously rises to the maximum voltage value, and the linear voltage-regulator tube is conducted;
after the linear voltage regulator tube is conducted, the energy discharge circuit forms a path, and the energy stored in the energy discharge circuit before is continuously released to the second capacitor, so that the voltage Vout is recovered to a normal voltage value.
The invention has the beneficial effects that:
the invention provides a dynamic overshot suppression circuit and a suppression method, wherein an inductor in a traditional BUCK circuit is replaced by a common-mode inductor, a new current conduction path is introduced, and the common-mode inductor has extra circuit to discharge energy when in overshot, so that the voltage peak value is reduced to a certain extent. The suppression circuit and the suppression method provided by the invention can effectively solve the problem that the overshot is too high in the dynamic operation of the load, and avoid the damage of the too high voltage to the load. Meanwhile, the suppression circuit has the advantages of fewer integrally used components and simple structure, the occupied space of the circuit is greatly reduced, partial parameters of the components of the circuit can be flexibly adjusted, and the compatibility of the suppression circuit and various forms of BUCK circuits is effectively improved.
Drawings
FIG. 1 is a schematic waveform diagram illustrating a voltage value of a power supply circuit in the prior art that may change sharply in a moment;
FIG. 2 is a circuit schematic of the suppression circuit of the present invention;
fig. 3 is an equivalent circuit diagram of the suppression circuit of the invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
A dynamic overshot suppression circuit, as shown in fig. 2 and 3, the suppression circuit comprising a control circuit and an energy bleed circuit; the control circuit is electrically connected with the energy release circuit, and the energy release circuit adopts a circuit structure with a common-mode inductor as a core.
The energy release circuit comprises a common-mode inductor L1, a linear voltage regulator tube D1 and a second capacitor C2; a first output end of the common-mode inductor L1 is connected to a negative end of the linear regulator tube D1, and a positive end of the linear regulator tube D1 is connected to a first input end of the common-mode inductor L1 through a second capacitor C2 and a second MOS transistor Q2. The second capacitor C2 is connected in series with the positive terminal of the linear regulator tube D1, and the positive terminal of the linear regulator tube D1 is connected with the drain terminal of the second MOS transistor Q2 through the second capacitor C2 connected in series with the positive terminal.
The energy release circuit further comprises a voltage-dividing resistor module, and one end of the voltage-dividing resistor module is connected with the second output end of the common-mode inductor L1; the other end of the voltage-dividing resistor module is connected with a first input end of the common-mode inductor L1 through the second MOS transistor Q2; and the Vref signal end of the linear voltage-regulator tube D1 is connected with the voltage-dividing end of the voltage-dividing resistor module. The voltage-dividing resistor module comprises a first resistor R1 and a second resistor R2; the first resistor R1 and the second resistor R2 are connected in series, and a connection line between the first resistor R1 and the second resistor R2 is a voltage dividing end of the voltage dividing resistor module.
The energy discharge circuit further comprises a first capacitor C1 connected in parallel with the divider resistor module.
The control circuit comprises a controller, a first MOS tube Q1 and a second MOS tube Q2; the MOS tube of the controller is respectively electrically connected with the grid ends of the first MOS tube Q1 and the second MOS tube Q2. The drain end of the first MOS transistor Q1 is connected to the second input end of the common-mode inductor L1; a source terminal of the first MOS transistor Q1 is connected to a power input signal terminal Vin, and a source terminal of the second MOS transistor Q2 is connected to a first input terminal of the common-mode inductor L1; the drain terminal of the second MOS transistor Q2 is connected to one end of a second capacitor C2. A first input end of the common mode inductor L1 is connected with one end of a load through a drain end of a second MOS tube Q2; the second output end of the common mode inductor L1 is connected with the other end of the load, and the load, the first capacitor C1 and the voltage dividing resistor module are connected in parallel.
The working principle of the technical scheme is as follows: the linear regulator D1 has three main pins: positive electrode, negative electrode and Ref. The voltage value of the trigger Vref point can be flexibly adjusted according to the Vout condition by reasonably setting the resistance values of the first resistor R1 and the second resistor R2. When the load current changes from a large current value to a small current value, the voltage rises. At this time, the related voltage parameter is fed back to the FB (output voltage feedback pin) of the controller (i.e. VR chip), and when the voltage exceeds its internal set value, the controller keeps the second MOS transistor Q2 turned on, as shown in fig. 3. At this moment, the common mode inductor L1 continues to release energy to the load side, Vout continues to rise to reach a large voltage value, which causes the linear regulator D1 to be turned on, and a path (i.e., an energy bleeding circuit) is formed on the other side of the common mode inductor, the stored energy is released to the second capacitor C2, and Vout can quickly recover to a normal voltage value.
The effect of the above technical scheme is as follows: the inductance in the traditional BUCK line is replaced by the common-mode inductance, a new current conduction path is introduced, so that the common-mode inductance has extra circuits for energy discharge at an overshot, and the voltage peak value is reduced to a certain extent. The suppression circuit provided by the invention can effectively solve the problem that the overshot is too high in the dynamic operation of the load, and avoids the damage of the too high voltage to the load. Meanwhile, the suppression circuit has the advantages of fewer integrally used components and simple structure, the occupied space of the circuit is greatly reduced, partial parameters of the components of the circuit can be flexibly adjusted, and the compatibility of the suppression circuit and various forms of BUCK circuits is effectively improved.
A voltage suppression method of a dynamic overshot suppression circuit, the voltage suppression method comprising:
step 1, setting and adjusting the voltage value of a Vref end of a trigger linear voltage regulator tube D1 according to the output value of the voltage Vout;
step 2, detecting load current, wherein when the load current is detected to change from large current to small current, the voltage at two ends of the load is increased;
step 3, feeding back the voltage at two ends of the load to an FB pin (output voltage feedback pin) of the controller, and controlling the first MOS tube Q1 and the second MOS tube Q2 to keep an opening state by the controller when the voltage at two ends of the load exceeds an internal set voltage value of the controller;
step 4, when the first MOS transistor Q1 and the second MOS transistor Q2 are kept in an on state, the common mode inductor L1 continues to release energy to the load side; the voltage Vout continuously rises to the maximum voltage value, and the linear voltage regulator tube D1 is conducted;
and 5, after the linear voltage regulator tube D1 is conducted, the energy release circuit forms a path, and the energy stored in the energy release circuit before is continuously released to the second capacitor C2 to enable the voltage Vout to be recovered to a normal voltage value.
The working principle of the technical scheme is as follows: the structure of the energy discharge circuit led out by the common mode inductor is shown in fig. 2, by detecting that Vout exceeds a set voltage threshold value, a linear voltage regulator D1 is opened, and redundant energy of the inductor is released to a second capacitor C2, so that the overvoltage voltage value is effectively suppressed. Since the voltage of Vout cannot turn on the linear regulator tube D1 under other conditions, the normal operation of the BUCK circuit is not affected by the circuit.
The effect of the above technical scheme is as follows: the inductance in the traditional BUCK line is replaced by the common-mode inductance, a new current conduction path is introduced, so that the common-mode inductance has extra circuits for energy discharge at an overshot, and the voltage peak value is reduced to a certain extent. The suppression circuit provided by the invention can effectively solve the problem that the overshot is too high in the dynamic operation of the load, and avoids the damage of the too high voltage to the load.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (3)

1. A dynamic overshoot (over) suppression circuit, the suppression circuit comprising a control circuit and an energy bleed circuit; the control circuit is electrically connected with the energy release circuit, and the energy release circuit adopts a circuit structure taking a common-mode inductor as a core;
the energy release circuit comprises a common-mode inductor, a linear voltage regulator tube and a second capacitor; the first output end of the common-mode inductor is connected with the negative end of the linear voltage-stabilizing tube, the positive end of the linear voltage-stabilizing tube is connected with the first input end of the common-mode inductor through a second capacitor and a second MOS tube, the second capacitor is connected in series with the positive end of the linear voltage-stabilizing tube, and the positive end of the linear voltage-stabilizing tube is connected with the source end of the second MOS tube through a second capacitor connected in series with the linear voltage-stabilizing tube;
the control circuit comprises a controller, a first MOS tube and a second MOS tube; the controller is respectively electrically connected with the grid terminals of the first MOS tube and the second MOS tube, and the source terminal of the first MOS tube is connected with the second input terminal of the common-mode inductor; the drain end of the first MOS tube is connected with a power supply input signal end, and the drain end of the second MOS tube is connected with the first input end of the common-mode inductor; the source terminal of the second MOS tube is connected with one end of a second capacitor, and the first input end of the common mode inductor is connected with one end of a load through the source terminal of the second MOS tube; the second output end of the common mode inductor is connected with the other end of the load, and the load, the second capacitor and the voltage division resistor module are connected in parallel;
the energy release circuit further comprises a voltage-dividing resistor module, and one end of the voltage-dividing resistor module is connected with the second output end of the common-mode inductor; the other end of the voltage-dividing resistor module is connected with the first input end of the common-mode inductor through the second MOS tube; the Vref signal end of the linear voltage-stabilizing tube is connected with the voltage-dividing end of the voltage-dividing resistor module;
the voltage division resistor module comprises a first resistor and a second resistor; the first resistor and the second resistor are connected in series, and a connecting line between the first resistor R1 and the second resistor R2 is a voltage dividing end of the voltage dividing resistor module;
and detecting the output voltage Vout at two sides of the load, controlling the second MOS tube to be started when the output voltage exceeds an internal set voltage value, and conducting the linear voltage regulator tube when the voltage Vout continuously rises to reach a maximum voltage value, so that the energy stored in the common mode inductor L1 before is continuously released to the second capacitor, and the voltage Vout is recovered to a normal voltage value.
2. The dynamic overshoot (overshot) suppression circuit of claim 1, wherein the energy bleed circuit further comprises a first capacitor connected in parallel with a resistor divider module.
3. A voltage suppression method for a dynamic overshoot (overshot) suppression circuit according to any one of claims 1 or 2, the voltage suppression method comprising:
setting and adjusting the voltage value of a Vref end of a trigger linear voltage-stabilizing tube according to the output value of the output voltage Vout at two sides of the load;
detecting load current, wherein when the load current is detected to change from large current to small current, the voltage at two ends of the load is increased;
the voltage at two ends of the load is fed back to an output voltage feedback pin of the controller, and when the voltage at two ends of the load exceeds an internal set voltage value of the controller, the controller controls the second MOS tube to keep a starting state;
when the second MOS tube is kept in an opening state, the common-mode inductor continuously releases energy to the load side; continuously increasing the output voltage Vout at two sides of the load to a maximum voltage value, and conducting the linear voltage-regulator tube;
after the linear voltage regulator tube is conducted, the energy release circuit forms a path, and the energy stored in the energy release circuit before is continuously released to the second capacitor, so that the output voltage Vout on two sides of the load is recovered to a normal voltage value.
CN202011053129.0A 2020-09-29 2020-09-29 Dynamic overshot suppression circuit and suppression method Active CN112350558B (en)

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US6693805B1 (en) * 2002-07-31 2004-02-17 Lockheed Martin Corporation Ripple cancellation circuit for ultra-low-noise power supplies
CN105262335A (en) * 2015-11-06 2016-01-20 安徽朗格暖通设备有限公司 Switch power supply circuit and solar power generation system
CN207977895U (en) * 2018-01-30 2018-10-16 长沙广义变流技术有限公司 Current transformer output voltage overshoots control circuit and output voltage controlling circuit
CN109873561A (en) * 2019-04-15 2019-06-11 苏州浪潮智能科技有限公司 A kind of the energy utilization circuit and electronic equipment of overshoot voltage

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