CN112346786A - Debugging information recording method applied to startup stage and operation stage after startup - Google Patents
Debugging information recording method applied to startup stage and operation stage after startup Download PDFInfo
- Publication number
- CN112346786A CN112346786A CN201910730840.6A CN201910730840A CN112346786A CN 112346786 A CN112346786 A CN 112346786A CN 201910730840 A CN201910730840 A CN 201910730840A CN 112346786 A CN112346786 A CN 112346786A
- Authority
- CN
- China
- Prior art keywords
- error code
- computer device
- error
- target error
- target
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention provides a debug information recording method applied to a startup stage and a post-startup operation stage, which is implemented by a computer device storing a plurality of error codes, a plurality of debug information and an error parameter, and comprises the following steps: (A) judging whether unrecoverable errors occur in the previous execution according to the error parameters; (B) when it is determined that an unrecoverable error has not occurred, interrupting a currently executed program and executing an error handling program when an interrupt signal is received; (C) obtaining a first target error code through the error handling program; (D) when the first target error code has the corresponding debugging information, recording the debugging information corresponding to the first target error code; (E) when the first target error code does not have the corresponding debugging information, no debugging information is recorded.
Description
Technical Field
The present invention relates to a method for recording information in a bios, and more particularly, to a method for recording debug information in a bios.
Background
Currently, in the server field, there are two versions for the same Basic Input Output System (BIOS), and the first version of the BIOS (Release Mode BIOS) does not generate corresponding debug information when executing or entering an error handling program in the boot stage, so as to save boot time and provide for a general user; the second version of BIOS (Debug Mode BIOS) continuously generates corresponding Debug information when executing or entering an Error Handling program (Error Handling) during the boot-up phase, which may cause too long boot-up time, but some of the Debug information may provide great help for technical developers to develop Debug.
However, the error information recorded in the Event Log file of the BIOS is still not detailed enough for technical developers. Therefore, technical researchers must re-write the bios using the first version into the bios of the second version to obtain the corresponding debugging information, but this method still cannot reproduce the risk of errors occurring when the system uses the bios of the first version, so that in implementation, when an error occurs in the client system, the technical researchers also need to go to the client for field maintenance.
Therefore, how to provide a bios debug information recording method that can record or display necessary debug information effective for technical developers when a system error occurs without rewriting the bios into a second version, and reduce the boot time and the labor waste of the technical developers to perform field maintenance on the client is the primary issue to be solved by the present invention.
Disclosure of Invention
The present invention is directed to a method for recording debug information during a boot stage and a post-boot operation stage, which is capable of outputting necessary debug information effective for technical developers only when a system error occurs without rewriting a basic input/output system that is a second version, and reducing boot time and labor waste when the technical developers perform field maintenance on a client.
In order to solve the above technical problems, a method for recording debug information applied to a boot stage and a post-boot operation stage is implemented by a computer device, wherein the computer device stores a plurality of error codes and a plurality of debug information, and each debug information corresponds to one of the error codes.
The method for recording the debugging information applied to the startup stage and the post-startup operation stage comprises a step (A), a step (B), a step (C), a step (D) and a step (E).
And (A) judging whether the computer device has unrecoverable errors in the previous execution according to the error parameters by the computer device.
And (B) when the computer device is judged not to have an unrecoverable error in the previous execution, interrupting a currently executed program and executing an error processing program by the computer device when an interrupt signal indicating that the computer device has an error is received.
And (C) obtaining a first target error code through the error processing program by the computer device, wherein the first target error code is one of the error codes.
And (D) when the first target error code has the corresponding debugging information, recording the debugging information corresponding to the first target error code by the computer device through the error processing program.
Step (E) is that when the first target error code does not have the corresponding debugging information, the computer device does not record any debugging information through the error processing program.
Compared with the prior art, the debugging information recording method applied to the startup stage and the post-startup operation stage of the invention records or displays the debugging information corresponding to the obtained first target error code when the computer device receives the Interrupt signal (Interrupt) and executes the error processing program by means of the error codes and the screened debugging information stored by the computer device, so that the screened necessary debugging information can be output only when the computer device has errors without burning the computer device into a second version of the basic input output system again, and meanwhile, the startup time of the computer device is shortened and the labor waste of technical research personnel for client-side field maintenance is reduced.
[ description of the drawings ]
FIG. 1 is a block diagram of a computer device that implements the method for recording debug information during a boot-up phase and a post-boot run phase according to an embodiment of the present invention.
FIG. 2 is a flowchart illustrating steps 50-56 of a boot-up phase recording procedure according to the embodiment.
FIG. 3 is a flowchart illustrating steps 57-63 of the boot-up phase recording procedure.
FIG. 4 is a flowchart illustrating steps 64-72 of the boot-up phase registration procedure.
FIG. 5 is a flowchart illustrating the detailed process of how the boot-up phase registration process obtains a first target error code.
FIG. 6 is a flowchart illustrating the detailed process of how the boot-up recording process obtains a second target error code.
FIG. 7 is a flowchart illustrating steps 80-84 and 91 of a run-phase registration procedure according to the embodiment.
FIG. 8 is a flowchart illustrating steps 85-90 of the run-phase registration procedure.
FIG. 9 is a flowchart illustrating the detailed process of how the phase recorder obtains a third target error code.
[ detailed description ] embodiments
Referring to fig. 1, a computer device 100 for executing the method for recording debugging information applied to the booting stage and the post-booting operation stage according to an embodiment of the present invention includes a storage module 1, a display module 2, and a processing module 3 electrically connected to the storage module 1 and the display module 2.
The storage module 1 includes a first storage unit 11 and a second storage unit 12.
The first storage unit 11 stores a bios, error codes, debug information, and a duplicate error code log associated with the bios. Wherein each debug message corresponds to one of the error codes. The error code repeat table contains a number of occurrences corresponding to all error codes that have occurred in the computing device 100. Specifically, in this embodiment, the error codes and the debug information are included in the code of the BIOS. In addition, the present invention is implemented by a technical developer manually screening all the Debug information of the second version of basic input output system (Debug Mode BIOS) described in the prior art, and screening the Debug information which is effective and necessary for testing and repairing the computer device 100 as the Debug information stored in the first storage unit 11. For example, a technician may leave the debug information that is valid and necessary for testing and repairing the computing device 100 in the BIOS code and delete the unnecessary debug information directly; or, a flag value is added to each error code, wherein the flag value of the error code corresponding to the necessary debugging information is different from the flag value of the error code corresponding to the unnecessary debugging information, so that the computer device 100 can determine whether to record or display the corresponding debugging information according to the flag value corresponding to the detected error code, but not limited to the above two manners. In addition, the Error codes stored in the first storage unit 11 indicate that the errors of the computer device 100 belong to detectable errors (Detected errors), and undetectable errors (Undetected errors) are not discussed in the present invention. The detectable errors are subdivided into recoverable errors (Correctable errors) and unrecoverable errors (unorderable errors).
The second storage unit 12 stores an Error parameter associated with the bios for indicating whether an unrecoverable Error (uncorrupt) occurs during a previous execution of the computing device 100.
In this embodiment, the computer device 100 is a computer or a server with an arithmetic function, but not limited thereto.
In this embodiment, the first storage unit 11 is a Read-Only Memory (ROM), but not limited thereto.
In the embodiment, the second storage unit 12 is a Complementary Metal Oxide Semiconductor (CMOS), but not limited thereto.
The following will describe the operation details of the storage module 1, the display module 2 and the processing module 3 in the computer device 100 by using the embodiment of the present invention applied to the method for recording debugging information in the booting stage and the post-booting operation stage.
Referring to fig. 2 to 4, the boot-up stage recording program is used for recording or displaying debugging information when the computer device 100 is in the boot-up stage and the operating system is not executed, and includes a step 50, a step 51, a step 52, a step 53, a step 54, a step 55, a step 56, a step 57, a step 58, a step 59, a step 60, a step 61, a step 62, a step 63, a step 64, a step 65, a step 66, a step 67, a step 68, a step 69, a step 70, a step 71, and a step 72.
In step 50, the processing module 3 executes a boot program according to the bios in the storage module 1.
In step 51, the processing module 3 determines whether an unrecoverable error occurs in the previous execution of the run-time recording program of the computing device 100 according to the error parameter. When the processing module 3 determines that no unrecoverable error occurs when the computer device 100 executes the operation stage recording program in the previous time, the process proceeds to step 52; when the processing module 3 determines that an unrecoverable error occurs when the computer device 100 executes the operation stage recording program in the previous time, the process proceeds to step 64.
It should be noted that, the step 64 is executed to indicate that the error parameter indicates that an unrecoverable error occurs when the computer device 100 executes the run-phase recording program in the previous time, which causes the computer device 100 to restart, and it is not too late to record or display the corresponding debugging information for the technical research and development personnel to refer to, so that the computer device 100 records or displays the debugging information corresponding to the unrecoverable error for the technical research and development personnel to refer to when the computer device 100 executes the boot-phase recording program after restarting (step 51 and steps 64 to 72). In particular, the processing module 3 outputs the debug information corresponding to the unrecoverable error to the display module 2 through a Communication interface (Communication port) initialized in the boot program, or outputs the debug information to be stored in any storage device (e.g., a hard disk) for technical research and development personnel to refer to.
In step 52, the processing module 3 determines whether an interrupt signal indicating that the computer device 100 has an error is received in the boot process. When the processing module 3 determines that the interrupt signal is not received, flow proceeds to step 53; when the processing module 3 determines that the interrupt signal was received, flow proceeds to step 54. Specifically, in this embodiment, the interrupt signal is used to indicate that a system register in the computing device 100 stores a first value indicating an error code. It should be noted that, since step 52 is in the boot stage and the operating System is not yet executed, the interrupt signal of step 52 belongs to a System Management Interrupt (SMI).
In step 53, the processing module 3 determines whether the boot process is complete. When the processing module 3 determines that the boot program is not completed, the processing module 3 continues to execute the boot program, and returns to step 52; when the processing module 3 determines that the boot-up procedure is completed, the boot-up phase recording procedure is terminated.
In the sub-step 54, the processing module 3 interrupts the currently executed boot program and executes the error handling program.
In step 55, the processing module 3 sets a display parameter indicating the display level of the debug information as all or part of the debug information through the error handling process. It should be noted that, in this embodiment, setting the display parameter to 3 means setting all debug information to be displayed, setting the display parameter to 2 means setting part of debug information to be displayed, and setting the display parameter to 1 means setting part of debug information to be displayed, wherein the amount of debug information displayed by setting the display parameter to 2 is larger and more detailed than the amount of debug information displayed by setting the display parameter to 1. Specifically, in this embodiment, the display parameter is set to 3.
In step 56, the processing module 3 obtains a first target error code through the error handling program. The first target error code is one of the error codes.
Referring to fig. 5, it should be noted that step 56 further includes a sub-step 561 and a sub-step 562.
In sub-step 561, the processing module 3 obtains the first value stored in the system register through the error handling procedure.
In sub-step 562, the processing module 3 obtains the first target error code according to the first value through the error handling procedure.
In step 57, the processing module 3 determines whether the occurrence frequency of the debug information corresponding to the first target error code exceeds a predetermined frequency according to the error code repeat log table via the error handling program. When the processing module 3 determines that the occurrence frequency of the debug information corresponding to the first target error code does not exceed the preset frequency, performing step 58; when the processing module 3 determines that the occurrence frequency of the debug information corresponding to the first target error code exceeds the preset frequency, the process proceeds to step 61.
In step 58, the processing module 3 adds one to the number of occurrences of the first target error code in the repeat error code record table via the error handling procedure.
In step 59, when the first target error code has the corresponding debugging information, the processing module 3 displays all or part of the debugging information corresponding to the first target error code on the display module 2 through the communication interface according to the set display parameters via the error handling program, or outputs the debugging information and stores the debugging information in any storage device for the technical research and development personnel to refer. It should be noted that, if the technical developers have deleted the debug information corresponding to the first target error code, it means that the first target error code does not have the corresponding debug information, i.e. the processing module 3 does not record or display any debug information; or, the processing module 3 determines whether the first target error code has corresponding debugging information according to the flag value corresponding to the first target error code, wherein when the processing module 3 determines that the flag value corresponding to the first target error code indicates that the debug information corresponding to the first target error code belongs to unnecessary debug information, it indicates that the first target error code does not have the corresponding debug information, that is, the processing module 3 does not record or display any debug information, otherwise, when the processing module 3 determines that the flag value corresponding to the first target error code indicates that the debug information corresponding to the first target error code belongs to the necessary debug information, it means that the first target error code has the corresponding debugging information, i.e. the processing module 3 records or displays the debugging information corresponding to the first target error code.
In step 60, the processing module 3 sets the display parameter to not display debug information via the error handling procedure. It should be noted that, in this embodiment, setting the display parameter to 0 means that the debug information is not displayed.
In step 61, the processing module 3 sets the display parameter to not display the debug information via the error handling procedure.
In step 62, when the first target error code has the corresponding debugging information, the processing module 3 does not record or display the debugging information corresponding to the first target error code on the display module 2 according to the set display parameters through the error handling program.
In step 63, the processing module 3 ends the error handling procedure and returns to step 52. It is noted that the display parameter is set to display all or part of the debug information during the execution of the error handling process (step 55), and the display parameter is set to not display the debug information before the error handling process is finished (steps 60 and 61), so as to control the corresponding debug information to be displayed during the error handling process.
In step 64, the computer device 3 sets a display parameter indicating the display level of the debug information as all or part of the debug information. Specifically, in this embodiment, the display parameter is set to 3.
In step 65, the computer device 3 obtains a second target error code. The second target error code is one of the error codes. It is noted that the second target error code is an error that occurs when the computer device 100 executes the run-time logging program at the previous time and causes the computer device 100 to restart, and is not in time for logging or displaying the unrecoverable error.
Referring to fig. 6, it is worth particularly describing that step 65 further comprises a sub-step 651 and a sub-step 652.
In sub-step 651, the computer device 3 obtains a second value stored by the system register.
In the sub-step 652, the computer device 3 obtains the second target error code according to the second value.
In step 66, the computer device 3 determines whether the occurrence frequency of the debug information corresponding to the second target error code exceeds the predetermined frequency according to the error code repeat log. When the processing module 3 determines that the occurrence frequency of the debug information corresponding to the second target error code does not exceed the preset frequency, the process proceeds to step 67; when the processing module 3 determines that the occurrence frequency of the debug information corresponding to the second target error code exceeds the predetermined frequency, the process proceeds to step 70.
In step 67, the processing module 3 adds one to the number of occurrences of the second target error code in the repeat error code record table.
In step 68, when the second target error code has the corresponding debugging information, the processing module 3 displays all or part of the debugging information corresponding to the second target error code on the display module 2 through the communication interface according to the set display parameters, or outputs the debugging information and stores the debugging information in any storage device for the technical research and development personnel to refer. It should be noted that, if the technical developers have deleted the debug information corresponding to the second target error code, it means that the second target error code does not have the corresponding debug information, i.e. the processing module 3 does not record or display any debug information; or, the processing module 3 determines whether the second target error code has corresponding debugging information according to the flag value corresponding to the second target error code, wherein when the processing module 3 determines that the flag value corresponding to the second target error code indicates that the debug information corresponding to the second target error code belongs to unnecessary debug information, it indicates that the second target error code does not have the corresponding debug information, that is, the processing module 3 does not record or display any debug information, otherwise, when the processing module 3 determines that the flag value corresponding to the second target error code indicates that the debug information corresponding to the second target error code belongs to the necessary debug information, it means that the second target error code has the corresponding debugging information, i.e. the processing module 3 records or displays the debugging information corresponding to the second target error code.
In step 69, the processing module 3 sets the display parameter to not display the debug information.
In step 70, the processing module 3 sets the display parameter to not display the debug information.
In step 71, when the second target error code has the corresponding debugging information, the processing module 3 does not record or display the debugging information corresponding to the first target error code on the display module 2 according to the set display parameters.
In step 72, the processing module 3 sets the error parameter to indicate that the computer device 100 has not an unrecoverable error in the previous execution, and returns to step 52.
Referring to fig. 7 and 8, the run-phase recording program is used for recording or displaying debugging information when the computer device 100 is in a state of being powered on and executing an operating system, and includes a step 80, a step 81, a step 82, a step 83, a step 84, a step 85, a step 86, a step 87, a step 88, a step 89, a step 90, and a step 91.
In step 80, the processing module 3 determines whether another interrupt signal indicating that the computing device 100 has an error is received. When the processing module 3 determines that the other interrupt signal is not received, the process returns to step 80; when the processing module 3 determines that the further interrupt signal has been received, flow proceeds to step 81. It is noted that, since step 80 is after the booting is completed and the operating System is executed, the other interrupt signal of step 80 belongs to a System Control Interrupt (SCI).
In step 81, the processing module 3 interrupts a currently executed program and executes the error handling program. Specifically, in this embodiment, the other interrupt signal is used to indicate that the system register in the computing device 100 stores a third value indicating an error code.
In step 82, the processing module 3 sets the display parameters to display all or part of the debug information via the error handling process. Specifically, in this embodiment, the display parameter is set to 3.
In step 83, the processing module 3 obtains a third target error code through the error handling program. The third target error code is one of the error codes.
Referring to fig. 9, it is worth particularly describing that the step 83 further includes a sub-step 831 and a sub-step 832.
In the sub-step 831, the processing module 3 obtains the third value stored in the system register through the error handling procedure.
In the sub-step 832, the processing module 3 obtains the third target error code according to the third value through the error handling procedure.
In step 84, the processing module 3 determines whether the error indicated by the third target error code is an unrecoverable error through the error handling program. When the processing module 3 determines that the error indicated by the third target error code is not an unrecoverable error, the process proceeds to step 85; when the processing module 3 determines that the error indicated by the third target error code is an unrecoverable error, the process proceeds to step 91.
In step 85, the processing module 3 determines whether the occurrence frequency of the debug information corresponding to the third target error code exceeds the predetermined frequency according to the error code repeat log table via the error handling program. When the processing module 3 determines that the occurrence frequency of the debug information corresponding to the third target error code does not exceed the preset frequency, performing step 86; when the processing module 3 determines that the occurrence frequency of the debug information corresponding to the third target error code exceeds the predetermined frequency, the process proceeds to step 89.
In step 86, the processing module 3 adds one to the number of occurrences of the third target error code in the repeat error code record table through the error handling procedure.
In step 87, when the third target error code has the corresponding debugging information, the processing module 3 displays all or part of the debugging information corresponding to the third target error code on the display module 2 through the communication interface according to the set display parameters via the error handling program, or outputs the debugging information and stores the debugging information in any storage device for the technical research and development personnel to refer. It should be noted that, if the technical developers have deleted the debug information corresponding to the third target error code, it means that the third target error code does not have the corresponding debug information, i.e. the processing module 3 does not record or display any debug information; or, the processing module 3 determines whether the third target error code has corresponding debugging information according to the flag value corresponding to the third target error code, wherein when the processing module 3 determines that the flag value corresponding to the third target error code indicates that the debug information corresponding to the third target error code belongs to unnecessary debug information, it indicates that the third target error code does not have the corresponding debug information, that is, the processing module 3 does not record or display any debug information, otherwise, when the processing module 3 determines that the flag value corresponding to the third target error code indicates that the debug information corresponding to the third target error code belongs to the necessary debug information, it means that the third target error code has the corresponding debugging information, i.e. the processing module 3 records or displays the debugging information corresponding to the third target error code.
In step 88, the processing module 3 sets the display parameter to not display debug information via the error handling process, and returns to step 80.
In step 89, the processing module 3 sets the display parameter to not display debug information via the error handling procedure.
In step 90, when the third target error code has the corresponding debugging information, the processing module 3 does not record or display the debugging information corresponding to the third target error code on the display module 2 according to the set display parameters through the error handling program, and returns to step 80.
In step 91, the processing module 3 sets the error parameter to indicate that an unrecoverable error occurred in the previous execution of the computing device 100 via the error handling program. Specifically, when the computer device 100 has an unrecoverable error during execution, the computer device 100 automatically restarts and executes the boot-stage recording program until it is too late to record or display the debugging information corresponding to the third target error code (unrecoverable error). Then, when step 51 of the boot-stage registration procedure determines that an unrecoverable error occurs in the computer device 100 during the previous execution of the runtime registration procedure, the processing module 3 determines the third value stored in the sub-step 831 as the second value of the sub-step 651 in step 65, obtains the second target error code (at this time, the third target error code is identical to the second target error code), and then outputs the debugging information (the debugging information corresponding to the second target error code) that the computer device 100 cannot record or display due to automatic restart to the display module 2 through the communication interface, or outputs the debugging information and stores the debugging information in any storage device for a research and development technician to refer.
In summary, the present invention is applied to a method for recording Debug information during a boot stage and a run stage after boot, wherein the storage module 1 stores the error codes and the filtered Debug information, and the processing module 3 executes the boot stage recording program and the run stage recording program, respectively, during the boot stage and without executing the operating system, and after the boot is completed and the operating system is executed, and the display parameter is set to display all or part of the Debug information and the occurrence frequency does not exceed a predetermined frequency, the corresponding Debug information is recorded or displayed on the display module 2, so as to effectively control the display period and the display frequency for recording or displaying necessary Debug information effective for technicians without recording a second version of a basic input output system (Debug Mode BIOS), meanwhile, the starting time is shortened, and the labor waste of technical research personnel for client field maintenance is reduced. Therefore, the object of the present invention can be achieved.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (14)
1. A debug information recording method applied to a boot stage and a post-boot operation stage is implemented by a computer device executing a program code of a Basic Input Output System (BIOS), wherein the program code of the BIOS comprises a plurality of error codes and a plurality of debug information, each debug information corresponds to one of the error codes, the computer device further stores an error parameter for indicating whether an unrecoverable error occurs in the previous execution of the computer device, and the debug information recording method applied to the boot stage and the post-boot operation stage comprises the following steps:
(A) by means of the computer device, according to the error parameter, judging whether the computer device has an unrecoverable error in the previous execution;
(B) when the computer device is judged not to have an unrecoverable error in the previous execution, interrupting a currently executed program and executing an error processing program by the computer device when an interrupt signal indicating that the computer device has an error is received;
(C) obtaining a first target error code through the error processing program by the computer device, wherein the first target error code is one of the error codes;
(D) when the first target error code has the corresponding debugging information, recording the debugging information corresponding to the first target error code through the error processing program by the computer device; and
(E) when the first target error code does not have the corresponding debugging information, the computer device does not record any debugging information through the error processing program.
2. The method as claimed in claim 1, further comprising the following steps after the step (B):
(F) setting a display parameter indicating a display level of debug information as all or part of the debug information through the error processing program by the computer device; and
in step (D), when the first target error code has the corresponding debugging information, the computer device records all or part of the debugging information corresponding to the first target error code according to the set display parameters through the error handling program.
3. The method as claimed in claim 2, wherein the computer device further stores a duplicate error code log table containing a number of occurrences of the first target error code, and further comprises the following steps before the step (D):
(G) determining whether the occurrence frequency of the debugging information corresponding to the first target error code exceeds a preset frequency through the error processing program and the repeated error code record table by the computer device;
(H) when the computer device determines that the occurrence frequency of the debugging information corresponding to the first target error code does not exceed the preset frequency, the computer device adds one to the occurrence frequency corresponding to the first target error code in the repeated error code recording table through the error processing program; and
in step (D), when the first target error code has corresponding debugging information and it is determined that the number of occurrences of the debugging information corresponding to the first target error code does not exceed the preset number, the computer device records all or part of the debugging information corresponding to the first target error code according to the set display parameters through the error handling program.
4. The method as claimed in claim 3, further comprising the following steps after the step (G):
(I) when the computer device determines that the occurrence frequency of the debugging information corresponding to the first target error code exceeds the preset frequency, setting the display parameter as not to display the debugging information through the error processing program by the computer device; and
(J) when the first target error code has the corresponding debugging information and the occurrence frequency of the debugging information corresponding to the first target error code is judged to exceed the preset frequency, the debugging information corresponding to the first target error code is not recorded according to the display parameters and the set display parameters.
5. The method as claimed in claim 3, further comprising the following steps after the step (D):
(K) when the first target error code has the corresponding debugging information and the occurrence frequency of the debugging information corresponding to the first target error code is judged not to exceed the preset frequency, the computer device records all or part of the debugging information corresponding to the first target error code according to the set display parameters, and then the error processing program sets the display parameters to not display the debugging information.
6. The method as claimed in claim 1, further comprising the following steps after the step (A):
(L) when it is determined that the computer device has an unrecoverable error during a previous execution, obtaining, by the computer device, a second target error code, the second target error code being one of the error codes;
(M) when the second target error code has corresponding debug information, recording, by the computer device, the debug information corresponding to the second target error code; and
(N) setting, by the computing device, the error parameter to indicate that the computing device has not experienced an unrecoverable error during a previous execution.
7. The method as claimed in claim 6, wherein the computer device further stores a duplicate error code log table containing a number of occurrences of the second target error code, and further comprises the following steps before the step (M):
(O) determining, by the computer device, whether the occurrence frequency of the debug information corresponding to the second target error code exceeds a predetermined frequency according to the duplicate error code log;
(P) when the computer determines that the number of occurrences of the debug information corresponding to the second target error code does not exceed the predetermined number, adding one to the number of occurrences of the second target error code in the repeat error code record table by the computer; and
in step (M), when the second target error code has corresponding debug information and it is determined that the number of occurrences of the debug information corresponding to the second target error code does not exceed the preset number, the computer device records the debug information corresponding to the second target error code.
8. The method as claimed in claim 7, further comprising the following steps after the step (O):
(Q) when the second target error code has the corresponding debugging information, but the occurrence frequency of the debugging information corresponding to the second target error code is judged to exceed the preset frequency, the computer device is used for not recording the debugging information corresponding to the second target error code.
9. The method as claimed in claim 6, wherein the step (L) comprises the steps of:
(L-1) setting, by the computer device, a display parameter indicating a display level of the debug information as all or part of the display of the debug information when it is determined that an unrecoverable error has occurred in the previous execution of the computer device;
(L-2) obtaining, by the computer device, the second target error code;
wherein, in the step (M), when the second target error code has the corresponding debugging information, the computer device records all or part of the debugging information corresponding to the second target error code according to the set display parameters; and
wherein, after the step (M), the following steps are included:
(R) setting the display parameters to not display the debug information after recording all or part of the debug information corresponding to the second target error code by the computer device.
10. The method as claimed in claim 1, wherein the debugging information recording method is applied in boot-up phase and post-boot run-up phase,
in step (B), the interrupt signal is used to indicate that the system register in the computer device stores a first value indicating an error code;
wherein the step (C) comprises the following steps:
(C-1) obtaining, by the computer device, the first value stored in the system register through the error handling procedure; and
(C-2) obtaining, by the computer device, the first target error code according to the first value through the error handling program.
11. The method as claimed in claim 6, wherein the step (L) comprises the steps of:
(L-1) obtaining, by the computer device, a second value stored by the system register when it is determined that an unrecoverable error has occurred in a previous execution of the computer device; and
(L-2) obtaining, by the computer device, the second target error code based on the second value.
12. The method as claimed in claim 1, wherein the computer device further stores an error parameter indicating whether an unrecoverable error occurred during a previous execution of the computer device, and further comprises the following steps after the step (C):
(S) determining, by the computer device, whether the error indicated by the first target error code is an unrecoverable error via the error handling program; and
(T) when the error indicated by the first target error code is determined to be an unrecoverable error, setting, by the computer device, the error parameter to indicate that the unrecoverable error occurred during a previous execution of the computer device via the error handling program.
13. The method as claimed in claim 12, further comprising the following steps after the step (T):
(U) restarting by the computer device.
14. The method as claimed in claim 1, wherein the code of the BIOS further comprises a plurality of unnecessary debugging information, each of the unnecessary debugging information corresponds to one of the error codes, each of the error codes further corresponds to a flag value indicating whether the error code corresponds to the debugging information or the unnecessary debugging information, and before the step (D), the method further comprises the steps of:
(V) determining whether the first target error code has corresponding debugging information according to the flag value corresponding to the first target error code by the computer device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910730840.6A CN112346786B (en) | 2019-08-08 | 2019-08-08 | Debugging information recording method applied to startup stage and operation stage after startup |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910730840.6A CN112346786B (en) | 2019-08-08 | 2019-08-08 | Debugging information recording method applied to startup stage and operation stage after startup |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112346786A true CN112346786A (en) | 2021-02-09 |
| CN112346786B CN112346786B (en) | 2022-07-12 |
Family
ID=74366811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910730840.6A Active CN112346786B (en) | 2019-08-08 | 2019-08-08 | Debugging information recording method applied to startup stage and operation stage after startup |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112346786B (en) |
Citations (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1279427A (en) * | 1999-06-29 | 2001-01-10 | 神达电脑股份有限公司 | Error correcting system able to correct error of computer in shutdown state |
| CN1983179A (en) * | 2005-12-15 | 2007-06-20 | 英业达股份有限公司 | System and method for correcting fault of turn-on self-test |
| CN101231611A (en) * | 2007-01-26 | 2008-07-30 | 佛山市顺德区顺达电脑厂有限公司 | Apparatus for debugging computer system |
| CN101369240A (en) * | 2007-08-14 | 2009-02-18 | 戴尔产品有限公司 | System and method for managing memory errors in an information handling system |
| CN102023916A (en) * | 2009-09-10 | 2011-04-20 | 英业达股份有限公司 | Computer system detection method |
| CN102467897A (en) * | 2010-11-04 | 2012-05-23 | 冠捷投资有限公司 | Debugging circuit and method and debugging display device |
| CN102541702A (en) * | 2010-12-30 | 2012-07-04 | 精英电脑股份有限公司 | Test method for automatically restarting mainboard and recording debugging datum as well as restarting device of mainboard |
| CN102760090A (en) * | 2011-04-27 | 2012-10-31 | 纬创资通股份有限公司 | Debugging method and computer system |
| US20140115310A1 (en) * | 2012-10-19 | 2014-04-24 | Oracle International Corporation | Method and apparatus for graceless reboot |
| US20150261544A1 (en) * | 2013-03-15 | 2015-09-17 | Alvin Anonuevo Manlapat | Embedded System Boot from a Storage Device |
| EP2947565A2 (en) * | 2014-04-10 | 2015-11-25 | Fujitsu Ltd. | Function extension method and terminal device |
| WO2015196365A1 (en) * | 2014-06-24 | 2015-12-30 | 华为技术有限公司 | Fault processing method, related device and computer |
| US20180067751A1 (en) * | 2016-09-08 | 2018-03-08 | Hewlett-Packard Development Company, L.P. | Mass storage medium having an operating system but not a partition table pre-installed |
| US20180088963A1 (en) * | 2016-09-29 | 2018-03-29 | Verizon Patent And Licensing Inc. | Software upgrade and disaster recovery on a computing device |
| WO2018103185A1 (en) * | 2016-12-05 | 2018-06-14 | 华为技术有限公司 | Fault processing method, computer system, baseboard management controller and system |
| WO2018106517A1 (en) * | 2016-12-07 | 2018-06-14 | Microsoft Technology Licensing, Llc | Optimized power transitions based on user or platform conditions |
| TW201821990A (en) * | 2016-12-14 | 2018-06-16 | 英業達股份有限公司 | Computer system and detection method |
| US20180293061A1 (en) * | 2017-04-05 | 2018-10-11 | Dell Products, Lp | System and method for automatically managing updated uefi variables |
| US20180350321A1 (en) * | 2016-08-12 | 2018-12-06 | Boe Technology Group Co., Ltd. | Electronic apparatus and driving method thereof |
| CN109815043A (en) * | 2019-01-25 | 2019-05-28 | 华为技术有限公司 | Fault handling method, relevant device and computer storage medium |
-
2019
- 2019-08-08 CN CN201910730840.6A patent/CN112346786B/en active Active
Patent Citations (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1279427A (en) * | 1999-06-29 | 2001-01-10 | 神达电脑股份有限公司 | Error correcting system able to correct error of computer in shutdown state |
| CN1983179A (en) * | 2005-12-15 | 2007-06-20 | 英业达股份有限公司 | System and method for correcting fault of turn-on self-test |
| CN101231611A (en) * | 2007-01-26 | 2008-07-30 | 佛山市顺德区顺达电脑厂有限公司 | Apparatus for debugging computer system |
| CN101369240A (en) * | 2007-08-14 | 2009-02-18 | 戴尔产品有限公司 | System and method for managing memory errors in an information handling system |
| CN102023916A (en) * | 2009-09-10 | 2011-04-20 | 英业达股份有限公司 | Computer system detection method |
| CN102467897A (en) * | 2010-11-04 | 2012-05-23 | 冠捷投资有限公司 | Debugging circuit and method and debugging display device |
| CN102541702A (en) * | 2010-12-30 | 2012-07-04 | 精英电脑股份有限公司 | Test method for automatically restarting mainboard and recording debugging datum as well as restarting device of mainboard |
| CN102760090A (en) * | 2011-04-27 | 2012-10-31 | 纬创资通股份有限公司 | Debugging method and computer system |
| US20140115310A1 (en) * | 2012-10-19 | 2014-04-24 | Oracle International Corporation | Method and apparatus for graceless reboot |
| US20150261544A1 (en) * | 2013-03-15 | 2015-09-17 | Alvin Anonuevo Manlapat | Embedded System Boot from a Storage Device |
| EP2947565A2 (en) * | 2014-04-10 | 2015-11-25 | Fujitsu Ltd. | Function extension method and terminal device |
| WO2015196365A1 (en) * | 2014-06-24 | 2015-12-30 | 华为技术有限公司 | Fault processing method, related device and computer |
| US20180350321A1 (en) * | 2016-08-12 | 2018-12-06 | Boe Technology Group Co., Ltd. | Electronic apparatus and driving method thereof |
| US20180067751A1 (en) * | 2016-09-08 | 2018-03-08 | Hewlett-Packard Development Company, L.P. | Mass storage medium having an operating system but not a partition table pre-installed |
| US20180088963A1 (en) * | 2016-09-29 | 2018-03-29 | Verizon Patent And Licensing Inc. | Software upgrade and disaster recovery on a computing device |
| WO2018103185A1 (en) * | 2016-12-05 | 2018-06-14 | 华为技术有限公司 | Fault processing method, computer system, baseboard management controller and system |
| WO2018106517A1 (en) * | 2016-12-07 | 2018-06-14 | Microsoft Technology Licensing, Llc | Optimized power transitions based on user or platform conditions |
| TW201821990A (en) * | 2016-12-14 | 2018-06-16 | 英業達股份有限公司 | Computer system and detection method |
| US20180293061A1 (en) * | 2017-04-05 | 2018-10-11 | Dell Products, Lp | System and method for automatically managing updated uefi variables |
| CN109815043A (en) * | 2019-01-25 | 2019-05-28 | 华为技术有限公司 | Fault handling method, relevant device and computer storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112346786B (en) | 2022-07-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10139876B2 (en) | Efficient reboot of an operating system executed in a virtual machine | |
| US10365961B2 (en) | Information handling system pre-boot fault management | |
| EP3690653A1 (en) | Bios recovery and update | |
| KR101143679B1 (en) | Automated firmware recovery | |
| JPH05173808A (en) | Diagnostic system for personal computer and interface | |
| CN114168222B (en) | Method and device for acquiring time consumption during starting, terminal equipment and storage medium | |
| US10586048B2 (en) | Efficient reboot of an operating system | |
| CN116932010B (en) | System firmware upgrading method, device and server | |
| CN113138791A (en) | Upgrade processing method and device based on embedded system and electronic equipment | |
| CN110688173B (en) | Positioning method and device of components in cross-platform interface framework and electronic equipment | |
| TW201716999A (en) | Method for startup inspection and computer system using the same | |
| CN113377586B (en) | Automatic detection method and device for server and storage medium | |
| US20030046524A1 (en) | Method for dynamically designating initialization modules as recovery code | |
| CN112346786B (en) | Debugging information recording method applied to startup stage and operation stage after startup | |
| TWI709082B (en) | Recording method for debug messages of bios in a boot phase and a post-boot operation phase | |
| US9740592B2 (en) | Supporting debugging of program and graphical user interface for supporting debugging | |
| CN110955566A (en) | Debugging method | |
| CN114518885A (en) | Information collection method and device, electronic equipment and storage medium | |
| JP2001331342A (en) | Method for displaying information processor error and recording medium with error display program recorded thereon | |
| US10216525B1 (en) | Virtual disk carousel | |
| CN111382009B (en) | Automatic system maintenance method and computer equipment with automatic maintenance function | |
| CN109032880B (en) | Hardware debugging method and device cooperating with BIOS self-test | |
| CN114579388A (en) | Vehicle-mounted system state monitoring method and system, storage medium and electronic equipment | |
| CN114153503A (en) | BIOS control method, device and medium | |
| US11836048B2 (en) | Information processing apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |