CN112331713A

CN112331713A - Array substrate, display panel and display device

Info

Publication number: CN112331713A
Application number: CN202011289582.1A
Authority: CN
Inventors: 许亚军; 周小康
Original assignee: Kunshan New Flat Panel Display Technology Center Co Ltd
Current assignee: Kunshan New Flat Panel Display Technology Center Co Ltd
Priority date: 2020-11-17
Filing date: 2020-11-17
Publication date: 2021-02-05

Abstract

The application relates to an array substrate, and contain array substrate's display panel and display device, array substrate includes base plate, drive circuit layer, light energy adjustment layer and the first electrode layer of range upon range of setting from bottom to top, wherein, light energy adjustment layer is used for reducing certainly first electrode layer top is shone the energy of drive circuit layer light. The array substrate be in first electrode layer with set up between the drive circuit layer light energy control layer under the prerequisite that does not reduce the light rate of passing, light energy control layer will certainly first electrode layer top is shone the energy of drive circuit layer light reduces, makes to shine the light energy on drive circuit layer is lower, and then can reduce the photocarrier concentration to the reduction is to the drive circuit layer, and TFT circuit's influence has promptly guaranteed TFT job stabilization nature, can not influence the stability of some screen pictures.

Description

Array substrate, display panel and display device

Technical Field

The invention relates to the technical field of display, in particular to an array substrate, a display panel and a display device.

Background

An Active Matrix (AM) driving technique is a display driving technique in which a Thin Film Transistor (TFT) array is used to control each pixel to emit light, and in an AM-driven display panel, each pixel operates independently and is driven continuously, and thus, the AM-driven display panel has the advantages of low driving voltage, low power consumption, long service life, and the like.

However, with the application of technologies such as transparent display and off-screen fingerprint, the display panel starts to have higher transmittance, which causes the TFT to be affected by the external environment and the light emission of the display panel. The thin film transistor can generate photon-generated carriers after being illuminated, so that the threshold voltage and the carrier mobility of the thin film transistor are influenced, and the working stability of the thin film transistor is influenced.

Disclosure of Invention

In view of the above, the present disclosure provides an array substrate, a display panel and a display device, which can reduce the influence of light on the TFT and improve the display stability.

An array substrate comprises a substrate, a driving circuit layer, a light energy adjusting layer and a first electrode layer which are stacked from bottom to top,

the light energy adjusting layer is used for reducing the energy of light irradiated to the driving circuit layer from the upper part of the first electrode layer.

Preferably, the light energy adjusting layer is a fluorescence conversion layer.

Preferably, the fluorescence conversion layer is a red fluorescence conversion layer.

Preferably, the array substrate further includes a planarization layer disposed between the driving circuit layer and the first electrode layer.

Preferably, the planarization layer includes a first planarization layer and a second planarization layer which are stacked,

the light energy adjusting layer is arranged between the first planarization layer and the second planarization layer.

Preferably, a first via hole is arranged on the first planarization layer, a second via hole is arranged on the second planarization layer, orthographic projections of the first via hole and the second via hole on the substrate are overlapped,

the driving circuit layer is connected with the first electrode layer through metal sections which sequentially penetrate through the first via hole and the second via hole.

Preferably, the light energy adjusting layer and the orthographic projection of the first via hole or the second via hole on the substrate are complementary.

The application also provides a display panel, which comprises the array substrate.

Preferably, the display panel further includes:

the light emitting layer is arranged on the array substrate;

and the second electrode layer is arranged on the luminous layer.

The application provides a display device, which comprises the display panel.

Preferably, the display device further comprises an under-screen photosensitive element,

wherein the under-screen photosensitive element is disposed below the display panel.

Preferably, the under-screen photosensitive element is an under-screen fingerprint identification module.

The application provides an array substrate, and contain array substrate's display panel and display device, array substrate at first electrode layer with set up between the drive circuit layer light energy regulation layer, light energy regulation layer will certainly under the prerequisite that does not reduce the light rate of passing the first electrode layer top is shone the energy of drive circuit layer light reduces, makes and shines the light energy of drive circuit layer is lower, and then can reduce the photocarrier concentration to the reduction is to the drive circuit layer, and TFT circuit's influence has guaranteed TFT job stabilization nature, can not influence the stability of some screen pictures.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of a display device according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of an array substrate according to another embodiment of the present disclosure;

fig. 5 is another schematic structural diagram of an array substrate according to another embodiment of the present disclosure;

fig. 6 is a schematic view illustrating a method for manufacturing an array substrate according to an embodiment of the present disclosure;

fig. 7 is a schematic view illustrating another method for manufacturing an array substrate according to an embodiment of the present disclosure;

fig. 8 is a schematic view illustrating another manufacturing method of an array substrate according to an embodiment of the present disclosure.

Description of reference numerals:

100-a substrate;

200-a driving circuit layer;

300-a light energy adjusting layer;

400-a first electrode layer;

500-a planarization layer; 510-a first planarizing layer; 520-a second planarizing layer;

600-a light emitting layer;

700-a second electrode layer;

800-a photosensitive element under a screen;

910-an encapsulation layer; 920-cover plate layer.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are not to be considered limiting of the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and the like as used herein are for illustrative purposes only and do not denote a unique embodiment.

The OLED display device provides current signals to drive the OLED pixels to emit light through the array circuit, and the array circuit outputs stable current through the saturation region of the Thin Film Transistor (TFT). However, in the course of research, the inventors found that, due to the application of technologies such as fingerprint recognition under the screen, not all the OLED film and the array film are shielded by low-transmittance materials such as metal. Therefore, there is a phenomenon that external light and/or OLED itself emits light to be irradiated to the TFT. Due to the special properties of the semiconductor material, light irradiation on the semiconductor material can generate photon-generated carriers, so that when external light and/or OLED emits light to irradiate the thin film transistor, the thin film transistor can generate the photon-generated carriers, and then the mobility of the carriers and the threshold voltage of the TFT are influenced, so that the working current is influenced, the TFT is unstable in working, and the stability of a point screen picture is influenced.

Therefore, it is an urgent need to solve the above-mentioned problems by those skilled in the art if the influence of light on the TFT can be reduced while ensuring high transmittance of the display device, and the stability of the operation of the TFT can be ensured.

In order to solve the above problems, the present application is proposed to reduce the influence of light on the TFT and ensure high transmittance of the display panel.

The application provides an array substrate which can be applied to a display panel. The Display panel may be a Display panel such as an Organic Light Emitting Diode (OLED) Display panel or a Liquid Crystal Display (LCD) panel, or may be a Display panel using a Light Emitting Diode (LED) device, for example, a Micro-LED Display panel.

Specifically, the array substrate comprises a substrate 100, a driving circuit layer 200, a light energy adjusting layer 300 and a first electrode layer 400 which are stacked from bottom to top,

the light energy adjusting layer 300 is used for reducing the energy of the light irradiated from the top of the first electrode layer 400 to the driving circuit layer 200.

The light energy adjusting layer is a fluorescence conversion layer.

Wherein the fluorescence conversion layer is a red fluorescence conversion layer.

In this embodiment, the array substrate may further include a planarization layer 500, and the planarization layer 500 is disposed between the driving circuit layer 200 and the first electrode layer 400.

Wherein the planarization layer 500 includes a first planarization layer 510 and a second planarization layer 520,

the light energy adjusting layer 300 is disposed between the first and second planarizing layers 510 and 520.

Wherein a first via hole is formed on the first planarization layer 510, a second via hole is formed on the second planarization layer 520, orthographic projections of the first via hole and the second via hole on the substrate 100 are overlapped,

the driving circuit layer 200 and the first electrode layer 400 are connected by metal segments sequentially penetrating through the first via hole and the second via hole.

Wherein the light energy adjusting layer 300 and the orthographic projection of the first via or the second via on the substrate 100 are complementary.

The application also provides a display panel which comprises the array substrate.

Wherein the display panel further comprises:

a light emitting layer 600 disposed on the array substrate;

and a second electrode layer 700 disposed on the light emitting layer 600.

A display device comprises the display panel.

The display device in the scheme further comprises a photosensitive element 800 under the screen, wherein the photosensitive element 800 under the screen is arranged below the display panel.

The photosensitive element 800 is a fingerprint recognition module under the screen.

The array substrate, the display panel and the display device according to the embodiments of the present invention may be presented in various forms, and some examples of the present invention will be described in detail below with reference to the accompanying drawings.

Example 1

Referring to fig. 1, fig. 1 is a schematic structural diagram of an array substrate provided in this embodiment, and the schematic structural diagram shows a cross-sectional structure of the array substrate. The array substrate includes a substrate 100, a driving circuit layer 200, a light energy adjusting layer 300, and a first electrode layer 400 stacked from bottom to top. The light energy adjusting layer 300 is used for reducing the energy of the light irradiated from the top of the first electrode layer 400 to the driving circuit layer 200. The present embodiment is described by taking the array substrate 100 as an array substrate of an OLED display panel as an example.

With the increasing requirements of people on display panels, comprehensive screens are produced. In order to realize full-screen display, that is, to realize full display on the surface of a display panel, a fingerprint identification area (FOD) is usually arranged in a screen of the existing display device, and light reflected by a fingerprint is collected by a fingerprint identification module to unlock the screen. Therefore, the fingerprint identification area requires high light transmittance. When the fingerprint identification function is started, when external light passes through the display panel and is collected by the photosensitive element under the screen, the external light can also irradiate on the driving circuit layer of the array substrate of the display panel, so that the work of the TFT is unstable, and the stability of a point screen picture is influenced.

And the array substrate stated in this embodiment at first electrode layer 400 with set up between the drive circuit layer 400 light energy regulation layer 300, light energy regulation layer 300 will certainly under the prerequisite that does not reduce the light rate of passing under the first electrode layer 400 top shines the energy of drive circuit layer 200 light reduces, makes to shine the light energy of drive circuit layer 200 is lower, and then can reduce the photon-generated carrier concentration to reduce the drive circuit layer, the influence of TFT circuit promptly, guaranteed the stability of TFT work, can not influence the stability of some screen pictures.

It should be noted that the substrate 100 is a transparent layer, which facilitates light to pass through. In some alternative embodiments, the substrate 100 may be an organic layer such as a Polyimide (PI) layer, an inorganic layer such as a silicon oxide (SiO) layer or a silicon nitride (SiN) layer, or a combination of the above organic and inorganic layers. Optionally, the substrate 100 may further include a buffer layer, and the buffer layer may have a single-layer structure or a structure including at least two layers.

The driving circuit layer 200 is disposed on the substrate 100, and the driving circuit layer 200 includes a plurality of transistors T1. The Transistor T1 is a Thin Film Transistor (TFT) including an active layer and a gate electrode G1 on the active layer AT1, and the gate electrode G1 is insulated from the active layer AT1 by a gate insulating layer. Wherein the active layer AT1 may include a source region S1 and a drain region D1 oppositely disposed, and the active layer AT1 has a channel CH1 between the source region S1 and the drain region D1 for conducting electricity when an on-voltage is applied to the gate G1. When light above the driver circuit layer is irradiated like light below the driver circuit layer, the transistor T1 is easily irradiated. When the channel CH1 of the transistor T1 is irradiated by light, photo leakage current is easily generated.

In this embodiment, the light energy adjusting layer 300 is disposed on the driving circuit layer 200, and the light energy adjusting layer 200 is used to reduce the energy of the light irradiated from the top of the first electrode layer 400 to the driving circuit layer 200, so as to reduce the energy of the transistor T1 irradiated by the light from the top of the driving circuit layer 200, reduce the photo leakage current of the transistor T1, and alleviate the local unevenness of brightness and darkness of the display screen.

It should be noted that, when the array substrate is used in a display panel and a display device, since the light energy adjustment layer 300 can reduce the energy of the transistor T1 irradiated by the light from above the driving circuit layer 200, the light from above the driving circuit layer 200 is not limited to the external light, and may also be the light emitted by the display panel itself.

In this embodiment, the light energy adjusting layer may be a filter layer, and optionally, the filter layer is a red filter layer. The light energy adjusting layer 300 may also be a fluorescent conversion layer, and the fluorescent conversion layer reduces the energy of the light irradiated to the driving circuit layer 200 through the conversion of the light. Optionally, the fluorescence conversion layer is a red fluorescence conversion layer. The wavelength of the red light is longer than that of the green light and the blue light, the energy of the red light is the lowest among the three-color light, and when the external white light and the RGB monochromatic light emitted by the OLED penetrate through the red light fluorescence conversion layer to be converted into the red light, the energy of the light can be greatly reduced, so that the generation of photon-generated carriers is reduced. Meanwhile, the size of the gap which can be penetrated by light in the OLED device is micrometer, so that the longer the wavelength is, the stronger the diffraction is, the stronger the penetrating power of the light is, and therefore, the penetrating power of red light is stronger than that of green light and blue light. Therefore, after the red light fluorescence conversion layer is added in the array substrate, the transmittance of light rays cannot be weakened, the transmittance can be increased, and the identification of fingerprints under the screen is facilitated. It should be noted that the red light fluorescence conversion layer may be an existing film layer of the array substrate, and specifically, the planarization layer in the array substrate may be made into the red light fluorescence conversion layer. Of course, the red-light fluorescence conversion layer may also be a newly added film layer in the array substrate, and is not limited in this embodiment.

Referring to fig. 2, fig. 2 is a schematic structural diagram of a display panel according to the present embodiment, and the schematic structural diagram shows a cross-sectional structure of the display panel. The display panel comprises the array substrate, wherein the array substrate comprises a substrate 100, a driving circuit layer 200 and a light ray energy adjusting layer 300 which are stacked from bottom to top, and optionally, the array substrate further comprises a first electrode layer 400 arranged above the light ray energy adjusting layer 300. The light energy adjusting layer 300 is used to reduce the energy of the light irradiated from the top of the first electrode layer 400 to the driving circuit layer 200.

In the present embodiment, the display panel is an OLED display panel. Optionally, the display panel further includes a light emitting layer 600 and a second electrode layer 700. The light emitting layer 600 is disposed on the array substrate, that is, on the first electrode layer 400; and a second electrode layer 700 disposed on the light emitting layer 600. The first electrode layer 400 may be a cathode layer or an anode layer, and in this embodiment, the first electrode layer 400 is described as an example of an anode layer. The second electrode layer 700 may be a cathode layer or an anode layer, and in this embodiment, the second electrode layer 700 is described as an example of a cathode layer.

Optionally, the display panel further includes a package layer 910 and a cover plate 920 stacked and disposed above the second electrode layer 700. Specifically, the encapsulation layer 910 is located above the second electrode layer 700, that is, the encapsulation layer 910 is located on a side of the second electrode layer 700 facing away from the light-emitting layer 600. The cover plate 920 is located above the encapsulation layer 910, that is, the cover plate 920 is located on a side of the encapsulation layer 910 facing away from the second electrode layer 700.

The display panel of this embodiment under the prerequisite that does not reduce the light rate of passing, will certainly first electrode layer 400 top is shone the energy of drive circuit layer 200 light reduces, makes to shine the light energy of drive circuit layer 200 is lower, and then can reduce the photocarrier concentration to the reduction is to the drive circuit layer, the stability of TFT work has been guaranteed, can not influence the stability of some screen pictures promptly to the influence of TFT circuit.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a display device according to the present embodiment, and the schematic structural diagram shows a cross-sectional structure of the display device. The display device comprises the display panel. In the present embodiment, the display panel is an OLED display panel. The display panel includes an array substrate, a light emitting layer 400 and a second electrode layer 700 stacked from bottom to top. Specifically, the array substrate includes a substrate 100, a driving circuit layer 200, and a light energy adjustment layer 300 stacked from bottom to top, and optionally, the array substrate further includes a first electrode layer 400 disposed above the light energy adjustment layer 300. The light energy adjusting layer 300 is used to reduce the energy of the light irradiated from the top of the first electrode layer 400 to the driving circuit layer 200.

Optionally, the display device further includes a photosensitive element 800 under the screen, and the photosensitive element 800 under the screen is disposed below the display panel. Light above the display device, that is, external light, passes through the display panel to be irradiated to the photosensitive element 800 under the screen, and is recognized or collected by the photosensitive element 800 under the screen, so that the fingerprint recognition function under the screen is completed.

It should be noted that the under-screen photosensitive element 800 may be an optical fingerprint recognition module, and is used for implementing fingerprint recognition. In other embodiments, the photosensitive element 800 under the screen of the photosensitive module 90 may be an image capturing device, a light sensor, or other photosensitive devices, or may be a combination of the above photosensitive devices.

The display device of this embodiment will certainly under the prerequisite that does not reduce the light rate of passing under the first electrode layer 400 top is shone the energy of drive circuit layer 200 light reduces, makes to shine the light energy of drive circuit layer 200 is lower, and then can reduce the photocarrier concentration to the influence of reduction to the drive circuit layer, TFT circuit promptly has guaranteed TFT job stabilization nature, can not influence the stability of some screen pictures.

Example 2

Referring to fig. 4, fig. 4 is a schematic structural diagram of an array substrate provided in the present embodiment, and the schematic structural diagram shows a cross-sectional structure of the array substrate. The array substrate comprises a substrate 100, a driving circuit layer 200, a light ray energy adjusting layer 300 and a first electrode layer 400 which are stacked from bottom to top, wherein the light ray energy adjusting layer 300 is used for reducing the energy of light rays irradiated to the driving circuit layer 200 from the top of the first electrode layer 400. The present embodiment is described by taking the array substrate 100 as an array substrate of an OLED display panel as an example. The structure of the array substrate in this embodiment is the same as that of the array substrate in embodiment 1, and the differences between the two will be described below, and the details of the same parts will not be described.

In this embodiment, the array substrate further includes: a planarization layer 500 disposed between the driving circuit layer 200 and the first electrode layer 400. Note that the upper and lower positions between the light energy adjusting layer 300 and the planarization layer 500 are not limited as long as the flatness of the first electrode layer 400 is ensured. Specifically, the light energy adjustment layer 300 may be disposed above the planarization layer 500, may be disposed below the planarization layer 600, and may be disposed in the middle of the planarization layer 500.

The following description will be made with the light energy layer 300 disposed in the middle of the planarization layer 500.

Referring to fig. 5, optionally, the planarization layer 500 includes a first planarization layer 510 and a second planarization layer 520 stacked, and the light energy adjustment layer 300 is disposed between the first planarization layer 510 and the second planarization layer 520.

The first planarizing layer 510 is provided with a first via hole, the second planarizing layer 520 is provided with a second via hole, the first via hole and the second via hole are overlapped in an orthographic projection on the substrate 100, and the driving circuit layer 200 is connected with the first electrode layer 400 through metal sections sequentially penetrating through the first via hole and the second via hole.

It should be noted that the light energy adjusting layer 300 and the orthographic projection of the first via or the second via on the substrate 100 are complementary. Namely: the orthographic projections of the light energy adjusting layer 300 and the first via hole or the second via hole on the substrate 100 are not overlapped, so that a metal segment is formed in the first via hole and the second via hole in the deposition process of the first electrode layer 400, and the first electrode layer 400 is connected with the driving circuit layer 200.

Although the above description is made with the light energy adjusting layer 300 disposed in the middle of the planarization layer 500, the number and the positions of the first and second planarization layers 510 and 520 and the light energy adjusting layer 300 may not be limited to the above illustration. Alternatively, the number of the light energy adjusting layers 300 may be two layers, three layers, or the like, the first planarizing layer 510 and the second planarizing layer 520 may also be two layers, three layers, or the like, each layer of the light energy adjusting layer 300 may be located between any adjacent first planarizing layer 510 and second planarizing layer 520, may be located on a side of the planarizing layer 500 facing the first electrode layer 400, or may be located on a side of the planarizing layer 500 facing the driving circuit layer 300, as long as the light energy adjusting layer 300 is located between the first electrode layer 400 and the driving circuit layer 200.

Referring to fig. 6, fig. 6 is a schematic view illustrating a manufacturing method of an array substrate according to the present embodiment. Specifically, the preparation method of the array substrate comprises the following steps:

s1: fabricating the driving circuit layer 200 on the substrate 100;

s2: preparing the planarization layer 500 on the driving circuit layer 200;

s3: exposing and developing the planarization layer 500 to form a via hole;

s4: a light energy adjusting layer 300 is disposed on the planarization layer 500, specifically, the light energy adjusting layer 300 is disposed between adjacent via holes, that is, the light energy adjusting layer 300 and the orthogonal projections of the via holes on the substrate 100 do not overlap;

s5: depositing the first electrode layer 400 on the light energy adjusting layer 300, and depositing a metal segment in the via hole, wherein the metal segment connects the driving circuit layer 200 and the first electrode layer 400.

Referring to fig. 7, fig. 7 is a schematic view illustrating a method for fabricating an array substrate according to the present embodiment. Specifically, the preparation method of the array substrate comprises the following steps:

s1: fabricating the driving circuit layer 200 on the substrate 100;

s2: a light energy adjusting layer 300 is disposed on the driving circuit layer 200;

s3: preparing the planarization layer 500 on the light energy adjusting layer 300;

s4: exposing and developing the planarization layer 500 to form a via hole, wherein specifically, the light energy adjusting layer 300 and the orthographic projection of the via hole on the substrate 100 do not overlap;

s5: depositing the first electrode layer 400 on the planarization layer 500, and depositing a metal segment in the via hole, wherein the metal segment connects the driving circuit layer 200 and the first electrode layer 400.

Referring to fig. 8, fig. 8 is a schematic view illustrating a method for fabricating an array substrate according to the present embodiment. Specifically, the preparation method of the array substrate comprises the following steps:

s1: fabricating the driving circuit layer 200 on the substrate 100;

s2: preparing the first planarization layer 510 on the driving circuit layer 200;

s3: exposing and developing the first planarization layer 510 to form a first via hole;

s4: a light energy adjusting layer 300 is disposed on the first planarizing layer 510, specifically, the light energy adjusting layer 300 is disposed between first via holes, that is, the light energy adjusting layer 300 and the orthographic projection of the first via holes on the substrate 100 do not overlap;

s5: preparing the second planarization layer 520 on the light energy adjusting layer 300;

s6: exposing and developing the second planarization layer 520 to form a second via hole, wherein the orthographic projection of the first via hole and the orthographic projection of the second via hole on the substrate 100 are overlapped;

s7: depositing the first electrode layer 400 on the second planarization layer 520, and depositing a metal segment in the first via hole and the second via hole, wherein the metal segment connects the driving circuit layer 200 and the first electrode layer 400.

The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. An array substrate is characterized by comprising a substrate (100), a driving circuit layer (200), a light energy adjusting layer (300) and a first electrode layer (400) which are stacked from bottom to top,

the light energy adjusting layer (300) is used for reducing the energy of light irradiated to the driving circuit layer (200) from the upper side of the first electrode layer (400).

2. The array substrate of claim 1, wherein the light energy adjusting layer (300) is a fluorescence conversion layer,

3. The array substrate of claim 1 or 2, further comprising a planarization layer (500), the planarization layer (500) being disposed between the driving circuit layer (200) and the first electrode layer (400),

preferably, the planarization layer (500) comprises a first planarization layer (510) and a second planarization layer (520) which are arranged in a stacked manner,

the light energy adjustment layer (300) is disposed between the first planarization layer (510) and the second planarization layer (520).

4. The array substrate of claim 3, wherein a first via is disposed on the first planarization layer (510), a second via is disposed on the second planarization layer (520), and the orthographic projection of the first via and the orthographic projection of the second via on the substrate (100) overlap,

the driving circuit layer (200) and the first electrode layer (400) are connected through metal sections which sequentially penetrate through the first through hole and the second through hole.

5. The array substrate of claim 4, wherein the light energy adjusting layer (300) and the orthographic projection of the first via or the second via on the substrate (100) are complementary.

6. A display panel comprising the array substrate according to any one of claims 1 to 5.

7. The display panel according to claim 6, characterized in that the display panel further comprises:

a light emitting layer (600) disposed on the array substrate;

a second electrode layer (700) disposed on the light emitting layer (600).

8. A display device characterized by comprising the display panel according to any one of claims 6 to 7.

9. The display device according to claim 8, further comprising an under-screen light-sensing element (800),

wherein the under-screen light sensing element (800) is disposed below the display panel.

10. The display device according to claim 9, wherein the under-screen light sensing element (800) is an under-screen fingerprint recognition module.