CN112328205B - Chaotic random number generator and generation method - Google Patents
Chaotic random number generator and generation method Download PDFInfo
- Publication number
- CN112328205B CN112328205B CN202011111156.9A CN202011111156A CN112328205B CN 112328205 B CN112328205 B CN 112328205B CN 202011111156 A CN202011111156 A CN 202011111156A CN 112328205 B CN112328205 B CN 112328205B
- Authority
- CN
- China
- Prior art keywords
- analog signal
- chaotic
- random number
- circuit
- dimensional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/588—Random number generators, i.e. based on natural stochastic processes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N7/00—Computing arrangements based on specific mathematical models
- G06N7/08—Computing arrangements based on specific mathematical models using chaos models or non-linear system models
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Artificial Intelligence (AREA)
- Algebra (AREA)
- Nonlinear Science (AREA)
- Data Mining & Analysis (AREA)
- Evolutionary Computation (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Software Systems (AREA)
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Abstract
The invention belongs to the technical field of information security of integrated circuits, and discloses a chaotic random number generator and a generation method, wherein the chaotic random number generator comprises: a random source generating circuit and a post-processing circuit; the random source generating circuit is used for generating a plurality of paths of initial random sources through a plurality of paths of chaotic random sources, digitalizing the plurality of paths of initial random sources, performing XOR superposition to generate initial random numbers and outputting the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units; and the post-processing circuit is used for outputting a final random number sequence after the initial random number is detected, operated and subjected to serial-parallel conversion. The invention can ensure the stability of the chaotic random number generator and the randomness of the output sequence.
Description
Technical Field
The invention belongs to the technical field of information security of integrated circuits, and particularly relates to a chaotic random number generator and a generation method.
Background
Along with the popularization of personal computers and networks, electronic commerce and electronic government have rapid development, meanwhile, the information security problem of electronic commerce and electronic government is more and more concerned by people, the security chip is widely applied in various fields of the information society, and the main functions of the security chip comprise the secure storage, encryption, decryption, identity identification and the like of key data of users. With the increasing support of the country to the information security industry, the security of the security chip needs to be protected in a grade. Random number generators are also becoming more and more critical as an integral part of security chips. The random number generator is the basis of encryption application and can be used for generating encryption keys with specified security requirements, resisting side channel attacks, producing initial vectors, randomly filling bits and other attacks.
Since pseudo-random numbers are themselves predictable, in information encryption applications, truly random numbers that are completely unpredictable must be employed to secure information. The unpredictability of the true random number is derived from an intrinsic random physical process, such as generation of the true random number by resistance thermal noise. With the development and perfection of the nonlinear theory, the chaotic behavior provides a new theoretical basis and an implementation method for the design of the true random number generator. At present, considering the possibility of implementation, a piecewise chaotic expression is usually selected as a chaotic mapping function, and the state space of the mapping function is divided to generate a binary discrete non-memory information source, so that the random number generated from the information source is theoretically guaranteed to be a true random number; the chaotic expression is shown below by pairing XnThe final 0, 1 random number sequence is generated by the symbol judgment of (1);
Xn+1＝BXn+A，Xn<0；
Xn+1＝BXn-A，Xn>＝0；
however, the random number generator based on the chaotic expression has poor stability of the circuit, and has constraint on the values of the coefficients a and B, and X existsn+1Value of (A) and XnThe values of the random sequence are all A or-A, the randomness of the sequence is seriously influenced, the chaotic system is saturated, and the randomness of the output sequence is seriously influenced, so that how to design a chaotic random number generator is a problem which needs to be solved at present to ensure the stability of the random number generator and the randomness of the output sequence.
Disclosure of Invention
The chaotic random number generator and the generating method are provided, and the stability of the chaotic random number generator and the randomness of the output sequence can be ensured.
In order to achieve the purpose, the invention adopts the following technical scheme:
a chaotic random number generator comprising: a random source generating circuit and a post-processing circuit;
the random source generating circuit is used for generating a plurality of paths of initial random sources through a plurality of paths of chaotic random sources, digitalizing the plurality of paths of initial random sources, performing XOR superposition to generate initial random numbers and outputting the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit is used for outputting a final random number sequence after the initial random number is detected, operated and subjected to serial-parallel conversion;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
Further, the two-dimensional chaotic mapping circuit includes: the device comprises a first chaotic self-healing unit, a second chaotic self-healing unit, a first multiplier, a second multiplier, a third multiplier, an adder, a reference circuit unit, a decision circuit and a coding output circuit;
the first chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
the second chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
the first multiplier is used for multiplying the analog signal X to obtain a new analog signal X (X);
the second multiplier is used for multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
the third multiplier is configured to multiply the new analog signal X to obtain another new analog signal X (-1.4) ×;
the adder is configured to perform addition operation on the new analog signal X output by the third multiplier and the analog signal Y output by the second chaotic self-healing unit to obtain a final analog signal X ═ 1+ (-1.4) X + Y;
the reference circuit unit is used for generating a reference power supply Vref1, and the value of Vref1 is C;
the decision circuit is used for comparing the final analog signal X with a value C of the reference power supply Vref 1;
and the coding output circuit is used for outputting a random number sequence according to the comparison result of the decision circuit.
Further, the decision circuit is specifically configured to:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
A chaotic random number generating method, comprising:
the random source generating circuit generates multiple paths of initial random sources through multiple paths of chaotic random sources, digitalizes the multiple paths of initial random sources, performs exclusive-or superposition to generate initial random numbers and outputs the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit detects, operates and carries on the serial-parallel conversion to the initial random number, output the final random number sequence;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
Further, the acquiring of the initial random source by the two-dimensional chaotic mapping circuit arranged in the chaotic mapping unit includes:
carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
multiplying the analog signal X to obtain a new analog signal X (X);
multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
multiplying the new analog signal X to obtain another new analog signal X (-1.4) X;
adding the new analog signal X and the analog signal Y to obtain a final analog signal X which is 1+ (-1.4) X + Y;
generating a reference power supply Vref1, wherein the value of Vref1 is C;
comparing the final analog signal X with a value C of the reference power Vref 1;
and outputting a random number sequence according to the comparison result.
Further, comparing the final analog signal X with the value C of the reference power Vref1 specifically includes:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
Compared with the prior art, the invention has the following beneficial effects:
(1) the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, and comprises: the method comprises the steps that a first chaotic self-healing unit, a second chaotic self-healing unit, a first multiplier, a second multiplier, a third multiplier, an adder, a reference circuit unit, a decision circuit and a coding output circuit are used, and 0 is output when a final analog signal X is larger than C by judging the position of a two-dimensional coordinate (X, Y) in a mapping plane; when the final analog signal X is less than C, 1 is output, the stability of the random number generator and the randomness of an output sequence are ensured, and the random number has the characteristics of high speed and high quality;
(2) the chaotic random source generating circuit generates multiple paths of initial random sources through multiple paths of chaotic random sources, digitalizes the multiple paths of initial random sources, performs exclusive-or superposition to generate initial random numbers and outputs the initial random numbers to the post-processing circuit; in practical application, the safety chip digitizes 8 independent chaotic random sources and then outputs the independent chaotic random sources in an exclusive or superposition manner, so that the integral information source entropy can be effectively increased;
(3) in practice, when the analog circuit is used for realizing a two-dimensional chaotic random number equation, due to process deviation, chaotic functions realized by the circuit on each IC are different, and initial states of each IC in power-on work are different, so that chaotic sequences output by each IC are different due to the two factors, and a true random number is formed;
(4) the chaotic self-healing unit has a chaotic self-healing mechanism, and when the chaotic self-healing unit detects that the chaotic random source generating circuit is separated from the chaotic region and can not be rotated reversely, the chaotic self-healing unit can reset the circuit to enable the circuit to reenter the chaotic region, so that the circuit failure caused by accidental conditions exceeding a noise protection boundary and malicious attacks is prevented, and the anti-interference capability of the system is improved;
(5) the chaotic random source adopts a chain type annular circuit structure and consists of a plurality of chaotic mapping units, and the number of the chaotic mapping units can be adjusted according to the requirement so as to improve the random number generation rate.
Drawings
FIG. 1 is a schematic diagram of a chaotic random number generator according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a two-dimensional chaotic mapping circuit in a chaotic random number generator according to an embodiment of the present invention;
fig. 3 is a block diagram of each chaotic source implementation of the chaotic random number generation method according to the embodiment of the present invention.
Detailed Description
The invention is further illustrated by the following examples in conjunction with the accompanying drawings:
as shown in fig. 1, a chaotic random number generator comprises: a random source generating circuit and a post-processing circuit;
the random source generating circuit is used for generating a plurality of paths of initial random sources through a plurality of paths of chaotic random sources, digitalizing the plurality of paths of initial random sources, performing XOR superposition to generate initial random numbers and outputting the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit is used for outputting a final random number sequence after the initial random number is detected, operated and subjected to serial-parallel conversion;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
As an implementable manner, in practical application, there are 8 chaotic random sources, each chaotic random source has four chaotic mapping units, the four chaotic mapping units are output by xor operation, and finally the 8 chaotic random sources are also output by xor operation, which is equivalent to 32 times of xor operation output, so that random number generation can be better performed, and randomness and unpredictability are improved.
Further, as shown in fig. 2, the two-dimensional chaotic mapping circuit includes: the device comprises a first chaotic self-healing unit, a second chaotic self-healing unit, a first multiplier, a second multiplier, a third multiplier, an adder, a reference circuit unit, a decision circuit and a coding output circuit;
the first chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
the second chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
the first multiplier is used for multiplying the analog signal X to obtain a new analog signal X (X);
the second multiplier is used for multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
the third multiplier is configured to multiply the new analog signal X to obtain another new analog signal X (-1.4) ×;
the adder is configured to perform addition operation on the new analog signal X output by the third multiplier and the analog signal Y output by the second chaotic self-healing unit to obtain a final analog signal X ═ 1+ (-1.4) X + Y;
the reference circuit unit is used for generating a reference power supply Vref1, and the value of Vref1 is C;
the decision circuit is used for comparing the final analog signal X with a value C of the reference power supply Vref 1;
and the coding output circuit is used for outputting a random number sequence according to the comparison result of the decision circuit.
Further, the decision circuit is specifically configured to:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
In practical application, the post-processing circuit comprises a poker self-checking unit, an operation and serial-parallel conversion circuit, a FIFO memory of 512B and an interface circuit. The poker self-checking unit is used for detecting whether random data generated by a random source is satisfactory or not. Here we take a random number of 512 bits for poker detection. When the self-checking is failed, the corresponding state bit is set, and an alarm is sent to the CPU. Otherwise, as long as the FIFO is not empty, a random number is generated and written into the FIFO. The operation and serial-parallel conversion circuit is composed of 8 independent random number generators, all of which participate in XOR to generate a random number bit stream, the random number bit stream is sent to the poker self-checking unit for detection, if the random number bit stream is correct, the random number bit stream is input into a serial-in and parallel-out shift register, and a working normal flag bit is set; if the error is found, the random number abnormal flag bit is set. In order to improve the efficiency, a FIFO of 512 bytes is used for data buffering.
On the basis of the above embodiment, the present invention also discloses a chaotic random number generating method, comprising:
the random source generating circuit generates multiple paths of initial random sources through multiple paths of chaotic random sources, digitalizes the multiple paths of initial random sources, performs exclusive-or superposition to generate initial random numbers and outputs the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit detects, operates and carries on the serial-parallel conversion to the initial random number, output the final random number sequence;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
As an implementable manner, in practical application, there are 8 chaos random sources, each of which is implemented as a block diagram as shown in fig. 3, and a chain-type loop circuit structure is adopted, which is composed of a chaos mapping unit and a chaos self-healing unit, and the number of the chaos mapping unit can be adjusted as required to increase the random number generation rate. In addition, because of forming a ring shape, each route of chaotic random source is composed of four mapping units and a chaotic self-healing unit. It is worth to be noted that adding the chaotic self-healing unit in each path of chaotic random source is equivalent to adding one more layer of guarantee, and the random sequence output by the chaotic mapping unit is detected or not set, and can be selected according to actual conditions.
Further, the acquiring of the initial random source by the two-dimensional chaotic mapping circuit arranged in the chaotic mapping unit includes:
carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
multiplying the analog signal X to obtain a new analog signal X (X);
multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
multiplying the new analog signal X to obtain another new analog signal X (-1.4) X;
adding the new analog signal X and the analog signal Y to obtain a final analog signal X which is 1+ (-1.4) X + Y;
generating a reference power supply Vref1, wherein the value of Vref1 is C;
comparing the final analog signal X with a value C of the reference power Vref 1;
and outputting a random number sequence according to the comparison result.
Further, comparing the final analog signal X with the value C of the reference power Vref1 specifically includes:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
To sum up:
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, and comprises: the three-dimensional chaotic signal processing circuit comprises a first chaotic self-healing unit, a second chaotic self-healing unit, a first multiplier, a second multiplier, a third multiplier, an adder, a reference circuit unit, a decision circuit and a coding output circuit, wherein 0 is output when a final analog signal X is larger than C by judging the position of a two-dimensional coordinate (X, Y) in a three-dimensional space; when the final analog signal X is less than C, 1 is output, the stability of the random number generator and the randomness of an output sequence are ensured, and the random number has the characteristics of high speed and high quality;
the chaotic random source generating circuit generates multiple paths of initial random sources through multiple paths of chaotic random sources, digitalizes the multiple paths of initial random sources, performs exclusive-or superposition to generate initial random numbers and outputs the initial random numbers to the post-processing circuit; in practical application, the safety chip digitizes 8 independent chaotic random sources and then outputs the independent chaotic random sources in an exclusive or superposition manner, so that the integral information source entropy can be effectively increased;
in practice, when the analog circuit is used for realizing a two-dimensional chaotic random number equation, due to process deviation, chaotic functions realized by the circuit on each IC are different, and initial states of each IC in power-on work are different, so that chaotic sequences output by each IC are different due to the two factors, and a true random number is formed;
the chaotic self-healing unit has a chaotic self-healing mechanism, and when the chaotic self-healing unit detects that the chaotic random source generating circuit is separated from the chaotic region and can not be rotated reversely, the chaotic self-healing unit can reset the circuit to enable the circuit to reenter the chaotic region, so that the circuit failure caused by accidental conditions exceeding a noise protection boundary and malicious attacks is prevented, and the anti-interference capability of the system is improved;
the chaotic random source adopts a chain type annular circuit structure and consists of a plurality of chaotic mapping units, and the number of the chaotic mapping units can be adjusted according to the requirement so as to improve the random number generation rate.
The above shows only the preferred embodiments of the present invention, and it should be noted that it is obvious to those skilled in the art that various modifications and improvements can be made without departing from the principle of the present invention, and these modifications and improvements should also be considered as the protection scope of the present invention.
Claims (6)
1. A chaotic random number generator, comprising: a random source generating circuit and a post-processing circuit;
the random source generating circuit is used for generating a plurality of paths of initial random sources through a plurality of paths of chaotic random sources, digitalizing the plurality of paths of initial random sources, performing XOR superposition to generate initial random numbers and outputting the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit is used for outputting a final random number sequence after the initial random number is detected, operated and subjected to serial-parallel conversion;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
2. The chaotic random number generator of claim 1, wherein the two-dimensional chaotic mapping circuit comprises: the device comprises a first chaotic self-healing unit, a second chaotic self-healing unit, a first multiplier, a second multiplier, a third multiplier, an adder, a reference circuit unit, a decision circuit and a coding output circuit;
the first chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
the second chaotic self-healing unit is used for carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
the first multiplier is used for multiplying the analog signal X to obtain a new analog signal X (X);
the second multiplier is used for multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
the third multiplier is configured to multiply the new analog signal X to obtain another new analog signal X (-1.4) ×;
the adder is configured to perform addition operation on the new analog signal X output by the third multiplier and the analog signal Y output by the second chaotic self-healing unit to obtain a final analog signal X ═ 1+ (-1.4) X + Y;
the reference circuit unit is used for generating a reference power supply Vref1, and the value of Vref1 is C;
the decision circuit is used for comparing the final analog signal X with a value C of the reference power supply Vref 1;
and the coding output circuit is used for outputting a random number sequence according to the comparison result of the decision circuit.
3. The chaotic random number generator of claim 2, wherein the decision circuit is specifically configured to:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
4. A chaotic random number generating method, comprising:
the random source generating circuit generates multiple paths of initial random sources through multiple paths of chaotic random sources, digitalizes the multiple paths of initial random sources, performs exclusive-or superposition to generate initial random numbers and outputs the initial random numbers to the post-processing circuit; each chaotic source at least comprises a plurality of chaotic mapping units, a chain type annular circuit structure is adopted, and a path of initial random source is obtained through a two-dimensional chaotic mapping circuit arranged in the chaotic mapping units;
the post-processing circuit detects, operates and carries on the serial-parallel conversion to the initial random number, output the final random number sequence;
the two-dimensional chaotic mapping circuit is realized based on a two-dimensional chaotic random number equation, wherein the two-dimensional chaotic random number equation is as follows:
wherein, XnThe nth iteration value, X, of the two-dimensional chaotic random number equation to the analog signal Mn+1The (n + 1) th iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal MnThe nth iteration value, Y, of the two-dimensional chaotic random number equation to the analog signal Nn+1And (4) an (N + 1) th iteration value of the two-dimensional chaotic random number equation to the analog signal N.
5. The method for generating chaotic random numbers according to claim 4, wherein the obtaining of one path of initial random source through a two-dimensional chaotic mapping circuit arranged in a chaotic mapping unit comprises:
carrying out self-healing detection on the received analog signal M and outputting an analog signal X;
carrying out self-healing detection on the received analog signal N and outputting an analog signal Y;
multiplying the analog signal X to obtain a new analog signal X (X);
multiplying the analog signal X to obtain a new analog signal Y which is 0.3X;
multiplying the new analog signal X to obtain another new analog signal X (-1.4) X;
adding the new analog signal X and the analog signal Y to obtain a final analog signal X which is 1+ (-1.4) X + Y;
generating a reference power supply Vref1, wherein the value of Vref1 is C;
comparing the final analog signal X with a value C of the reference power Vref 1;
and outputting a random number sequence according to the comparison result.
6. The method for generating the chaotic random number according to claim 5, wherein comparing the final analog signal X with the value C of the reference power Vref1 specifically comprises:
judging the position of a two-dimensional coordinate (X, Y) in a mapping plane, wherein X is a final analog signal, Y is an analog signal output by the second chaotic self-healing unit, and when the final analog signal X is greater than C, 0 is output; when the final analog signal X < C, 1 is output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011111156.9A CN112328205B (en) | 2020-10-16 | 2020-10-16 | Chaotic random number generator and generation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011111156.9A CN112328205B (en) | 2020-10-16 | 2020-10-16 | Chaotic random number generator and generation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112328205A CN112328205A (en) | 2021-02-05 |
| CN112328205B true CN112328205B (en) | 2022-02-22 |
Family
ID=74313960
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011111156.9A Active CN112328205B (en) | 2020-10-16 | 2020-10-16 | Chaotic random number generator and generation method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112328205B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113490206B (en) * | 2021-06-21 | 2024-01-16 | 杭州电子科技大学 | Random number encryption multiple access passive optical network in 5G network |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001069845A1 (en) * | 2000-03-10 | 2001-09-20 | Kansai Technology Licensing Organization Co., Ltd. | Chaos cipher system |
| CN106155628A (en) * | 2015-04-01 | 2016-11-23 | 北京南瑞智芯微电子科技有限公司 | A kind of Chaotic Random Number Generator and method for generation |
| CN106327412A (en) * | 2016-08-02 | 2017-01-11 | 天津大学 | Two dimension discrete cosine transformation and two dimension chaotic mapping-based image encryption method |
| CN109379510A (en) * | 2018-09-13 | 2019-02-22 | 桂林电子科技大学 | A kind of image encryption method based on two dimension Logistic chaotic system algorithm |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9600238B2 (en) * | 2011-03-01 | 2017-03-21 | King Abdullah University of Science and Technology (KAUST) | Fully digital chaotic differential equation-based systems and methods |
-
2020
- 2020-10-16 CN CN202011111156.9A patent/CN112328205B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001069845A1 (en) * | 2000-03-10 | 2001-09-20 | Kansai Technology Licensing Organization Co., Ltd. | Chaos cipher system |
| CN106155628A (en) * | 2015-04-01 | 2016-11-23 | 北京南瑞智芯微电子科技有限公司 | A kind of Chaotic Random Number Generator and method for generation |
| CN106327412A (en) * | 2016-08-02 | 2017-01-11 | 天津大学 | Two dimension discrete cosine transformation and two dimension chaotic mapping-based image encryption method |
| CN109379510A (en) * | 2018-09-13 | 2019-02-22 | 桂林电子科技大学 | A kind of image encryption method based on two dimension Logistic chaotic system algorithm |
Non-Patent Citations (2)
| Title |
|---|
| 一种基于混沌原理的真随机数发生器;王欣等;《微电子学与计算机》;20090228(第02期);135-139 * |
| 一类二次多项式混沌及其随机数生成器设计;朱淑芹等;《计算机工程与应用》;20170612(第09期);84-88 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112328205A (en) | 2021-02-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6058245B2 (en) | Random number expansion apparatus, random number expansion method and random number expansion program | |
| Dofe et al. | Hardware security assurance in emerging IoT applications | |
| CN102970132B (en) | Protection method for preventing power analysis and electromagnetic radiation analysis on grouping algorithm | |
| CN103916236B (en) | Power attack prevention method oriented at AES algorithm and circuit achieving method thereof | |
| CN103905182B (en) | Anti-attack method based on middle data storage position dynamic change and circuit implementation | |
| Amudha et al. | An application of graph theory in cryptography | |
| CN112328205B (en) | Chaotic random number generator and generation method | |
| Le et al. | Algebraic differential fault analysis on SIMON block cipher | |
| CN107994980B (en) | DPA attack resisting method adopting clock disorder technology and chaotic trigger | |
| CN112328204B (en) | Chaotic random number generator and generation method | |
| Reddy et al. | BHARKS: Built-in hardware authentication using random key sequence | |
| Song et al. | Multi-image reorganization encryption based on SLF cascade chaos and bit scrambling | |
| Verma et al. | 3D-Playfair cipher with additional bitwise operation | |
| Zhu et al. | Counteracting leakage power analysis attack using random ring oscillators | |
| CN112769545B (en) | Image encryption method based on adjacent pixel Joseph transformation and Mealy state machine | |
| CN107769923A (en) | A kind of true random-number generating method based on cpu clock and USB independent clocks | |
| CN112328203B (en) | Random number generator and generation method | |
| Poolakkaparambil et al. | Low complexity cross parity codes for multiple and random bit error correction | |
| CN114143413B (en) | Image data PUF (physical unclonable function) secure encryption system and encryption method | |
| Li et al. | Fuzzy matching template attacks on multivariate cryptography: a case study | |
| Chandran et al. | VLSI Implementaion of Image Encryption and Decryption Using Reversible Logic Gates | |
| US20060050875A1 (en) | Apparatus and method for recognizing a failure of a cryptographic unit | |
| CN214175074U (en) | Parallel true random number generator and carrier thereof | |
| Ahmed et al. | Pseudo random bits’ generator based on Tent chaotic map and linear feedback shift register | |
| CN106961331A (en) | A kind of method of Random-Rotation key RKR for NTRU preventing side-channel attacks |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |