CN112309476A - Method and device for reading NAND Flash unit data - Google Patents
Method and device for reading NAND Flash unit data Download PDFInfo
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- CN112309476A CN112309476A CN201910684774.3A CN201910684774A CN112309476A CN 112309476 A CN112309476 A CN 112309476A CN 201910684774 A CN201910684774 A CN 201910684774A CN 112309476 A CN112309476 A CN 112309476A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The embodiment of the invention provides a method for reading NAND Flash unit data, which is characterized by comprising the following steps: detecting the current temperature of the NAND Flash storage unit; adjusting the source electrode voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source electrode voltage; under the condition that the adjusted source voltage is kept unchanged, detecting the current drain characteristic value of the NAND Flash storage unit; determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value; and reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode. The invention can adjust the source voltage of the storage unit according to the temperature, compensate the reading error caused by the threshold voltage changing along with the temperature, and improve the accuracy of the NAND Flash reading operation.
Description
Technical Field
The invention relates to the field of electronic circuits, in particular to a method and a device for reading a NAND Flash unit.
Background
The Nand flash is a nonvolatile Memory, which stores data by performing read-write operation on a Memory cell (Memory cell), has the advantages of high rewriting speed, large storage capacity and the like, and is widely used in electronic products. The basic operation of the Nandflash memory comprises: an erase operation, a program operation, and a read operation. In a program operation, a written data is determined to be "1" or "0" by a change in a threshold voltage of a memory cell, a read principle is that a word line voltage is applied to a gate of the memory cell and a current of the memory cell is detected, and when a read current is smaller than a reference current, the data of the memory cell is determined to be "0", and when the read current is larger than the reference current, the data of the memory cell is determined to be "1".
However, the threshold voltage of the Nand flash memory cell varies greatly with temperature, and a constant word line voltage is usually applied during a read operation in the prior art. At low temperature, since the threshold voltage of the memory cell is higher, the read current is lower, and a "1" may be misread as a "0"; at high temperature, since the threshold voltage of the memory cell is low, the read current is high, which may misread "0" to "1", causing read errors and reducing the reliability of the read operation.
Disclosure of Invention
In view of the above problems, the present invention provides a method for reading data of a NAND Flash unit, which is used to read data of a memory storage unit and improve the reliability of a reading operation.
According to an aspect of the present invention, a method for reading NAND Flash unit data is provided, including:
detecting the current temperature of the NAND Flash storage unit;
adjusting the source electrode voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source electrode voltage;
under the condition that the adjusted source voltage is kept unchanged, detecting the current drain characteristic value of the NAND Flash storage unit;
determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value;
and reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode.
Optionally, the current temperature is positively correlated with the adjusted source voltage.
Optionally, the current drain characteristic value includes a current drain voltage, and the reference drain characteristic value includes a reference drain voltage; determining a drain characteristic value variation according to the current drain characteristic value and the reference drain characteristic value, including:
determining the change quantity of the drain voltage according to the current drain voltage and the reference drain voltage;
the reading of the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode comprises the following steps:
and reading the storage data of the NAND Flash storage unit according to the drain voltage variation.
Optionally, the reading the storage data of the NAND Flash storage unit according to the drain voltage variation specifically includes:
if the variation of the drain voltage is larger than a first threshold value, determining that the storage data of the NAND Flash storage unit is '1';
and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
Optionally, the current drain characteristic value includes a current drain current, and the reference drain characteristic value includes a reference drain current; determining a drain characteristic value variation according to the current drain characteristic value and the reference drain characteristic value, including:
determining the change amount of the drain current according to the current drain current and the reference drain current;
the reading of the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode comprises the following steps:
and reading the storage data of the NAND Flash storage unit according to the drain current variation.
Optionally, the reading the storage data of the NAND Flash storage unit according to the variation of the drain current specifically includes:
if the change amount of the drain current is larger than a second threshold value, determining that the storage data of the NAND Flash storage unit is '1';
and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
According to another aspect of the present invention, there is provided a NAND Flash cell data reading apparatus, including:
the detection module is used for detecting the current temperature of the NAND Flash storage unit;
the execution module is used for adjusting the source electrode voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source electrode voltage;
the detection module is also used for detecting the current drain characteristic value of the NAND Flash storage unit under the condition of keeping the adjusted source voltage unchanged;
the determining module is used for determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value;
and the reading module is used for reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode.
Optionally, the current drain characteristic value includes a current drain voltage, the reference drain characteristic value includes a reference drain voltage, and the determining module is specifically configured to determine a drain voltage variation according to the current drain voltage and the reference drain voltage;
the reading module is specifically used for reading the storage data of the NAND Flash storage unit according to the drain voltage variation.
Optionally, the reading module is specifically configured to determine that the storage data of the NAND Flash storage unit is "1" if the variation of the drain voltage is greater than a first threshold; and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
Optionally, the current drain characteristic value includes a current drain current, the reference drain characteristic value includes a reference drain current, and the determining module is specifically configured to determine a variation of the drain current according to the current drain current and the reference drain current;
and the reading module is specifically used for reading the storage data of the NAND Flash storage unit according to the change of the drain current.
Optionally, the reading module is specifically configured to determine that the storage data of the NAND Flash storage unit is "1" if the variation of the drain current is greater than a second threshold; and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
According to the method for reading the NAND Flash unit data, the source voltage of the memory unit is adjusted according to the current temperature of the memory unit, the current drain characteristic value is detected under the condition that the adjusted source voltage is kept unchanged, and the memory unit data is read according to the current drain characteristic value and the change quantity of the reference drain characteristic value, so that the influence of temperature on reading is effectively inhibited, a more stable drain characteristic value is obtained, the data can be read more reliably, and the accuracy of the memory for reading the data is improved.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.
FIG. 1A is a flowchart illustrating steps of a method for reading NAND Flash unit data according to an embodiment of the present invention;
fig. 1B is a schematic structural diagram of a memory CELL of a NAND Flash according to an embodiment of the present invention;
FIG. 2A is a flowchart illustrating steps of another embodiment of a method for reading NAND Flash unit data according to the present invention;
FIG. 2B is a schematic structural diagram of an embodiment of a source voltage generation circuit of a NAND Flash memory cell provided in the present invention;
FIG. 2C is a schematic structural diagram of another embodiment of a source voltage generation circuit of a NAND Flash memory cell provided in the present invention;
FIG. 3 is a flowchart illustrating steps of a method for reading NAND Flash cell data according to another embodiment of the present invention;
fig. 4 is a block diagram of a structure of a device for reading NAND Flash unit data according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be fully described by the detailed description with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, not all embodiments, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without inventive efforts fall within the scope of the present invention.
Referring to fig. 1A, a flowchart illustrating steps of an embodiment of a method for reading NAND Flash unit data according to the present invention is shown, and as shown in fig. 1A, the method for reading NAND Flash unit data includes the following steps:
101. and detecting the current temperature of the NAND Flash storage unit.
102. And adjusting the source voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source voltage.
103. And under the condition of keeping the adjusted source voltage unchanged, detecting the current drain characteristic value of the NAND Flash storage unit.
As can be appreciated, the drain characteristic value may include a drain voltage and a drain current, among others.
104. And determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value.
105. And reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode.
A NAND Flash is composed of many blocks (blocks), typically 128KB (kilobytes), 256KB or 512KB in size. And the basic unit of block is page. Typically, each block consists of 16, 32 or 64 pages. Most of the NAND Flash contains 512 bytes of Data area (Data storage area) in each page. The reading, burning and recording of the NAND Flash are based on pages, and the erasing operation is based on block; wherein, page is the basic/minimum unit of data reading and data storage of NAND Flash.
The data of the NAND Flash is stored in CELL (memory CELL) in a bit manner, and generally, only one bit can be stored in one CELL. These cells are connected in units of 8 or 16 Bit Lines (BL) to form so-called bytes or words, which are bit widths, and these bit lines are further grouped into pages.
As described above, NAND Flash stores different data by differentiating the difference in the threshold voltage at which CELL turns on, and the storage of different data in CELL represents that the threshold voltage at which CELL turns on is different. Because of the influences of processes, operations and the like, when the same data is stored in different CELLs, the threshold voltages of the CELLs may have some differences and may not be completely the same, so only one voltage range can be selected as the data represented by the CELLs, the more accurate and concentrated the voltage range is, the better the resolution of the data stored in the CELLs is, and the more the number of the data can be stored. However, at different temperatures, the characteristics of the semiconductor device change with the change of the temperature, and further the on threshold voltage of the CELL changes, so that the threshold voltage range represented by the data stored in the CELL shifts, and thus, when the data is read, the stored data is judged incorrectly.
As shown in fig. 1B, a schematic structural diagram of a memory CELL of a NAND Flash according to an embodiment of the present invention is shown, and a brief principle of the method is that a drain (i.e., bit line, BL) of the memory CELL is now charged to a suitable potential; then, corresponding voltages are applied to a grid (such as an SGD) and a source (namely source line, SL), after a certain time, data stored in the memory cell are judged by detecting drain current (Icell) or drain Voltage (VBL), if the stored data is '0', discharging current (namely drain current (Icell) is small, and drain Voltage (VBL) is large; if the stored data is "1", the drain current (Icell), which is the discharge current, is large, and the drain Voltage (VBL) is small.
Since the threshold voltage of the CELL decreases with the increase of the temperature, if a fixed voltage is applied to the gate (e.g., SGD) and the source (e.g., source line, SL), the discharging current, i.e., the drain current, is different at different temperatures, and the detected VBL is also different. When the temperature rises, the threshold voltage is lowered, the drain current is increased, and VBL is reduced, which may cause misreading of the stored data "0" as "1"; also, when the temperature is lowered, the threshold voltage is increased, the drain current is decreased, and VBL is increased, which may cause misreading of the stored data "1" as "0".
Therefore, a temperature-dependent adjustment amount is added to the source to obtain an adjusted SL voltage (SL ═ VSL + v (t)) for eliminating the influence of temperature on the reading operation, so that the same discharge current is obtained at different temperatures in the same memory CELL, and the accuracy of the reading operation is improved.
In an alternative embodiment, the current temperature is positively correlated to the adjusted source voltage.
It can be understood that, in the high temperature state, the threshold voltage is reduced, so that the source voltage needs to be increased to offset the reduction of the threshold voltage at the high temperature, so that the discharge current increased along with the temperature is reduced to the normal state, and the stored data "0" is prevented from being misread as "1"; in a low temperature state, the threshold voltage is increased, so the source voltage needs to be decreased to offset the increase of the threshold voltage at a high temperature, so that the discharge current decreased with the temperature is increased to a normal state, and the stored data "1" is prevented from being misread as "0".
According to the method for reading the NAND Flash unit data, the source voltage of the memory unit is adjusted according to the current temperature of the memory unit, the current drain characteristic value is detected under the condition that the adjusted source voltage is kept unchanged, and the memory unit data is read according to the current drain characteristic value and the change quantity of the reference drain characteristic value, so that the influence of temperature on reading is effectively inhibited, a more stable drain characteristic value is obtained, the data can be read more reliably, and the accuracy of the memory for reading the data is improved.
Referring to fig. 2A, a flowchart illustrating steps of another embodiment of a method for reading NAND Flash unit data provided by the present invention includes the following steps:
201. and detecting the current temperature of the NAND Flash storage unit.
202. And adjusting the source voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source voltage.
203. And under the condition of keeping the adjusted source voltage unchanged, detecting the current drain voltage of the NAND Flash storage unit.
204. And determining the change quantity of the drain voltage according to the current drain voltage and the reference drain voltage.
205. And reading the storage data of the NAND Flash storage unit according to the drain voltage variation.
And optionally, a source voltage generating circuit which changes with the temperature can be added to the source of the NAND Flash storage unit, and the source voltage generating circuit can calculate a first voltage which does not change with the temperature and a second voltage which is related to the temperature, output an adjusting voltage which is positively related to the temperature and input the adjusting voltage to the source. The source voltage generating circuit may have various embodiments, and is not particularly limited.
For example, as shown in fig. 2B, a transistor corresponding to a parameter of the memory cell is added to the source of the memory cell, and the divided voltage of the transistor is used as the adjustment voltage of the source of the memory cell according to the influence of temperature on the emitter junction voltage of the transistor.
For example, as shown in fig. 2C, the output terminal of the operational amplifier is connected to the gate of the memory cell, the positive input terminal is connected to a fixed voltage VREF, the negative input terminal is connected between two resistors, one of the resistors is adjustable, one end of the resistor is connected to the source of the memory cell, and the other end of the resistor is grounded; according to the circuit, the voltage at the SL is the divided voltage of the grounding resistor, the resistance value of the adjustable resistor can be adjusted according to the temperature, and the voltage at the SL is changed, namely the source voltage of the memory cell is adjusted.
It is understood that the reference drain voltage is a voltage which is not applied to the gate (e.g. SGD) and the source (i.e. source line, SL) in the temperature state, i.e. a voltage when the drain is charged to a suitable potential before discharging, and the discharging condition can be determined according to the voltage difference between the reference drain voltage and the current drain voltage. If the data stored by the storage voltage is '1', the discharge current is large, and the voltage difference between the reference drain voltage and the current drain voltage is large; if the data stored in the storage voltage is "0", the discharge current is small, and the voltage difference between the reference drain voltage and the current drain voltage is small, so that the stored data can be read according to the variation of the drain voltage.
In an optional implementation manner, the reading the storage data of the NAND Flash storage unit according to the drain voltage variation specifically includes: if the variation of the drain voltage is larger than a first threshold value, determining that the storage data of the NAND Flash storage unit is '1'; and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
It can be understood that, due to the influence of the process and the environment, even if the same CELL compensates for the difference caused by the temperature, the drain voltages cannot be completely the same, so a voltage range should be selected to determine the data, when the variation of the drain voltage is greater than the first threshold, the discharging current is large, the stored data of the NAND Flash memory CELL is "1", and when the variation of the drain voltage is less than or equal to the first threshold, the discharging current is small, and the stored data of the NAND Flash memory CELL is "0".
For example, when the drain voltage is charged to 5mV, and after a certain period of time, the detected drain voltage is 1mV, the drain voltage changes by 4mV, and exceeds the threshold value by 3mV, the stored data is determined to be "1"; when the detected drain voltage was 4mV and the drain voltage varied by 41mV after a lapse of time without exceeding the threshold value of 3mV, the stored data was determined to be "0".
Referring to fig. 3, a flowchart illustrating steps of a further embodiment of a method for reading NAND Flash unit data according to the present invention is shown, including the following steps:
301. and detecting the current temperature of the NAND Flash storage unit.
302. And adjusting the source voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source voltage.
303. And under the condition of keeping the adjusted source voltage unchanged, detecting the current drain current of the NAND Flash storage unit.
304. And determining the change amount of the drain current according to the current drain current and the reference drain current.
305. And reading the storage data of the NAND Flash storage unit according to the drain current variation.
It is understood that the reference drain current is a current that is not added to the gate (e.g., SGD) and the source (i.e., source line, SL) in the temperature state, i.e., a drain current before discharging, and the discharging condition can be determined according to a current difference between the reference drain current and the current drain current. If the data stored by the storage voltage is 1, the discharge current is large; when the data stored in the storage voltage is "0", the discharge current is small, and therefore the stored data can be read in accordance with the amount of change in the drain current.
In an optional implementation manner, the reading the storage data of the NAND Flash storage unit according to the variation of the drain current specifically includes: if the change amount of the drain current is larger than a second threshold value, determining that the storage data of the NAND Flash storage unit is '1'; and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
Fig. 4 is a block diagram showing a structure of a NAND Flash unit data reading apparatus 400 according to this embodiment. As shown in fig. 4, the apparatus includes: the device comprises a detection module 401, an execution module 402, a determination module 403 and a reading module 404.
And the detection module 401 is configured to detect a current temperature of the NAND Flash storage unit.
And the execution module 402 is configured to adjust the source voltage of the NAND Flash memory unit according to the current temperature to obtain an adjusted source voltage.
The detection module 401 is further configured to detect a current drain characteristic value of the NAND Flash memory cell while keeping the adjusted source voltage unchanged.
A determining module 403, configured to determine a variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value.
And a reading module 404, configured to read the storage data of the NAND Flash storage unit according to the drain characteristic value variation.
According to the NAND Flash unit data reading device 400 provided by the invention, the source voltage is adjusted according to the current temperature of the storage unit, the current drain characteristic value is detected under the condition that the adjusted source voltage is kept unchanged, and then the memory unit data is read according to the current drain characteristic value and the change quantity of the reference drain characteristic value, so that the influence of temperature on reading is effectively inhibited, a more stable drain characteristic value is obtained, more reliable data reading is facilitated, and the data reading accuracy of a memory is improved.
In a possible implementation manner, the current drain characteristic value includes a current drain voltage, the reference drain characteristic value includes a reference drain voltage, and the determining module 403 is specifically configured to determine the drain voltage variation according to the current drain voltage and the reference drain voltage.
And the reading module 404 is specifically configured to read the storage data of the NAND Flash storage unit according to the drain voltage variation.
In a possible implementation manner, the reading module 404 is specifically configured to determine that the storage data of the NAND Flash memory cell is "1" if the variation of the drain voltage is greater than a first threshold; and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
In a possible implementation, the current drain characteristic value includes a current drain current, the reference drain characteristic value includes a reference drain current, and the determining module 403 is specifically configured to determine the drain current variation according to the current drain current and the reference drain current.
And the reading module 404 is specifically configured to read the storage data of the NAND Flash storage unit according to the drain current variation.
In a possible implementation manner, the reading module 404 is specifically configured to determine that the storage data of the NAND Flash memory cell is "1" if the variation of the drain current is greater than a second threshold; and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
With regard to the apparatus 400 in the above-described embodiment, the specific manner in which each unit performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
The foregoing is considered as illustrative of the preferred embodiments of the invention and technical principles employed. The present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in more detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the claims.
In the description provided herein, numerous specific details are set forth. It is understood, however, that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the foregoing description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. However, the disclosed method should not be interpreted as reflecting an intention that: that the invention as claimed requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.
Those skilled in the art will appreciate that the modules in the device in an embodiment may be adaptively changed and disposed in one or more devices different from the embodiment. The modules or units or components of the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where at least some of such features and/or processes or elements are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.
Claims (11)
1. A method for reading NAND Flash unit data is characterized by comprising the following steps:
detecting the current temperature of the NAND Flash storage unit;
adjusting the source electrode voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source electrode voltage;
under the condition that the adjusted source voltage is kept unchanged, detecting the current drain characteristic value of the NAND Flash storage unit;
determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value;
and reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode.
2. The method of claim 1,
the current temperature is positively correlated with the adjusted source voltage.
3. The method of claim 1, wherein the current drain characteristic value comprises a current drain voltage, the reference drain characteristic value comprises a reference drain voltage; determining a drain characteristic value variation according to the current drain characteristic value and the reference drain characteristic value, including:
determining the change quantity of the drain voltage according to the current drain voltage and the reference drain voltage;
the reading of the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode comprises the following steps:
and reading the storage data of the NAND Flash storage unit according to the drain voltage variation.
4. The method of claim 3, wherein the reading the storage data of the NAND Flash storage unit according to the drain voltage variation comprises:
if the variation of the drain voltage is larger than a first threshold value, determining that the storage data of the NAND Flash storage unit is '1';
and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
5. The method of claim 1, wherein the present drain characteristic value comprises a present drain current, and the reference drain characteristic value comprises a reference drain current; determining a drain characteristic value variation according to the current drain characteristic value and the reference drain characteristic value, including:
determining the change amount of the drain current according to the current drain current and the reference drain current;
the reading of the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode comprises the following steps:
and reading the storage data of the NAND Flash storage unit according to the drain current variation.
6. The method according to claim 5, wherein reading the storage data of the NAND Flash memory cell according to the variation of the drain current specifically comprises:
if the change amount of the drain current is larger than a second threshold value, determining that the storage data of the NAND Flash storage unit is '1';
and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
7. A reading device for NAND Flash unit data is characterized by comprising:
the detection module is used for detecting the current temperature of the NAND Flash storage unit;
the execution module is used for adjusting the source electrode voltage of the NAND Flash storage unit according to the current temperature to obtain the adjusted source electrode voltage;
the detection module is also used for detecting the current drain characteristic value of the NAND Flash storage unit under the condition of keeping the adjusted source voltage unchanged;
the determining module is used for determining the variation of the drain characteristic value according to the current drain characteristic value and the reference drain characteristic value;
and the reading module is used for reading the storage data of the NAND Flash storage unit according to the variation of the characteristic value of the drain electrode.
8. The apparatus according to claim 7, wherein the current drain characteristic value comprises a current drain voltage, the reference drain characteristic value comprises a reference drain voltage, and the determining module is specifically configured to determine the drain voltage variation based on the current drain voltage and the reference drain voltage;
the reading module is specifically used for reading the storage data of the NAND Flash storage unit according to the drain voltage variation.
9. The apparatus of claim 8, wherein the reading module is specifically configured to determine that the storage data of the NAND Flash memory cell is "1" if the variation of the drain voltage is greater than a first threshold; and if the variation of the drain voltage is less than or equal to a first threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
10. The apparatus as claimed in claim 7, wherein the current drain characteristic value comprises a current drain current, the reference drain characteristic value comprises a reference drain current, and the determining module is specifically configured to determine the drain current variation amount according to the current drain current and the reference drain current;
and the reading module is specifically used for reading the storage data of the NAND Flash storage unit according to the change of the drain current.
11. The apparatus of claim 10, wherein the reading module is specifically configured to determine that the storage data of the NAND Flash memory cell is "1" if the variation of the drain current is greater than a second threshold; and if the change quantity of the drain current is smaller than a second threshold value, determining that the storage data of the NAND Flash storage unit is '0'.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114401543A (en) * | 2022-01-14 | 2022-04-26 | 四川恒湾科技有限公司 | Method and system for reducing power consumption of base station radio frequency unit |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6560152B1 (en) * | 2001-11-02 | 2003-05-06 | Sandisk Corporation | Non-volatile memory with temperature-compensated data read |
| KR20050002245A (en) * | 2003-06-30 | 2005-01-07 | 주식회사 하이닉스반도체 | Method for reading a flash memory cell and a flash memory equipment of NAND and NOR type |
| CN1677569A (en) * | 2004-04-01 | 2005-10-05 | 海力士半导体有限公司 | NAND flash memory device and method of reading the same |
| US20060034140A1 (en) * | 2004-08-13 | 2006-02-16 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| US20070008779A1 (en) * | 2005-06-29 | 2007-01-11 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| US20100329026A1 (en) * | 2009-06-25 | 2010-12-30 | Mitsutoshi Nakamura | Semiconductor memory device with charge accumulation layer |
| CN102314925A (en) * | 2010-07-09 | 2012-01-11 | 海力士半导体有限公司 | Semiconductor memory device and method of operating the same |
| US20160086674A1 (en) * | 2014-09-19 | 2016-03-24 | Sandisk Technologies Inc. | Temperature dependent sensing scheme to counteract cross-temperature threshold voltage distribution widening |
-
2019
- 2019-07-26 CN CN201910684774.3A patent/CN112309476B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6560152B1 (en) * | 2001-11-02 | 2003-05-06 | Sandisk Corporation | Non-volatile memory with temperature-compensated data read |
| KR20050002245A (en) * | 2003-06-30 | 2005-01-07 | 주식회사 하이닉스반도체 | Method for reading a flash memory cell and a flash memory equipment of NAND and NOR type |
| CN1677569A (en) * | 2004-04-01 | 2005-10-05 | 海力士半导体有限公司 | NAND flash memory device and method of reading the same |
| US20060034140A1 (en) * | 2004-08-13 | 2006-02-16 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| US20070008779A1 (en) * | 2005-06-29 | 2007-01-11 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| US20100329026A1 (en) * | 2009-06-25 | 2010-12-30 | Mitsutoshi Nakamura | Semiconductor memory device with charge accumulation layer |
| CN102314925A (en) * | 2010-07-09 | 2012-01-11 | 海力士半导体有限公司 | Semiconductor memory device and method of operating the same |
| US20160086674A1 (en) * | 2014-09-19 | 2016-03-24 | Sandisk Technologies Inc. | Temperature dependent sensing scheme to counteract cross-temperature threshold voltage distribution widening |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114401543A (en) * | 2022-01-14 | 2022-04-26 | 四川恒湾科技有限公司 | Method and system for reducing power consumption of base station radio frequency unit |
| CN114401543B (en) * | 2022-01-14 | 2023-04-07 | 四川恒湾科技有限公司 | Method and system for reducing power consumption of base station radio frequency unit |
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