CN112305485A - Harmonic voltage measurement error correction method and device for capacitor voltage transformer - Google Patents
Harmonic voltage measurement error correction method and device for capacitor voltage transformer Download PDFInfo
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- G01R15/16—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using capacitive devices
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention is suitable for the technical field of electrical measurement, and provides a method and a device for correcting harmonic voltage measurement errors of a capacitor voltage transformer, wherein the method comprises the following steps: acquiring the relative deviation of h-th harmonic detected by the CVT in the current load rate interval; judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not; if yes, calculating an error fitting function of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval; if the current load rate interval of the h-th harmonic is not matched with the current load rate interval of the h-th harmonic, the load rate sub-interval is used as the current load rate interval of the h-th harmonic, the process is repeated, and finally the error fitting function corresponding to each harmonic in the segmented load rate interval is determined.
Description
Technical Field
The invention belongs to the technical field of electrical measurement, and particularly relates to a harmonic voltage measurement error correction method and device of a capacitor voltage transformer.
Background
A Capacitor Voltage Transformer (CVT) is widely used in high voltage measurement and protection of an electric power system by virtue of many advantages in performance. However, due to the existence of the stray capacitance effect inside the CVT, the measurement result without correction processing is not applicable, because the measurement result has a large error when the harmonic voltage is measured. However, in order to monitor the situation of harmonic pollution of a power system after a large number of nonlinear loads of current new energy, high-voltage direct-current transmission, electrified railways and the like are connected to the grid, a power grid company builds an electric energy quality online monitoring system covering a high-medium-voltage system, the scale of the system is enlarged year by year, most of voltage signals of a monitoring terminal of the system are taken from the secondary side of a CVT, and the problem of CVT harmonic measurement error cannot be avoided.
At present, approaches for correcting harmonic voltage measurement errors caused by the CVT mainly include a modeling method and a testing method. The modeling method is characterized in that a CVT harmonic equivalent model is built, a transfer function of the CVT is deduced, an error relation of the CVT at each harmonic frequency is simulated, correction of harmonic voltage measured on a secondary side of the CVT is achieved, the key point of the modeling method is determination of key parameters of the model, but the correction result reliability cannot be evaluated due to the fact that the correction result cannot be accurately obtained due to the limitation of the current technical conditions. The test rule is that a test platform is used for carrying out a high-voltage frequency sweep test on factory CVT harmonic measurement errors in a laboratory environment, and the measurement errors of each harmonic are determined according to input and output corresponding relations to carry out error correction. However, the requirements that the experimental conditions are the same as the operating conditions in the transformer substation cannot be met in the existing test, and if the actual measurement results are corrected by adopting the test results, a large error is inevitably caused, so that the situation that the error correction results are not ideal occurs.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method and an apparatus for correcting a harmonic voltage measurement error of a capacitor voltage transformer, so as to solve a problem in the prior art that a harmonic voltage correction result is not ideal due to inconsistency between an experimental condition and an actual operating condition of a substation.
The first aspect of the embodiments of the present invention provides a method for correcting a harmonic voltage measurement error of a capacitor voltage transformer, including:
the method comprises the following steps: acquiring the relative deviation of h-order harmonic detected by the capacitive voltage transformer in the current load rate interval; the h is greater than 1;
step two: judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not;
step three: if the relative deviation of the h-th harmonic in the current load rate interval meets the preset deviation condition, calculating an error fitting function of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval;
step four: if the relative deviation of the h-th harmonic in the current load rate interval does not meet the preset deviation condition, dividing the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals, taking the load rate subintervals as the current load rate interval of the h-th harmonic, and repeatedly executing the first step to the fourth step.
A second aspect of the embodiments of the present invention provides a harmonic voltage measurement error correction apparatus for a capacitor voltage transformer, including:
the relative deviation calculation module is used for acquiring the relative deviation of the h-th harmonic detected by the capacitor voltage transformer in the current load rate interval; the h is greater than 1;
the condition judgment module is used for judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not;
the error fitting function calculation module is used for calculating an error fitting function of the h-th harmonic in the current load rate interval according to a harmonic voltage error value of the h-th harmonic in the current load rate interval if the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition;
and the interval updating module is used for dividing the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals if the relative deviation of the h-th harmonic corresponding to the current load rate interval does not accord with a preset deviation condition, and repeatedly executing the process by taking the load rate subintervals as the current load rate interval of the h-th harmonic.
A third aspect of the embodiments of the present invention provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the method for correcting the harmonic voltage measurement error of the capacitor voltage transformer as described above when executing the computer program.
A fourth aspect of embodiments of the present invention provides a computer-readable storage medium storing a computer program which, when executed by a processor, implements the steps of the method for correcting the harmonic voltage measurement error of a capacitor voltage transformer as described above.
Compared with the prior art, the embodiment of the invention has the following beneficial effects: the embodiment calculates the relative deviation of each harmonic measured by the CVT corresponding to the full-segment load rate interval based on the phenomenon that the measurement errors of different harmonic frequency bands have different sensitivities to the change of the secondary side load rate, if the corresponding relative deviation of a certain harmonic in the full-segment load rate interval meets the preset deviation condition, calculating an error fitting function corresponding to the subharmonic in the full-segment load rate interval, otherwise dividing the full-segment load rate interval corresponding to the subharmonic, and carrying out relative deviation judgment on each subharmonic in the divided load rate subintervals, repeating the process, and finally determining an error fitting function of the load rate and the error corresponding to each load rate interval with each subharmonic voltage meeting a preset deviation condition, so that the problem of measurement error deviation caused by the difference between the load rate of the secondary side of the CVT and the actual operation in the test method is solved, and the accuracy of harmonic voltage error correction is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic flowchart of a method for correcting a harmonic voltage measurement error of a capacitive voltage transformer according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a process of modifying the h-th harmonic voltage provided by the embodiment of the present invention by the method provided by the present application;
fig. 3 is a schematic diagram of a harmonic voltage measurement error correction apparatus of a capacitor voltage transformer according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a terminal device according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
In an embodiment, as shown in fig. 1, fig. 1 is a schematic flowchart illustrating a method for correcting a harmonic voltage measurement error of a capacitive voltage transformer provided in this embodiment, where the method includes:
the method comprises the following steps: acquiring the relative deviation of h-order harmonic detected by the capacitive voltage transformer in the current load rate interval; the h is greater than 1;
step two: judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not;
step three: if the relative deviation of the h-th harmonic in the current load rate interval meets the preset deviation condition, calculating an error fitting function of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval;
step four: if the relative deviation of the h-th harmonic in the current load rate interval does not meet the preset deviation condition, dividing the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals, taking the load rate subintervals as the current load rate interval of the h-th harmonic, and repeatedly executing the first step to the fourth step.
In this embodiment, the load capacity corresponding to the upper limit value of the initial load rate interval is the rated output capacity of the CVT, and can be determined according to the factory nameplate of the CVT to be tested, and at this time, the load rate η isU100%, the load capacity corresponding to the initial lower limit value is the CVT no-load, and the load rate eta at the momentLIs 0.
Then, high-voltage frequency sweep error measurement is carried out under the conditions of the upper limit value and the lower limit value of the CVT load rate based on a test method, and the following points need to be noticed:
(1) in the test, the harmonic voltage content of 2 nd to 50 th order should be the same, and in the present embodiment, the harmonic voltage content may be 3%.
(2) The power factor of the test load is determined from the capacity of the rated output of the CVT and is not subsequently changed.
(a) When the rated output is less than or equal to 10VA, the test load power factor is 1;
(b) the trial load power factor was 0.8 (hysteretic) when the rated output >10 VA.
And finally obtaining the harmonic voltage error value of the h-order harmonic voltage under the conditions of the upper limit value and the lower limit value of the load rate interval. The harmonic voltage error value is a difference between the actual harmonic voltage content and the harmonic voltage content measured by the CVT.
Further, the preset deviation condition is that the relative deviation is smaller than or equal to a deviation limit value, if the relative deviation of the h-order harmonic voltage in the load rate interval is smaller than or equal to the deviation limit value, the condition is determined to be met, and according to the harmonic voltage error value of the h-order harmonic meeting the condition and the corresponding load rate, the error fitting function corresponding to the h-order harmonic in the current load rate interval is determined.
On the other hand, if the relative deviation of the h-th harmonic voltage in the load rate interval is larger than the deviation limit value, dividing the current load rate interval of the h-th harmonic which does not meet the preset deviation condition, further judging the harmonic voltage error value of the h-th harmonic with the load rate interval divided again, and repeatedly executing the steps from one step to the fourth step until the error fitting function of all the segmented load rate intervals corresponding to each harmonic is obtained through calculation.
Preferably, the deviation limit may be 5%.
It can be known from the above embodiments that, in the present embodiment, based on the phenomenon that the measurement errors of different harmonic frequency bands have different sensitivities to the change of the secondary side load rate, the relative deviation of each harmonic measured by the CVT corresponding to the full-segment load rate interval is calculated, if the relative deviation of a certain harmonic in the full-segment load rate interval meets the preset deviation condition, calculating an error fitting function corresponding to the subharmonic in the full-segment load rate interval, otherwise dividing the full-segment load rate interval corresponding to the subharmonic, and carrying out relative deviation judgment on each subharmonic in the divided load rate subintervals, repeating the process, and finally determining an error fitting function of the load rate and the error corresponding to each load rate interval with each subharmonic voltage meeting a preset deviation condition, so that the problem of measurement error deviation caused by the difference between the load rate of the secondary side of the CVT and the actual operation in the test method is solved, and the accuracy of harmonic voltage error correction is improved.
In an embodiment, a specific implementation flow of step one in fig. 1 includes:
s201: obtaining a harmonic voltage error value corresponding to h-th harmonic detected by a target capacitive voltage transformer in a current load rate interval;
s202: and calculating the relative deviation of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval.
In one embodiment, the harmonic voltage error value corresponding to the h-th harmonic in the current load rate interval includes a harmonic voltage error value of the h-th harmonic in the lower limit value of the current load rate interval and a harmonic voltage error value of the h-th harmonic in the upper limit value of the current load rate interval. The specific implementation flow of step S202 includes: by the formula
Calculating the relative deviation of the h-th harmonic in the current load rate interval;
in the formula (1), RED (h) represents the relative deviation of the h-th harmonic in the current load rate interval, and epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) And the harmonic voltage error value of the h-th harmonic under the condition of the upper limit value of the current load rate interval is represented.
In one embodiment, the error fitting function of the h harmonic in the current load rate interval is:
in the formula (2), epsilon (h) represents a harmonic voltage error value corresponding to the h-th harmonic in the current load rate interval, and epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) Represents the harmonic voltage error value, eta, of the h-th harmonic under the condition of the upper limit value of the current load rate intervalLLower limit value, eta, representing the current load factor intervalUAnd eta represents an upper limit value of the current load rate interval, and eta represents any load rate in the current load rate interval.
In this embodiment, for a load factor interval with RED of h-th harmonic less than or equal to 5%, an error fitting function of the corresponding load factor and the harmonic voltage error in the load factor interval is calculated according to equation (2).
In one embodiment, the specific implementation flow of step four in fig. 1 includes:
and dividing the current load rate interval into two load rate subintervals by taking the intermediate load value of the current load rate interval as a dividing value.
In this embodiment, the intermediate load value is the intermediate value of the load rate interval; namely, it is
In the formula (3), etaM,iA middle value representing a load rate section at the time of the ith section division; etaUThe upper limit value of the load rate interval is set; etaLThe lower limit value of the original load rate interval; i represents the division times of the interval, and the interval is increased once every time the interval is divided; h represents the harmonic order.
Specifically, for the harmonic wave which does not meet the preset deviation condition, adopting the idea of bisection, dividing the original load rate interval into two new load rate subintervals by the intermediate value of the original load rate interval, wherein the two new load rate subintervals of the original load rate interval comprise:
(1) with ηUAnd ηM,i(h) Building new loadsAnd a rate interval 1, wherein the upper limit value of the interval is the upper limit value of the original load rate interval, and the lower limit value of the interval is the middle value of the original load rate interval.
(2) With ηM,i(h) And ηLAnd constructing a new load rate interval 2, wherein the upper limit value of the interval is the middle value of the original load rate interval, and the lower limit value of the interval is the lower limit value of the original load rate interval.
And further, taking the new load rate subinterval as the current load rate interval, and respectively calculating harmonic voltage error values corresponding to the h-th harmonic of the latest current load rate interval.
When the first to fourth steps are executed again, a CVT error test of the intermediate value of the original load rate interval needs to be performed, that is, harmonic voltage error values corresponding to the upper and lower limit values of the current load rate interval (the sub-interval into which the original load rate interval is divided) are obtained. And then, the steps are repeated to judge the relation between the relative deviation of the harmonic voltage error value of the lower limit value and the upper limit value of each new load rate interval and the deviation limit value. And obtaining an error fitting function corresponding to each subharmonic in all the divided load rate intervals until the relative deviation of all the load rate intervals of each harmonic division obtained through calculation is smaller than or equal to the deviation limit value.
In this embodiment, the resulting error fitting function is a piecewise fitting linear function.
In an embodiment, an implementation procedure of the method for correcting the harmonic voltage measurement error of the capacitive voltage transformer according to the embodiment of the present invention further includes:
s301: acquiring a secondary side load rate of a target capacitor voltage transformer in a target scene;
s302: determining an error fitting function corresponding to the secondary side load rate according to the load rate interval where the secondary side load rate is located;
s303: and determining a harmonic voltage error value corresponding to the secondary side load rate according to the error fitting function corresponding to the secondary side load rate, and correcting the harmonic voltage content rate measured by the target capacitor voltage transformer according to the harmonic voltage error value corresponding to the secondary side load rate.
In this embodiment, the target scene may be a substation.
In this embodiment, after the piecewise error fitting function of each harmonic of the CVT is obtained through the above test, when the CVT measurement errors of the same model are corrected, the corresponding harmonic voltage error value can be calculated according to the actual CVT secondary load factor and the piecewise error fitting function, and then corrected.
As shown in fig. 2, fig. 2 shows a schematic diagram of the process of improving h-th harmonic voltage through CVT measurement error correction. The load rate eta of the h-th harmonic on the secondary side can be simply and rapidly found through the schematic diagram shown in fig. 2F(h) Lower corresponding error value epsilonF(h)。
In an embodiment, the specific implementation flow of S303 includes:
by the formula
Correcting the harmonic voltage measured by the target capacitor voltage transformer;
in the formula (4), HRUr(h) Harmonic voltage content, HRU, representing the modified h-th harmonicm(h) Represents the harmonic voltage content, epsilon, measured by the target capacitive voltage transformerF(h) And the harmonic voltage error value corresponding to the h-th harmonic under the secondary side load ratio is represented.
The method for correcting the harmonic voltage measurement error of the capacitor voltage transformer provided by the application is further explained by taking a CVT with a certain brand model of TYD110/√ 3-0.02H as an example. In order to simplify the process, only the 11 th harmonic with the largest measurement error is corrected, and other subharmonics are similar.
First, since the rated output of the CVT was 150VA, the power factor of the test load was selected to be 0.8 (hysteresis).
Then, an initial load rate interval upper limit value eta is obtained through a test methodUTest error ε at 100%U(11) 115 percent; lower limit value etaLAt 0% (no load)Error of the test is εL(11)＝98％。
Then, a load factor interval [0,100 ] is calculated according to the formula (1)]RED (11) of (2) is 17.35%, and the value is greater than the deviation limit value by 5%, so that the initial load rate section is divided into load rate intermediate values η of the initial load rate sectionM,1(11) 50%, the harmonic voltage error value epsilonM,1(11) The results of the relative deviation of the newly divided load factor sections are as follows, 107%.
(a) The RED (11) of the load factor interval [50,100] is 4.55% ≦ 5%, so the fitted linear function for this interval is obtained according to equation (2) as: ε (11) — 0.18 × η + 116.
(b) Load factor interval [0,50]RED (11) ═ 7.48%>5%, it is necessary to set the load factor interval [0, 50%]Continuing to divide the load factor into intermediate values etaM,2(11) 25%, the harmonic voltage error value epsilonM,1(11)＝112％。
(c) When RED (11) of the newly divided load factor interval [25,50] is 4.67% or less and 5%, the fitted linear function of the interval is: ε (11) — 0.2 × η + 117.
(d) When RED (11) of the newly divided load factor interval [0,25] is 2.68% or less and 5%, the fitted linear function of the interval is: ε (11) — 0.12 × η + 115.
In summary, 3-segment linear function fitting can be used for the relation that the 11 th harmonic voltage measurement error of the CVT is influenced by the load factor, as shown in formula (5).
In this embodiment, a CVT of the same model is applied to a 110kV bus of a 220kV substation, the secondary load of the CVT is measured, the sum of all windings is about 12VA, the load factor is 8%, the load factor is substituted into formula (5), the error of 11 th harmonic measured by the CVT at the load factor is 114.04%, and then the correction is performed according to formula (4).
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
In an embodiment of the present invention, as shown in fig. 3, fig. 3 shows a structure of a harmonic voltage measurement error correction apparatus 100 of a capacitor voltage transformer provided in this embodiment, which includes:
a relative deviation calculating module 110, configured to obtain a relative deviation of the h-th harmonic detected by the capacitive voltage transformer in a current load rate interval; the h is greater than 1;
a condition determining module 120, configured to determine whether a relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition;
an error fitting function calculation module 130, configured to calculate an error fitting function of the h-th harmonic in the current load rate interval according to a harmonic voltage error value of the h-th harmonic in the current load rate interval if a relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition;
and an interval updating module 140, configured to, if the relative deviation of the h-th harmonic in the current load rate interval does not meet a preset deviation condition, divide the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals, use the load rate subintervals as the current load rate interval of the h-th harmonic, and repeatedly execute the above process.
In one embodiment, the relative deviation calculation module 110 includes:
the error acquisition unit is used for acquiring a harmonic voltage error value corresponding to the h-th harmonic detected by the target capacitor voltage transformer in the current load rate interval;
and the relative deviation calculation unit is used for calculating the relative deviation of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval.
In one embodiment, the harmonic voltage error value corresponding to the h-th harmonic in the current load rate interval includes a harmonic voltage error value of the h-th harmonic under the condition of the lower limit value of the current load rate interval and a harmonic voltage error value of the h-th harmonic under the condition of the upper limit value of the current load rate interval;
the relative deviation calculation unit includes:
by the formula
Calculating the relative deviation of the h-th harmonic in the current load rate interval;
wherein RED (h) represents the relative deviation of h-th harmonic in the current load rate interval, epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) And the harmonic voltage error value of the h-th harmonic under the condition of the upper limit value of the current load rate interval is represented.
In one embodiment, the error fitting function of the h harmonic in the current load rate interval is:
wherein epsilon (h) represents the harmonic voltage error value corresponding to the h-th harmonic in the current load rate interval, epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) Represents the harmonic voltage error value, eta, of the h-th harmonic under the condition of the upper limit value of the current load rate intervalLLower limit value, eta, representing the current load factor intervalUAnd eta represents an upper limit value of the current load rate interval, and eta represents any load rate in the current load rate interval.
In one embodiment, the interval update module 140 includes:
and the interval dividing unit is used for dividing the current load rate interval into two load rate subintervals by taking the middle load value of the current load rate interval as a dividing value.
In one embodiment, the harmonic voltage measurement error correction apparatus of a capacitor voltage transformer further includes:
the secondary side load rate acquisition module is used for acquiring the secondary side load rate of the target capacitor voltage transformer in a target scene;
the error fitting function determining module is used for determining an error fitting function corresponding to the secondary side load rate according to the load rate interval where the secondary side load rate is located;
and the error correction module is used for determining a harmonic voltage error value corresponding to the secondary side load rate according to an error fitting function corresponding to the secondary side load rate, and correcting the harmonic voltage content rate measured by the target capacitor voltage transformer according to the harmonic voltage error value corresponding to the secondary side load rate.
In one embodiment, the error correction module includes:
by the formula
Correcting the harmonic voltage measured by the target capacitor voltage transformer;
wherein, HRUr(h) Harmonic voltage content, HRU, representing the modified h-th harmonicm(h) Represents the harmonic voltage content, epsilon, measured by the target capacitive voltage transformerF(h) And the harmonic voltage error value corresponding to the h-th harmonic under the secondary side load ratio is represented.
Fig. 4 is a schematic diagram of a terminal device according to an embodiment of the present invention. As shown in fig. 4, the terminal device 4 of this embodiment includes: a processor 40, a memory 41 and a computer program 42 stored in said memory 41 and executable on said processor 40. The processor 40, when executing the computer program 42, implements the steps of the above-described method embodiments, such as the steps one to four shown in fig. 1. Alternatively, the processor 40, when executing the computer program 42, implements the functions of the modules/units in the above-mentioned device embodiments, such as the functions of the modules 110 to 140 shown in fig. 3.
The computer program 42 may be partitioned into one or more modules/units that are stored in the memory 41 and executed by the processor 40 to implement the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 42 in the terminal device 4.
The terminal device 4 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 40, a memory 41. Those skilled in the art will appreciate that fig. 4 is merely an example of a terminal device 4 and does not constitute a limitation of terminal device 4 and may include more or fewer components than shown, or some components may be combined, or different components, e.g., the terminal device may also include input-output devices, network access devices, buses, etc.
The Processor 40 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 41 may be an internal storage unit of the terminal device 4, such as a hard disk or a memory of the terminal device 4. The memory 41 may also be an external storage device of the terminal device 4, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 4. Further, the memory 41 may also include both an internal storage unit and an external storage device of the terminal device 4. The memory 41 is used for storing the computer program and other programs and data required by the terminal device. The memory 41 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. . Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, etc. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A harmonic voltage measurement error correction method of a capacitor voltage transformer is characterized by comprising the following steps: the method comprises the following steps: acquiring the relative deviation of h-order harmonic detected by the capacitive voltage transformer in the current load rate interval; the h is greater than 1; step two: judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not; step three: if the relative deviation of the h-th harmonic in the current load rate interval meets the preset deviation condition, calculating an error fitting function of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval; step four: if the relative deviation of the h-th harmonic in the current load rate interval does not meet the preset deviation condition, dividing the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals, taking the load rate subintervals as the current load rate interval of the h-th harmonic, and repeatedly executing the first step to the fourth step.
2. The method for correcting harmonic voltage measurement errors of a capacitor voltage transformer according to claim 1, wherein the obtaining of the relative deviation of the h-th harmonic detected by the target capacitor voltage transformer in the current load factor interval comprises:
obtaining a harmonic voltage error value corresponding to h-th harmonic detected by a target capacitive voltage transformer in a current load rate interval;
and calculating the relative deviation of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval.
3. The method according to claim 2, wherein the harmonic voltage error value corresponding to the h-th harmonic in the current load factor interval includes a harmonic voltage error value of the h-th harmonic in the lower limit of the current load factor interval and a harmonic voltage error value of the h-th harmonic in the upper limit of the current load factor interval;
the calculating the relative deviation of the h-th harmonic in the current load rate interval according to the harmonic voltage error value of the h-th harmonic in the current load rate interval includes:
by the formula
Calculating the relative deviation of the h-th harmonic in the current load rate interval;
wherein RED (h) represents the relative deviation of h-th harmonic in the current load rate interval, epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) And the harmonic voltage error value of the h-th harmonic under the condition of the upper limit value of the current load rate interval is represented.
4. The method for correcting harmonic voltage measurement errors of a capacitor voltage transformer according to claim 1, wherein an error fitting function of the h-th harmonic in the current load factor interval is as follows:
wherein epsilon (h) represents the harmonic voltage error value corresponding to the h-th harmonic in the current load rate interval, epsilonL(h) Represents the harmonic voltage error value of h-order harmonic under the condition of the lower limit value of the current load rate interval, epsilonU(h) Represents the harmonic voltage error value, eta, of the h-th harmonic under the condition of the upper limit value of the current load rate intervalLLower limit value, eta, representing the current load factor intervalUAnd eta represents an upper limit value of the current load rate interval, and eta represents any load rate in the current load rate interval.
5. The method for correcting harmonic voltage measurement errors of a capacitor voltage transformer according to claim 1, wherein the dividing the current load factor interval of the h-th harmonic to obtain at least two load factor subintervals comprises:
and dividing the current load rate interval into two load rate subintervals by taking the intermediate load value of the current load rate interval as a dividing value.
6. The method for correcting harmonic voltage measurement errors of a capacitor voltage transformer of claim 1, further comprising:
acquiring a secondary side load rate of a target capacitor voltage transformer in a target scene;
determining an error fitting function corresponding to the secondary side load rate according to the load rate interval where the secondary side load rate is located;
and determining a harmonic voltage error value corresponding to the secondary side load rate according to the error fitting function corresponding to the secondary side load rate, and correcting the harmonic voltage content rate measured by the target capacitor voltage transformer according to the harmonic voltage error value corresponding to the secondary side load rate.
7. The method for correcting the harmonic voltage measurement error of the capacitor voltage transformer according to claim 6, wherein the correcting the harmonic voltage content rate measured by the target capacitor voltage transformer according to the harmonic voltage error value corresponding to the secondary side load factor comprises:
by the formula
Correcting the harmonic voltage measured by the target capacitor voltage transformer;
wherein, HRUr(h) Harmonic voltage content, HRU, representing the modified h-th harmonicm(h) Represents the harmonic voltage content, epsilon, measured by the target capacitive voltage transformerF(h) And the harmonic voltage error value corresponding to the h-th harmonic under the secondary side load ratio is represented.
8. The utility model provides a harmonic voltage measurement error correcting unit of condenser voltage transformer which characterized in that includes:
the relative deviation calculation module is used for acquiring the relative deviation of the h-th harmonic detected by the capacitor voltage transformer in the current load rate interval; the h is greater than 1;
the condition judgment module is used for judging whether the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition or not;
the error fitting function calculation module is used for calculating an error fitting function of the h-th harmonic in the current load rate interval according to a harmonic voltage error value of the h-th harmonic in the current load rate interval if the relative deviation of the h-th harmonic in the current load rate interval meets a preset deviation condition;
and the interval updating module is used for dividing the current load rate interval of the h-th harmonic to obtain at least two load rate subintervals if the relative deviation of the h-th harmonic corresponding to the current load rate interval does not accord with a preset deviation condition, and repeatedly executing the process by taking the load rate subintervals as the current load rate interval of the h-th harmonic.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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