CN112272117A - LIN network simulation system and LIN network-based data transmission method - Google Patents
LIN network simulation system and LIN network-based data transmission method Download PDFInfo
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- CN112272117A CN112272117A CN202011245151.5A CN202011245151A CN112272117A CN 112272117 A CN112272117 A CN 112272117A CN 202011245151 A CN202011245151 A CN 202011245151A CN 112272117 A CN112272117 A CN 112272117A
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- 238000004088 simulation Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 title claims abstract description 11
- 230000005540 biological transmission Effects 0.000 title claims abstract description 10
- 230000004044 response Effects 0.000 claims description 14
- 238000012545 processing Methods 0.000 abstract description 5
- 238000012544 monitoring process Methods 0.000 abstract description 3
- 238000005316 response function Methods 0.000 abstract 1
- 238000004891 communication Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000001824 photoionisation detection Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/14—Network analysis or design
- H04L41/145—Network analysis or design involving simulating, designing, planning or modelling of a network
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/04—Processing captured monitoring data, e.g. for logfile generation
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Abstract
The invention discloses an LIN network simulation system and a data transmission method based on an LIN network. The invention can realize that the main mode channel only sends the frame head, the auxiliary mode channel monitors and only provides the response function. In the slave mode, the system receives the frame header and generates interruption, thereby solving the problem that the frame header is not generated when the master mode sends the frame header; the LIN network can be well simulated under the condition of a single node, the LIN channel of the master mode serves as a master node, the LIN channel of the slave mode serves as a slave node, and when the master node continuously sends a frame header, the slave node is always in a monitoring state and performs corresponding processing according to the received interrupt generated by the frame header; in an actual LIN network, the last generated LIN node in the present application may serve as the master node of the network.
Description
Technical Field
The invention relates to the technical field of automobile buses, in particular to a LIN network simulation system and a data transmission method.
Background
In the simulation and measurement of the PowerPC57xx series MCU on the LIN network, if this method is implemented by a LIN channel of the MCU that supports both master and slave modes, from a software configuration level, the channel is configured either as master or slave. When the channel is used as a host node, an internal implementation mechanism of the channel cannot separate the host node into a master task and a slave task, when the host node is required to provide a response, a frame header and data must be sent simultaneously, that is, the frame header and the response cannot be provided respectively, and the frame header and a frame data field cannot be interrupted respectively. If the frame header and the data are sent simultaneously, the timestamp can be marked only at the moment when one frame of message is finished, so that the recorded timestamp is not accurate.
Therefore, those skilled in the art are dedicated to developing an LIN network simulation system and a data transmission method specially for a PowerPC57xx series MCU, which can effectively solve the problem that a PowerPC57xx series MCU cannot separate master and slave tasks of a host node during LIN network communication, and can not only virtualize the whole LIN network, but also complement the real LIN network.
Disclosure of Invention
In view of the above defects in the prior art, the technical problem to be solved by the present invention is to provide an LIN network simulation system and a data transmission method specifically for a PowerPC57xx series MCU, which can effectively solve the problem that a PowerPC57xx series MCU cannot separate master and slave tasks of a host node during LIN network communication. In an actual network, the node can serve as a master node to provide a message header and also serve as a slave node to provide a response. Thus, the whole LIN network can be virtualized, and the real LIN network can be supplemented.
In order to achieve the purpose, the invention provides an LIN network simulation system, wherein an AND gate is connected to an MCU through two LIN channels, the output end of the AND gate is connected with an isolator, the isolator is connected to an LIN transceiver, and the LIN transceiver is connected with an LIN bus.
Preferably, the TX pins of the two LIN channels are connected to the and gate, and are connected to the TXD terminal of the LIN transceiver through the isolator.
Preferably, RX pins of the two LIN channels are directly connected to RXD terminals of the LIN transceiver through the isolators.
Preferably, the MCU also comprises a GPIO pin output control module, and the VIA pin and the VIB pin of the GPIO pin output control module are respectively connected to the two GPIO pins of the MCU.
The invention also provides a data transmission method based on the LIN network, which comprises the following steps:
1) two LIN channels are arranged and connected to the MCU, wherein one LIN channel supporting a master is used as a master task of a node to provide a frame header, and the other LIN channel supporting a slave is used as a slave task of the node to provide a response;
2) the TX pins of the two LIN channels are output through the same AND gate and then reach an LIN transceiver through an isolator;
3) directly connecting RX pins of the two LIN channels to the LIN transceiver through the isolator;
4) the LIN transceiver converts the received signal into a LIN node, which is connected to the LIN bus.
The invention has the beneficial effects that: the invention can realize that the main mode channel only sends the frame head, the auxiliary mode channel monitors and only provides response, and the interruption is generated when the frame head is received in the auxiliary mode, thereby solving the problem that the frame head is not interrupted when the main mode sends the frame head; the LIN network can be well simulated under the condition of a single node, the LIN channel of the master mode serves as a master node, the LIN channel of the slave mode serves as a slave node, and when the master node continuously sends a frame header, the slave node is always in a monitoring state and performs corresponding processing according to the received interrupt generated by the frame header; in an actual LIN network, the last generated LIN node in the application can serve as a host node of the network, and is used for scheduling the transmission sequence of frames on a bus, monitoring data, processing errors and the like by sending a frame header; the bus can also flexibly act as a slave node to realize the scheduling of the master node on the bus and provide response.
Drawings
FIG. 1 is a schematic diagram of the structure of an embodiment of the present invention.
Fig. 2 is a circuit configuration diagram of an embodiment of the present invention.
Detailed Description
The invention is further illustrated by the following figures and examples.
As shown in fig. 1 and 2, in the LIN network simulation system, an and gate U36 is connected to an MCU through two LIN channels (the MCU is provided with a pin supporting LIN, and can be directly connected to the MCU), in this embodiment, an and gate U36 directly uses a 74LVC1GO8 chip, an output end of an and gate U36 is connected to an isolator U38, an isolator U38 uses an ADuM1201BRZ chip, an isolator U38 is connected to a LIN transceiver U37, an LIN transceiver U37 uses a MAX13021ASA + chip, and an LIN transceiver U37 is connected to a LIN bus.
The TX pins of the two LIN channels are connected to an and gate U36, and to the TXD terminal of LIN transceiver U37 through an isolator U38. That is, the TX pins of the two LIN channels are output through an and gate, through which connection the voltage level at the terminal of LIN transceiver U37 TXD is determined by the output terminal of and gate U36. The RX pins of the two LIN channels are directly connected to the RXD terminal of the LIN transceiver U37 through isolators, so that the RX pin level of the LIN channel is determined by the output terminal of the LIN transceiver U37.
This application still includes GPIO pin output control module U4O, adopts ADuM1200ARZ chip in this application, for an isolation chip, on its VIA pin and VIB pin were connected to MCU's two GPIO pins respectively. The VIA pin input is output through a VOA pin of an isolator, the level of the VIA pin input controls a sleep function, the VIB pin input is output through a VOB pin of the isolator, and the level of the VIB pin input controls whether the VIA pin is pulled up or not. The VIA pin and the VIB pin can play a role in electrical isolation from the VOA pin and the VOB pin through the isolators, so that circuits of different physical parts are not interfered, and the level of the output of the VIA pin and the VIB pin is consistent with the level of the GPIO pin on the MCU.
In the application, the LIN transceiver U37 supports a sleep mode (a sleep pin of the transceiver U37 is connected to one GPIO pin of a main chip), and whether the LIN transceiver U37 enters a low power consumption state is determined by outputting a high level and a low level through the GPIO pin.
In the application, the LIN bus is also connected with a controllable pull-up circuit, and whether the level of the LIN bus needs to be pulled up to a 12V power supply or not can be selected according to different configurations of master nodes and slave nodes. The pull-up circuit is connected with one GPIO pin of the MCU, and controls whether the LIN bus is pulled up or not by outputting high and low levels through the GPIO pin.
The application also provides a data transmission method based on the LIN network, which can be realized by adopting the LIN network simulation system and comprises the following steps:
1) two LIN channels are arranged and connected to the MCU, wherein one LIN channel supporting a master is used as a master task of a node to provide a frame header, and the other LIN channel supporting a slave is used as a slave task of the node to provide a response;
2) the TX pins of the two LIN channels are output through the same AND gate and then reach an LIN transceiver through an isolator;
3) directly connecting RX pins of the two LIN channels to an LIN transceiver through an isolator;
4) the LIN transceiver converts the received signal into a LIN node, which is connected to the LIN bus.
In the present application, one LIN node (hereinafter referred to as "this node") is implemented by two LIN channels, where one LIN channel is a master mode and the other LIN channel is a slave mode. When two channels are used simultaneously, a virtual LIN network can be simulated, in which: the channel configured as the main mode serves as a main node of the virtual network and provides a message header; the channel configured as a slave mode can act as any slave node and respond differently to the request of the master node. In a practical network, this LIN node acts as a master node in the LIN network when two channels are used simultaneously, wherein the channel configured as master mode performs the master task: providing a message header; the channel configured as slave mode performs the slave tasks: a response is provided. When only channels configured as slave are used, this node can act as a slave in the LIN network, providing responses to other nodes in the LIN network. The purpose of independently opening the master task and the slave task of a node is achieved, the master task and the slave task can respectively generate interrupt when the frame header and the data are provided, and different things are interrupted according to independent interrupt processing.
In the application, two LIN channels are used as one LIN node, wherein one LIN channel is configured as a master mode and used for fixing a sending frame header, and the frame header sent by the master mode LIN channel includes a synchronous interval segment, a synchronous segment and a pid (protected identifier) segment. The other LIN channel is configured to receive frame headers from the mode and to send or receive acknowledgements, the acknowledgements provided from the mode LIN channel comprising data segments and checksum segments. A Header receive interrupt is generated after the frame Header is received from the mode, and can be used to record the timestamp of the frame or to handle a series of things. LIN channels configured as slave mode, may have a different schedule than the master node: including a schedule for sending responses, a schedule for receiving responses, and scheduling the processing of different PIDs. When the frame header is received, whether a response needs to be sent or received or neither a response is received or sent is judged according to the agreed PID. While diagnostic functions may be implemented according to the schedule.
The foregoing detailed description of the preferred embodiments of the invention has been presented. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.
Claims (5)
1. A LIN network simulation system is characterized in that: the MCU is connected with an AND gate through two LIN channels, the output end of the AND gate is connected with an isolator, the isolator is connected to an LIN transceiver, and the LIN transceiver is connected with an LIN bus.
2. The LIN network simulation system of claim 1, wherein: TX pins of the two LIN channels are connected with the AND gate and are connected to the TXD end of the LIN transceiver through the isolator.
3. The LIN network simulation system of claim 1, wherein: RX pins of the two LIN channels are directly connected to RXD ends of the LIN transceivers through the isolators.
4. The LIN network simulation system of claim 1, wherein: and the GPIO pin output control module is also included, and the VIA pin and the VIB pin of the GPIO pin output control module are respectively connected to the two GPIO pins of the MCU.
5. A data transmission method based on LIN network is characterized in that: the method comprises the following steps:
1) two LIN channels are arranged and connected to the MCU, wherein one LIN channel supporting a master is used as a master task of a node to provide a frame header, and the other LIN channel supporting a slave is used as a slave task of the node to provide a response;
2) the TX pins of the two LIN channels are output through the same AND gate and then reach an LIN transceiver through an isolator;
3) directly connecting RX pins of the two LIN channels to the LIN transceiver through the isolator;
4) the LIN transceiver converts the received signal into a LIN node, which is connected to the LIN bus.
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CN202011245151.5A CN112272117B (en) | 2020-11-10 | LIN network simulation system and LIN network-based data transmission method |
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CN202011245151.5A CN112272117B (en) | 2020-11-10 | LIN network simulation system and LIN network-based data transmission method |
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Publication number | Priority date | Publication date | Assignee | Title |
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CN114500153A (en) * | 2022-01-24 | 2022-05-13 | 易展 | LIN controller design and operation method thereof |
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CN105159188A (en) * | 2015-08-14 | 2015-12-16 | 广州智维电子科技有限公司 | New energy finished automobile heterogeneous network emulator and control method thereof |
US20160277504A1 (en) * | 2015-03-18 | 2016-09-22 | Röchling Automotive SE & Co. KG | Lin network |
CN109787892A (en) * | 2019-01-22 | 2019-05-21 | 科力远混合动力技术有限公司 | General hybrid vehicle gateway controller |
CN213342249U (en) * | 2020-11-10 | 2021-06-01 | 重庆圣眸科技开发有限公司 | LIN network simulation system |
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20160277504A1 (en) * | 2015-03-18 | 2016-09-22 | Röchling Automotive SE & Co. KG | Lin network |
CN105159188A (en) * | 2015-08-14 | 2015-12-16 | 广州智维电子科技有限公司 | New energy finished automobile heterogeneous network emulator and control method thereof |
CN109787892A (en) * | 2019-01-22 | 2019-05-21 | 科力远混合动力技术有限公司 | General hybrid vehicle gateway controller |
CN213342249U (en) * | 2020-11-10 | 2021-06-01 | 重庆圣眸科技开发有限公司 | LIN network simulation system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114500153A (en) * | 2022-01-24 | 2022-05-13 | 易展 | LIN controller design and operation method thereof |
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