CN112270150A - Method and device for calculating transmission line parasitic parameters on packaging substrate - Google Patents

Method and device for calculating transmission line parasitic parameters on packaging substrate Download PDF

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CN112270150A
CN112270150A CN202011236582.5A CN202011236582A CN112270150A CN 112270150 A CN112270150 A CN 112270150A CN 202011236582 A CN202011236582 A CN 202011236582A CN 112270150 A CN112270150 A CN 112270150A
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transmission line
thickness
dielectric layer
width
length
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孟凡晓
杜树安
杨晓君
逯永广
林少芳
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Chengdu Haiguang Integrated Circuit Design Co Ltd
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    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00Details relating to the type of the circuit
    • G06F2115/12Printed circuit boards [PCB] or multi-chip modules [MCM]

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Abstract

The invention provides a method and a device for calculating transmission line parasitic parameters on a packaging substrate, wherein the method comprises the following steps: according to an input instruction of selecting the transmission line, acquiring the length, the width and the thickness of the selected transmission line; according to an input instruction indicating the type of the transmission line, acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of a dielectric layer insulating material; and calculating the parasitic parameters of the transmission line according to the length, the width, the thickness and the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line. The invention can automatically calculate the parasitic parameters of the transmission lines on the packaging substrate in real time.

Description

Method and device for calculating transmission line parasitic parameters on packaging substrate
Technical Field
The invention relates to the technical field of circuit design, in particular to a method and a device for calculating transmission line parasitic parameters on a packaging substrate.
Background
The packaging substrate of the chip has small line width space and thinner thickness and is used for bearing a bare chip (Die) and packaging after routing. Designing transmission lines on a package substrate requires great attention to RLC (resistance, inductance, capacitance) parasitic parameters of the transmission lines, which directly affect the performance of the chip. In the prior art, a designer cannot directly obtain parasitic parameters of a transmission line designed by the designer, and the designer needs to give a simulator to verify whether the parasitic parameters meet the requirements or not, so that the design efficiency is seriously influenced.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method and an apparatus for calculating parasitic parameters of transmission lines on a package substrate, which can automatically calculate the parasitic parameters of the transmission lines on the package substrate in real time.
In a first aspect, the present invention provides a method for calculating transmission line parasitic parameters on a package substrate, including:
according to an input instruction of selecting the transmission line, acquiring the length, the width and the thickness of the selected transmission line;
according to an input instruction indicating the type of the transmission line, acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of a dielectric layer insulating material;
and calculating the parasitic parameters of the transmission line according to the length, the width, the thickness and the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
Optionally, the parasitic parameters include parasitic resistance, parasitic inductance, and parasitic capacitance.
Optionally, the parasitic resistance R of the transmission line is calculated according to the length, width and thickness of the transmission linep
Figure BDA0002765186290000011
Wherein ρ is the bulk resistivity of the transmission line metal material, d is the length of the transmission line, w is the width of the transmission line, and t is the thickness of the transmission line.
Optionally, the parasitic inductance L of the transmission line is calculated from the length and width of the transmission linep
Figure BDA0002765186290000021
Where d is the length of the transmission line and w is the width of the transmission line.
Optionally, the parasitic capacitance C of the transmission line is calculated according to the length, width, thickness of the dielectric layer and relative dielectric constant of the dielectric layer insulating materialp
Figure BDA0002765186290000022
Or
Figure BDA0002765186290000023
The formula (5.1) is suitable for the transmission line type being a strip line, in the formula (5.1), d is the length of the strip line, w is the width of the strip line, t is the thickness of the strip line, b is the thickness of a dielectric layer between an upper conductor and a lower conductor of the strip line, and epsilon is the relative dielectric constant of a dielectric layer insulating material; the formula (5.2) is suitable for the transmission line type being a microstrip line, in the formula (5.2), d is the length of the microstrip line, w is the width of the microstrip line, t is the thickness of the microstrip line, h is the thickness of a dielectric layer between the microstrip line and a lower conductor, and epsilon is the relative dielectric constant of a dielectric layer insulating material.
Optionally, the method further comprises: and outputting the obtained parasitic parameters to a visual interface so as to be displayed on the visual interface.
In a second aspect, the present invention provides a device for calculating parasitic parameters of transmission lines on a package substrate, comprising:
the first acquisition module is used for acquiring the length, the width and the thickness of the selected transmission line according to the input instruction of selecting the transmission line;
the second acquisition module is used for acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of the dielectric layer insulating material according to an input instruction indicating the type of the transmission line;
and the calculating module is used for calculating the parasitic parameters of the transmission line according to the length, the width, the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
Optionally, the method further comprises:
and the output module is used for outputting the obtained parasitic parameters to a visual interface so as to be displayed on the visual interface.
In a third aspect, the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method for calculating the transmission line parasitic parameter on the package substrate according to the first aspect.
In a fourth aspect, the present invention provides a non-transitory computer readable storage medium, on which a computer program is stored, which when executed by a processor, implements the steps of the method for calculating transmission line parasitic parameters on a package substrate as provided in the first aspect.
The method and the device for calculating the parasitic parameters of the transmission lines on the packaging substrate can automatically calculate the parasitic parameters of the transmission lines and display the parasitic parameters to designers, thereby greatly reducing the interaction between design and simulation, reducing the time for waiting for simulation results and improving the design efficiency.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for calculating transmission line parasitic parameters on a package substrate according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a transmission line model according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of a strip line according to an embodiment of the present invention;
fig. 4 is a schematic cross-sectional structure view of a microstrip line according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a device for calculating transmission line parasitic parameters on a package substrate according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic flow chart illustrating a method for calculating transmission line parasitic parameters on a package substrate according to an embodiment of the present invention. As shown in fig. 1, an embodiment of the present invention provides a method for calculating transmission line parasitic parameters on a package substrate, including:
step 101, according to an input instruction of selecting a transmission line, obtaining the length, width and thickness of the selected transmission line.
In the embodiment of the invention, a user selects a signal transmission line for calculating the parasitic parameters, and after the user selects the transmission line, the program responds to obtain the length, the width and the thickness of the transmission line selected by the user. Fig. 2 shows a schematic model of a transmission line, where d denotes the length of the transmission line, w denotes the width of the transmission line, and t denotes the thickness of the transmission line.
Step 102, according to the input instruction indicating the transmission line type, obtaining the thickness of the dielectric layer corresponding to the transmission line and the relative dielectric constant of the dielectric layer insulating material.
In embodiments of the present invention, some of the parasitic parameters are calculated in relation to the type of transmission line, for example, the parasitic capacitance of the transmission line. When the transmission line type is a strip line or a microstrip line, the parasitic capacitance is calculated in different ways. Fig. 3 shows a schematic cross-sectional structure of a strip line, and fig. 4 shows a schematic cross-sectional structure of a microstrip line. In fig. 3, the strip line 31 runs on the inner layer and is embedded between two layers of conductors 321 and 322, and the insulating dielectric layer 33 of the PCB is around the strip line 31. In fig. 3 w denotes the width of the strip line, t denotes the thickness of the strip line, and b denotes the thickness of the dielectric layer between the conductors above and below the strip line. In fig. 4, the microstrip line 41 runs on the surface layer, 42 denotes a conductor below the microstrip line, and 43 denotes an insulating dielectric layer of the PCB. In fig. 4, w denotes the width of the microstrip line, t denotes the thickness of the microstrip line, and h denotes the thickness of the dielectric layer between the microstrip line 41 and the lower conductor 42. The relative dielectric constant of the dielectric layer dielectric material is an intrinsic parameter of the package substrate and has been determined at design time and is generally denoted by epsilon.
Step 103, calculating the parasitic parameters of the transmission line according to the length, width, thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
Specifically, the parasitic parameters calculated by the present embodiment include parasitic resistance, parasitic inductance, and parasitic capacitance. The calculation method is detailed as follows:
1. the parasitic resistance R of the transmission line can be calculated according to the length, width and thickness of the transmission linep. The calculation formula is as follows:
Figure BDA0002765186290000051
wherein ρ is the bulk resistivity of the transmission line metal material, d is the length of the transmission line, w is the width of the transmission line, and t is the thickness of the transmission line. The meaning of the parameters can be referred to the transmission line model shown in fig. 2. In the formula, RpUnits are ohm, ρ units ohm g meters, d units meter, w units meter, t units meter.
2. The parasitic inductance L of the transmission line can be calculated according to the length and the width of the transmission linep. The calculation formula is as follows:
Figure BDA0002765186290000052
where d is the length of the transmission line and w is the width of the transmission line. The meaning of the parameters can also refer to the transmission line model shown in fig. 2. In the formula, d is in centimeters, w is in centimeters, and LpThe unit is nH (nanohenries).
3. Can be determined according to the length, width, thickness of the transmission line, the thickness of the dielectric layer and the relative of the dielectric layer and the insulating material of the dielectric layerDielectric constant, calculating parasitic capacitance C of transmission linep
As described above, the types of transmission lines are different, and the method of calculating the parasitic capacitance is different. The embodiment provides a parasitic capacitance calculation method for two types of transmission lines, namely a strip line and a microstrip line.
The formula for calculating the parasitic capacitance of the strip line is as follows:
Figure BDA0002765186290000061
where d is the length of the stripline, w is the width of the stripline, t is the thickness of the stripline, b is the thickness of the dielectric layer between the conductors above and below the stripline, and ε is the relative dielectric constant of the dielectric layer insulation material. The meaning of the parameters can be referred to fig. 3. In the formula, CpThe units are pF, d is inch, w is mil, t is mil, and b is mil.
The calculation formula of the parasitic capacitance of the microstrip line is as follows:
Figure BDA0002765186290000062
wherein d is the length of the microstrip line, w is the width of the microstrip line, t is the thickness of the microstrip line, h is the thickness of the dielectric layer between the microstrip line and the lower conductor, and epsilon is the relative dielectric constant of the dielectric layer insulating material. The meaning of the parameters can be referred to fig. 4. In the formula, CpThe units are pF, d is inch, w is mil, t is mil, and h is mil.
Further, after the parasitic resistance, the parasitic inductance, and the parasitic capacitance are obtained, the obtained parasitic parameters may be output to a visual interface so as to be displayed on the visual interface. The designer judges whether the design requirements of the process are met or not according to the displayed parasitic resistance, parasitic inductance and parasitic capacitance, if the design requirements are not met, the length and the width of the transmission line are modified manually, and then the calculation method of the embodiment of the invention is used again to calculate the parasitic parameters until the design requirements are met. Therefore, the interaction with simulation personnel is reduced, the time for waiting for the simulation result is reduced, and the design efficiency is improved.
The method for calculating the transmission line parasitic parameters on the packaging substrate can automatically calculate the parasitic parameters of the transmission lines and display the parasitic parameters to designers, greatly reduces interaction between design and simulation, reduces time for waiting for simulation results, and improves design efficiency.
Fig. 5 is a schematic structural diagram illustrating a device for calculating transmission line parasitic parameters on a package substrate according to an embodiment of the present invention. As shown in fig. 5, an embodiment of the present invention provides an apparatus for calculating transmission line parasitic parameters on a package substrate, the apparatus including: a first acquisition module 501, a second acquisition module 502, and a calculation module 503, wherein,
a first obtaining module 501, configured to obtain a length, a width, and a thickness of a selected transmission line according to an input instruction for selecting the transmission line;
a second obtaining module 502, configured to obtain, according to an input instruction indicating a type of the transmission line, a thickness of a dielectric layer and a relative dielectric constant of a dielectric layer insulating material corresponding to the transmission line;
the calculating module 503 is configured to calculate a parasitic parameter of the transmission line according to the length, the width, the thickness of the dielectric layer, and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
The calculating device for the transmission line parasitic parameters on the packaging substrate provided by the embodiment of the invention can automatically calculate the parasitic parameters of the transmission line and display the parasitic parameters to designers, thereby greatly reducing the interaction between design and simulation, reducing the time for waiting for simulation results and improving the design efficiency.
Further, as an embodiment, the calculating device of the transmission line parasitic parameter on the package substrate may further include: and the output module is used for outputting the obtained parasitic parameters to a visual interface so as to be displayed on the visual interface.
The apparatus for calculating parasitic parameters of transmission lines on a package substrate according to the embodiments of the present invention is used to perform the method embodiments, and for details and flow of the method, reference is made to the embodiments, which are not repeated herein.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention. As shown in fig. 6, the electronic device may include: a processor (processor)601, a memory (memory)602, and a communication bus 603, wherein the processor 601 and the memory 602 communicate with each other via the communication bus 603. The processor 601 may execute the program instructions in the memory 602 to implement the method for calculating the transmission line parasitic parameters on the package substrate according to the foregoing embodiments, for example, the method includes: according to an input instruction of selecting the transmission line, acquiring the length, the width and the thickness of the selected transmission line; according to an input instruction indicating the type of the transmission line, acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of a dielectric layer insulating material; and calculating the parasitic parameters of the transmission line according to the length, the width, the thickness and the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
In another aspect, an embodiment of the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the method for calculating the transmission line parasitic parameter on the package substrate, including: according to an input instruction of selecting the transmission line, acquiring the length, the width and the thickness of the selected transmission line; according to an input instruction indicating the type of the transmission line, acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of a dielectric layer insulating material; and calculating the parasitic parameters of the transmission line according to the length, the width, the thickness and the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A method for calculating transmission line parasitic parameters on a package substrate is characterized by comprising the following steps:
according to an input instruction of selecting the transmission line, acquiring the length, the width and the thickness of the selected transmission line;
according to an input instruction indicating the type of the transmission line, acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of a dielectric layer insulating material;
and calculating the parasitic parameters of the transmission line according to the length, the width, the thickness and the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
2. The method of claim 1, wherein the parasitic parameters comprise parasitic resistance, parasitic inductance, and parasitic capacitance.
3. The method of claim 2, wherein the parasitic resistance R of the transmission line is calculated based on the length, width and thickness of the transmission linep
Figure FDA0002765186280000011
Wherein ρ is the bulk resistivity of the transmission line metal material, d is the length of the transmission line, w is the width of the transmission line, and t is the thickness of the transmission line.
4. The method of claim 2, wherein the parasitic inductance L of the transmission line is calculated based on the length and width of the transmission linep
Figure FDA0002765186280000012
Where d is the length of the transmission line and w is the width of the transmission line.
5. The method of claim 2, wherein the parasitic capacitance C of the transmission line is calculated based on the length, width, thickness of the dielectric layer, and relative dielectric constant of the dielectric layer insulating materialp
Figure FDA0002765186280000013
Or
Figure FDA0002765186280000021
The formula (5.1) is suitable for the transmission line type being a strip line, in the formula (5.1), d is the length of the strip line, w is the width of the strip line, t is the thickness of the strip line, b is the thickness of a dielectric layer between an upper conductor and a lower conductor of the strip line, and epsilon is the relative dielectric constant of a dielectric layer insulating material; the formula (5.2) is suitable for the transmission line type being a microstrip line, in the formula (5.2), d is the length of the microstrip line, w is the width of the microstrip line, t is the thickness of the microstrip line, h is the thickness of a dielectric layer between the microstrip line and a lower conductor, and epsilon is the relative dielectric constant of a dielectric layer insulating material.
6. The method of claim 1, further comprising: and outputting the obtained parasitic parameters to a visual interface so as to be displayed on the visual interface.
7. A device for calculating parasitic parameters of transmission lines on a package substrate, comprising:
the first acquisition module is used for acquiring the length, the width and the thickness of the selected transmission line according to the input instruction of selecting the transmission line;
the second acquisition module is used for acquiring the thickness of a dielectric layer corresponding to the transmission line and the relative dielectric constant of the dielectric layer insulating material according to an input instruction indicating the type of the transmission line;
and the calculating module is used for calculating the parasitic parameters of the transmission line according to the length, the width, the thickness of the dielectric layer and the relative dielectric constant of the dielectric layer insulating material of the transmission line.
8. The apparatus of claim 7, further comprising:
and the output module is used for outputting the obtained parasitic parameters to a visual interface so as to be displayed on the visual interface.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to implement the steps of the method for calculating transmission line parasitic parameters on a package substrate according to any one of claims 1 to 6.
10. A non-transitory computer-readable storage medium, on which a computer program is stored, wherein the computer program, when being executed by a processor, implements the steps of the method for calculating transmission line parasitic parameters on a package substrate according to any one of claims 1 to 6.
CN202011236582.5A 2020-11-06 2020-11-06 Method and device for calculating transmission line parasitic parameters on packaging substrate Pending CN112270150A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106326542A (en) * 2016-08-19 2017-01-11 西安电子科技大学 Design method of low-pass filter based on DGS (Defected Ground Structure)
CN107330184A (en) * 2017-06-29 2017-11-07 南通大学 The emulation test method and storage medium and equipment of bonding line in electric component
CN207819759U (en) * 2017-12-20 2018-09-04 维谛技术有限公司 A kind of electromagnetic interference electromagnetic interface filter and filter circuit
TW202029021A (en) * 2019-01-28 2020-08-01 和碩聯合科技股份有限公司 Method for calculating impedance of conductor
CN111599319A (en) * 2020-06-01 2020-08-28 海信视像科技股份有限公司 Backlight driving circuit, method and display device
CN111624407A (en) * 2020-04-08 2020-09-04 南京航空航天大学 Method for extracting parasitic parameters of DC/DC converter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106326542A (en) * 2016-08-19 2017-01-11 西安电子科技大学 Design method of low-pass filter based on DGS (Defected Ground Structure)
CN107330184A (en) * 2017-06-29 2017-11-07 南通大学 The emulation test method and storage medium and equipment of bonding line in electric component
CN207819759U (en) * 2017-12-20 2018-09-04 维谛技术有限公司 A kind of electromagnetic interference electromagnetic interface filter and filter circuit
TW202029021A (en) * 2019-01-28 2020-08-01 和碩聯合科技股份有限公司 Method for calculating impedance of conductor
CN111624407A (en) * 2020-04-08 2020-09-04 南京航空航天大学 Method for extracting parasitic parameters of DC/DC converter
CN111599319A (en) * 2020-06-01 2020-08-28 海信视像科技股份有限公司 Backlight driving circuit, method and display device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
尚玉玲 等: "双路径复杂互连结构串扰分析及等效电路研究", 《仪表技术与传感器》 *
高巍 等: "6.25Gbps×12通道小型甚短距离并行光收发模块的研制", 《应用光学》 *

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Application publication date: 20210126