CN112269598A - Server starting control method and system, electronic equipment and storage medium - Google Patents
Server starting control method and system, electronic equipment and storage medium Download PDFInfo
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Abstract
The application discloses a method, a system, equipment and a medium for controlling the starting of a server, wherein the method comprises the following steps: after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system; reading second type acceleration values of acceleration sensors which are arranged on all memory PCB boards in a server in advance, and generating a first matrix according to all the second type acceleration values; calculating whether the first type of acceleration value and the first matrix are orthogonal or not, and judging whether the memory and the system mainboard are in a vertical state or not; if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation. According to the method and the device, whether the memory and the system mainboard are in a vertical state or not can be calculated through the memory and the acceleration sensor arranged on the system mainboard, whether each memory is accurately assembled or not is detected, if not, the starting operation is forbidden, the system is prevented from being abnormal and burnt, and the safety of the system is ensured.
Description
Technical Field
The present application relates to the field of server technologies, and in particular, to a server start control method, a server start control system, an electronic device, and a computer-readable storage medium.
Background
In the existing mechanism, the server usually has many memories, and the system of the board memory is easily assembled without complete installation risks, such as the skew of the interfaces of the memories, resulting in incomplete lap joint of the contact points.
The existing system does not have a good detection mechanism for the correct memory placement. Usually by manual visual inspection or by structural fixing in the desired overlapping manner. However, this method cannot effectively avoid assembly errors of an operator, and once the system is powered on during startup under the condition of the assembly errors, the system is easily abnormal, and even the risk of burn-in exists.
Therefore, how to solve the above problems is a great concern for those skilled in the art.
Disclosure of Invention
The application aims to provide a server starting control method, a server starting control system, an electronic device and a computer readable storage medium, and risks of system abnormity and machine burning are avoided.
In order to achieve the above object, the present application provides a server start control method, including:
after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system;
reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values;
judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not;
if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation.
Optionally, the determining whether each memory and the server system motherboard are in a vertical state by calculating whether the first class acceleration value and the first matrix are orthogonal includes:
calculating the product of the first type acceleration value and the first matrix by using a first script, and judging whether the product belongs to a first preset numerical range or not;
if so, judging whether the first type of acceleration value is orthogonal to the first matrix and whether each memory is vertical to the server system mainboard.
Optionally, after the controlling CPLD chip prohibits the execution of the boot operation, the method further includes:
and sending a starting signal to a preset LED lamp to control the preset LED lamp to start, so as to realize the reminding of the abnormal state of the memory.
Optionally, after determining whether each memory and the server system motherboard are in a vertical state, the method further includes:
if the memory and the server system main board are judged to be in a non-vertical state, a second matrix is generated according to the first matrix by using a second script, and the second matrix is a matrix obtained by multiplying the transpose matrix of the first matrix and the first matrix;
acquiring each element value of the second matrix, which is positioned on a diagonal line of the matrix;
respectively judging whether each element value belongs to a second preset numerical range;
and if the target element value does not belong to the second preset numerical range, judging that the position of the target memory corresponding to the target element value is abnormal.
Optionally, after the controlling CPLD chip prohibits the execution of the boot operation, the method further includes:
generating a BMC log according to the first type of acceleration value, the first matrix, the second matrix and the identification information and/or the position information of the target memory;
and sending the BMC log to a remote management terminal so as to carry out exception handling on the target memory.
To achieve the above object, the present application provides a server startup control system, including:
the first reading module is used for reading a first type of acceleration value acquired by an acceleration sensor which is arranged on a mainboard of the server system in advance after the BMC is powered on;
the second reading module is used for reading second type acceleration values of acceleration sensors which are arranged on all memory PCB boards in the server in advance and generating a first matrix according to all the second type acceleration values;
the orthogonal calculation module is used for judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not;
the startup control module is used for controlling the CPLD chip to execute startup operation if each memory and the server system mainboard are in a vertical state; and if the memories and the server system mainboard are in a non-vertical state, controlling the CPLD chip to forbid the execution of the starting operation.
Optionally, the orthogonal calculating module includes:
the product calculation unit is used for calculating the product of the first type of acceleration value and the first matrix by using a first script and judging whether the product belongs to a first preset value range or not;
and the vertical judging unit is used for judging whether the first type of acceleration value is orthogonal to the first matrix or not and whether each memory and the server system owner are in a vertical state or not if the product belongs to the first preset numerical value range.
Optionally, the method further includes:
a matrix generation module, configured to generate a second matrix according to the first matrix by using a second script if it is determined that each memory and the server system motherboard are in a non-vertical state, where the second matrix is a matrix obtained by multiplying a transposed matrix of the first matrix by the first matrix;
the element acquisition module is used for acquiring each element value positioned on a matrix diagonal in the second matrix;
the range judging module is used for respectively judging whether each element value belongs to a second preset numerical value range;
and the abnormity determining module is used for determining that the position of the target memory corresponding to the target element value is abnormal if the target element value does not belong to the second preset numerical range.
To achieve the above object, the present application provides an electronic device including:
a memory for storing a computer program;
a processor for implementing the steps of any of the server startup control methods disclosed above when executing the computer program.
To achieve the above object, the present application provides a computer-readable storage medium having a computer program stored thereon, where the computer program is executed by a processor to implement the steps of any one of the server startup control methods disclosed in the foregoing.
According to the scheme, the server starting control method provided by the application comprises the following steps: after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system; reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values; judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not; if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation. According to the method, the acceleration sensors arranged on the memory and the server system mainboard are used for acquiring the acceleration values of the memory and the server system mainboard, whether each memory and the server system mainboard are in a vertical state or not is calculated according to the acceleration values, whether each memory is accurately assembled or not is detected, if not, the starting operation is forbidden, the system is prevented from being abnormal and burnt, and the safety of the system is ensured.
The application also discloses a server starting control system, an electronic device and a computer readable storage medium, which can also realize the technical effects.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flowchart of a server startup control method disclosed in an embodiment of the present application;
FIG. 2 is a schematic view of an acceleration sensor placement measurement;
fig. 3 is a flowchart of another server startup control method disclosed in the embodiment of the present application;
fig. 4 is a schematic diagram illustrating a specific architecture of a server startup control scheme according to an embodiment of the present application;
fig. 5 is a structural diagram of a server startup control system disclosed in an embodiment of the present application;
fig. 6 is a block diagram of an electronic device disclosed in an embodiment of the present application;
fig. 7 is a block diagram of another electronic device disclosed in the embodiments of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application discloses a server starting control method, which avoids the risks of system abnormity and machine burning.
Referring to fig. 1, a server start control method disclosed in an embodiment of the present application includes:
s101: after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system;
in the embodiment of the application, an acceleration sensor can be placed on a main board of the server system in advance, the acceleration sensor is a device for measuring acceleration, and the device for measuring the acceleration is used for measuring the self motion relative to a device for sensing remotely. Such as the acceleration sensor shown in fig. 2, which can detect the momentum in each direction. When the acceleration sensor is flatly placed on the main board, the momentum of the X axis is-1G. After the acceleration sensor is arranged on the mainboard of the server system, when the BMC is powered on, the first type of acceleration value acquired by the acceleration sensor can be read.
S102: reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values;
it can be understood that, in the embodiment of the present application, the acceleration sensor is also disposed on the PCB of each memory, and may be used to monitor the acceleration of each memory. After the BMC is powered on, the second-class acceleration values acquired by the acceleration sensors on the memory PCB may be read, and the first matrix may be generated according to all the second-class acceleration values, specifically, the second-class acceleration values corresponding to all the memory motherboards may be arranged according to the sequence of the memories in the array, so as to generate the first matrix.
It should be noted that, the above steps S101 and S102 may be performed synchronously in a specific implementation, or the step S101 may be performed first, and then the step S102 is performed, or the step S102 is performed first, and then the step S101 is performed, that is, the first type acceleration value corresponding to the acceleration sensor on the server system motherboard and the second type acceleration value corresponding to the memory PCB board may be sequentially acquired, or may be acquired simultaneously, and the specific execution sequence is not limited in this embodiment.
S103: judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not;
in this step, it may be calculated whether the first type of acceleration value and the first matrix are orthogonal to each other, so as to further determine whether each memory and the server system motherboard are in a vertical state. Specifically, a first script may be utilized to calculate a product of a first type of acceleration value and the first matrix, and determine whether the product falls within a first preset value range; if so, the first type of acceleration value is judged to be orthogonal to the first matrix, and each memory and the server system mainboard are in a vertical state.
Wherein the first script is specifically configured to calculate an inner product of a matrix; the preset numerical range may be specifically 0 ± error value, and the error value may be set according to an actually allowable error range, which is not limited herein.
S104: if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation.
In the specific implementation, if the memory and the server system mainboard are in the vertical state, the memory is represented to be correct, the boot can be allowed, and the BMC can control the CPLD chip to execute the boot operation; if the memories and the server system mainboard are in a non-vertical state, the memory placement is represented to be abnormal, the starting is forbidden, and the BMC controls the CPLD chip to forbid the execution of the starting operation.
As a preferred embodiment, after the CPLD chip is controlled to prohibit execution of the power-on operation, a turn-on signal may be sent to the preset LED lamp to control the preset LED lamp to start, so as to realize the reminding of the abnormal memory placement state.
According to the scheme, the server starting control method provided by the application comprises the following steps: after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system; reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values; judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not; if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation. According to the method, the acceleration sensors arranged on the memory and the server system mainboard are used for acquiring the acceleration values of the memory and the server system mainboard, whether each memory and the server system mainboard are in a vertical state or not is calculated according to the acceleration values, whether each memory is accurately assembled or not is detected, if not, the starting operation is forbidden, the system is prevented from being abnormal and burnt, and the safety of the system is ensured.
The embodiment of the application discloses another server starting control method, and compared with the previous embodiment, the embodiment further describes and optimizes the technical scheme. Referring to fig. 3, specifically:
s201: after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system;
s202: reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values;
s203: judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not; if yes, the process goes to step S204, and if no, the process goes to step S205;
s204: controlling the CPLD chip to execute the starting operation;
s205: controlling the CPLD chip to forbid the execution of the starting-up operation, and generating a second matrix according to the first matrix by using a second script, wherein the second matrix is a matrix obtained by multiplying the transposed matrix of the first matrix by the first matrix;
in the embodiment of the application, if it is determined that each of the memories and the server system motherboard are in a non-perpendicular state, the CPLD chip is first controlled to prohibit execution of the boot operation, and the second script is further used to generate the second matrix. The second matrix is specifically a matrix obtained by multiplying the transposed matrix of the first matrix by the first matrix itself. The second script is specifically a script which is written in advance and is used for calculating the product of the transpose matrix and the original matrix.
S206: acquiring each element value of the second matrix, which is positioned on a diagonal line of the matrix;
s207: respectively judging whether each element value belongs to a second preset numerical range;
after the second matrix is obtained through calculation, each element value located in the diagonal line of the matrix can be obtained, and whether each element value belongs to a second preset numerical range or not is judged respectively. The second predetermined numerical range may be a 1 ± error value, and the error value may be set according to an actually allowable error range, which is not limited herein.
S208: and if the target element value does not belong to the second preset numerical range, judging that the position of the target memory corresponding to the target element value is abnormal.
If the target element value is judged not to belong to the second preset numerical range, the position abnormality of the target memory corresponding to the target element value can be judged. Specifically, the sequence or the identification number of the corresponding memory in the memory array may be determined according to the target element value, so as to determine the target memory.
In a preferred embodiment, after the CPLD chip is controlled to prohibit execution of the boot operation, a BMC log may be further generated according to the first-class acceleration value, the first matrix, the second matrix, and the identification information and/or the location information of the target memory, and the BMC log may be sent to the remote management terminal, so as to perform exception handling on the target memory. That is, the BMC log may be recorded according to the detection process and the detection result, and sent to the remote management terminal, and the administrator may know the target memory with the location abnormality through the remote management terminal, so as to perform the abnormality processing.
The following describes a server startup control method provided in an embodiment of the present application through a specific implementation scenario. In the embodiment of the application, the acceleration sensors can be placed on the server system main board and the PCB main board of each memory in advance, and the BMC can obtain the corresponding acceleration value by reading the reading value of the acceleration sensor and place the reading value into the matrix.
Specifically, the BMC may read an accelerometer read value of the server system motherboard:
taking 16 memory systems as an example, the BMC may read the accelerometer read values of each memory:
and put the array of all DDRs into one matrix:
further, calculating the matrix MB and the matrix DDRALLThe product of (a):
it is determined whether Value _ a approaches 0. If so, the system is allowed to boot. If not, further calculating Matrix _ A:
judging each diagonal element value V in Matrix _ A1～V16If the value of any element is not close to 1, the corresponding DDR position is judged to be abnormal.
Fig. 4 is a schematic diagram of a specific architecture of a server start control scheme according to an embodiment of the present application. Specifically, the BMC can read the read value of each DDR upper acceleration sensor and control whether the CPLD executes the starting program according to the calculation result, so that the problem of incomplete memory insertion can be avoided, and the memory with abnormality can be further judged, and the stability of the whole system is effectively enhanced.
In the following, a server start control system provided by an embodiment of the present application is introduced, and a server start control system described below and a server start control method described above may be referred to each other.
Referring to fig. 5, a server startup control system provided in an embodiment of the present application includes:
the first reading module 301 is configured to read a first type of acceleration value acquired by an acceleration sensor preset on a server system motherboard after the BMC is powered on;
the second reading module 302 is configured to read second-type acceleration values of acceleration sensors that are preset on each memory PCB in the server, and generate a first matrix according to all the second-type acceleration values;
an orthogonal calculation module 303, configured to determine whether each memory and the server system motherboard are in a vertical state by calculating whether the first class acceleration value and the first matrix are orthogonal;
the startup control module 304 is configured to control the CPLD chip to execute a startup operation if each memory is in a vertical state with the server system motherboard; and if the memories and the server system mainboard are in a non-vertical state, controlling the CPLD chip to forbid the execution of the starting operation.
For the specific implementation process of the modules 301 to 304, reference may be made to the corresponding content disclosed in the foregoing embodiments, and details are not repeated here.
On the basis of the foregoing embodiment, as a preferred implementation, the orthogonal calculation module may specifically include:
the product calculation unit is used for calculating the product of the first type of acceleration value and the first matrix by using a first script and judging whether the product belongs to a first preset value range or not;
and the vertical judging unit is used for judging that the first type of acceleration value is orthogonal to the first matrix if the product belongs to the first preset numerical value range, and each memory and the server system mainboard are in a vertical state.
On the basis of the foregoing embodiment, as a preferred implementation, the server startup control system may further include:
a matrix generation module, configured to generate a second matrix according to the first matrix by using a second script if it is determined that each memory and the server system motherboard are in a non-vertical state, where the second matrix is a matrix obtained by multiplying a transposed matrix of the first matrix by the first matrix;
the element acquisition module is used for acquiring each element value positioned on a matrix diagonal in the second matrix;
the range judging module is used for respectively judging whether each element value belongs to a second preset numerical value range;
and the abnormity determining module is used for determining that the position of the target memory corresponding to the target element value is abnormal if the target element value does not belong to the second preset numerical range.
The present application further provides an electronic device, and as shown in fig. 6, an electronic device provided in an embodiment of the present application includes:
a memory 100 for storing a computer program;
the processor 200, when executing the computer program, may implement the steps provided by the above embodiments.
Specifically, the memory 100 includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer-readable instructions, and the internal memory provides an environment for the operating system and the computer-readable instructions in the non-volatile storage medium to run. The processor 200 may be a Central Processing Unit (CPU), a controller, a microcontroller, a microprocessor or other data Processing chip in some embodiments, and provides computing and controlling capability for the electronic device, and when executing the computer program stored in the memory 100, the server start control method disclosed in any of the foregoing embodiments may be implemented.
On the basis of the above embodiment, as a preferred implementation, referring to fig. 7, the electronic device further includes:
and an input interface 300 connected to the processor 200, for acquiring computer programs, parameters and instructions imported from the outside, and storing the computer programs, parameters and instructions into the memory 100 under the control of the processor 200. The input interface 300 may be connected to an input device for receiving parameters or instructions manually input by a user. The input device may be a touch layer covered on a display screen, or a button, a track ball or a touch pad arranged on a terminal shell, or a keyboard, a touch pad or a mouse, etc.
And a display unit 400 connected to the processor 200 for displaying data processed by the processor 200 and for displaying a visualized user interface. The display unit 400 may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, an OLED (Organic Light-Emitting Diode) touch panel, or the like.
And a network port 500 connected to the processor 200 for performing communication connection with each external terminal device. The communication technology adopted by the communication connection can be a wired communication technology or a wireless communication technology, such as a mobile high definition link (MHL) technology, a Universal Serial Bus (USB), a High Definition Multimedia Interface (HDMI), a wireless fidelity (WiFi), a bluetooth communication technology, a low power consumption bluetooth communication technology, an ieee802.11 s-based communication technology, and the like.
While fig. 7 shows only an electronic device having the assembly 100 and 500, those skilled in the art will appreciate that the configuration shown in fig. 7 is not intended to be limiting of electronic devices and may include fewer or more components than those shown, or some components may be combined, or a different arrangement of components.
The present application also provides a computer-readable storage medium, which may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk. The storage medium stores thereon a computer program which, when executed by a processor, implements the server startup control method disclosed in any of the foregoing embodiments.
According to the method and the system, the acceleration sensors arranged on the memory and the server system mainboard are used for acquiring the acceleration values of the memory and the server system mainboard, whether each memory and the server system mainboard are in a vertical state or not is calculated according to the acceleration values, whether each memory is accurately assembled or not is detected, if not, the starting operation is forbidden, the system is prevented from being abnormal and burnt out, and the safety of the system is ensured.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (10)
1. A server startup control method, comprising:
after the BMC is powered on, reading a first type of acceleration value acquired by an acceleration sensor which is preset on a mainboard of a server system;
reading second-class acceleration values of acceleration sensors which are preset on all memory PCB boards in a server, and generating a first matrix according to all the second-class acceleration values;
judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not;
if yes, controlling the CPLD chip to execute the starting operation; if not, the CPLD chip is controlled to forbid the execution of the starting operation.
2. The method according to claim 1, wherein the determining whether each memory and the server system motherboard are in a vertical state by calculating whether the first type of acceleration value and the first matrix are orthogonal comprises:
calculating the product of the first type acceleration value and the first matrix by using a first script, and judging whether the product belongs to a first preset numerical range or not;
if so, judging that the first type of acceleration value is orthogonal to the first matrix, and enabling each memory and the server system mainboard to be in a vertical state.
3. The server boot control method according to claim 1, wherein after the controlling CPLD chip prohibits the execution of the boot operation, the method further comprises:
and sending a starting signal to a preset LED lamp to control the preset LED lamp to start, so as to realize the reminding of the abnormal state of the memory.
4. The server startup control method according to any one of claims 1 to 3, wherein after determining whether each of the memories and the server system motherboard are in a vertical state, the method further includes:
if the memory and the server system main board are judged to be in a non-vertical state, a second matrix is generated according to the first matrix by using a second script, and the second matrix is a matrix obtained by multiplying the transpose matrix of the first matrix and the first matrix;
acquiring each element value of the second matrix, which is positioned on a diagonal line of the matrix;
respectively judging whether each element value belongs to a second preset numerical range;
and if the target element value does not belong to the second preset numerical range, judging that the position of the target memory corresponding to the target element value is abnormal.
5. The server boot control method according to claim 4, wherein after the controlling CPLD chip prohibits the execution of the boot operation, the method further comprises:
generating a BMC log according to the first type of acceleration value, the first matrix, the second matrix and the identification information and/or the position information of the target memory;
and sending the BMC log to a remote management terminal so as to carry out exception handling on the target memory.
6. A server startup control system, characterized by comprising:
the first reading module is used for reading a first type of acceleration value acquired by an acceleration sensor which is arranged on a mainboard of the server system in advance after the BMC is powered on;
the second reading module is used for reading second type acceleration values of acceleration sensors which are arranged on all memory PCB boards in the server in advance and generating a first matrix according to all the second type acceleration values;
the orthogonal calculation module is used for judging whether each memory and the server system mainboard are in a vertical state or not by calculating whether the first type of acceleration value and the first matrix are orthogonal or not;
the startup control module is used for controlling the CPLD chip to execute startup operation if each memory and the server system mainboard are in a vertical state; and if the memories and the server system mainboard are in a non-vertical state, controlling the CPLD chip to forbid the execution of the starting operation.
7. The server boot control system of claim 6, wherein the orthogonal computation module comprises:
the product calculation unit is used for calculating the product of the first type of acceleration value and the first matrix by using a first script and judging whether the product belongs to a first preset value range or not;
and the vertical judging unit is used for judging that the first type of acceleration value is orthogonal to the first matrix if the product belongs to the first preset numerical value range, and each memory and the server system mainboard are in a vertical state.
8. The server boot control system according to claim 6, further comprising:
a matrix generation module, configured to generate a second matrix according to the first matrix by using a second script if it is determined that each memory and the server system motherboard are in a non-vertical state, where the second matrix is a matrix obtained by multiplying a transposed matrix of the first matrix by the first matrix;
the element acquisition module is used for acquiring each element value positioned on a matrix diagonal in the second matrix;
the range judging module is used for respectively judging whether each element value belongs to a second preset numerical value range;
and the abnormity determining module is used for determining that the position of the target memory corresponding to the target element value is abnormal if the target element value does not belong to the second preset numerical range.
9. An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the server startup control method according to any one of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the server startup control method according to any one of claims 1 to 6.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103455448A (en) * | 2012-05-30 | 2013-12-18 | 鸿富锦精密工业（深圳）有限公司 | Shake resisting method and system for server |
| CN111475218A (en) * | 2020-04-26 | 2020-07-31 | 中国长城科技集团股份有限公司 | Server starting method, server and computer readable storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103455448A (en) * | 2012-05-30 | 2013-12-18 | 鸿富锦精密工业（深圳）有限公司 | Shake resisting method and system for server |
| CN111475218A (en) * | 2020-04-26 | 2020-07-31 | 中国长城科技集团股份有限公司 | Server starting method, server and computer readable storage medium |
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