CN112259569A - Image sensor and forming method of pixel structure of image sensor - Google Patents

Image sensor and forming method of pixel structure of image sensor Download PDF

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Publication number
CN112259569A
CN112259569A CN202011187225.4A CN202011187225A CN112259569A CN 112259569 A CN112259569 A CN 112259569A CN 202011187225 A CN202011187225 A CN 202011187225A CN 112259569 A CN112259569 A CN 112259569A
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gate
photodiode
photodiode region
semiconductor substrate
image sensor
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黄斌冰
张磊
王奇伟
陈昊瑜
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14643Photodiode arrays; MOS imagers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14609Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H01L27/14614Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof

Abstract

The invention provides an image sensor and a forming method of a pixel structure of the image sensor, which are applied to the technical field of semiconductors. In the method for forming the pixel structure of the image sensor, a part of the gate structure of the transmission transistor in the pixel structure is expanded into a photodiode region in a semiconductor substrate by forming a non-closed ring (for example, a C-shaped) groove with a notch, and the non-closed ring-shaped gate groove is a special structure with an inner surface and an outer surface, so that the effective area of the gate structure of the transmission transistor can be increased by utilizing the characteristic that the inner surface and the outer surface of the gate groove can carry out electron transmission, the width of the photodiode is extended in the transverse direction, the electron transmission communication area is increased, the transmission rate of photo-generated electrons is increased, the electron residue at the bottom of the diode is reduced, and the full well capacity of the photodiode is finally improved.

Description

Image sensor and forming method of pixel structure of image sensor
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to an image sensor and a method for forming a pixel structure of the image sensor.
Background
CMOS image sensors have been developed rapidly over the last decade, and are now widely used in the fields of mobile phones, computers, digital cameras, and the like. Generally, one active pixel unit of a CMOS image sensor includes a Photodiode (PD) and several transistors in an epitaxial layer, and for example, a 4T structure CMOS image sensor, four transistors specifically include a Transfer transistor 110(Transfer, Tx), a Source follower transistor (SF), a Reset transistor (RST) and a Row Select transistor (RS). Among them, the basic operation principle of the CMOS image sensor is as follows: before illumination, the reset tube and the transfer tube are opened to release the original electrons in the photodiode area; when the light is irradiated, all the transistors are turned off, and electric charges are generated in the space charge area of the photodiode; in reading, the transfer pipe is opened, the charges stored in the PD region are transferred to a Floating Diffusion (FD), and after the transfer, the transfer pipe is closed and waits for the next entrance of light. The charge signal on the floating diffusion node is then used to adjust the source follower transistor, convert the charge to a voltage, and output the current through the row select transistor into the analog-to-digital conversion circuit.
At present, with the continuous jump of the standard CMOS process level and the market demand for small-sized pixels, the pixel size of the CMOS image sensor has been gradually reduced from 5.6mm to 1.0 mm. However, for small pixel image sensors, because the pixel is smaller, the photon-converted electrons are also smaller, and the full well charge is on the order of thousands. At present, the electron transmission mode of the surface channel and the vertical channel has a relatively small path, and electrons in the deep position of the photodiode need to pass through the whole junction region and are easily recombined to cause low extraction efficiency. Moreover, electrons at the P-N junction depth require a certain amount of time and voltage to complete the transmission, which is not conducive to fast reading.
Therefore, how to effectively prepare one TG without affecting the chip area, lighting and the like, and simultaneously, increasing the transmission rate and controlling the manufacturing cost of the chip become problems to be solved in the field of development of small-pixel image sensor chips.
Disclosure of Invention
The invention aims to provide a forming method of an image sensor pixel structure, which aims to solve the problem that the transmission rate of electrons at the deep position of a photodiode is low due to the fact that a surface channel and a vertical channel path in the existing image sensor pixel structure are relatively small.
In order to solve the above technical problem, the present invention provides a method for forming a pixel structure of an image sensor, including:
providing a semiconductor substrate, wherein a device isolation structure and at least one photodiode region defined by the device isolation structure are formed in the semiconductor substrate;
etching the semiconductor substrate of at least the photodiode region to form at least one gate trench required by each photodiode region, wherein the cross section of the gate trench parallel to the semiconductor substrate is a non-closed ring with a notch;
and forming a patterned gate structure required by each photodiode region, wherein in each photodiode region, the patterned gate structures fill the gate grooves, and the patterned gate structures of the photodiode regions are separated from each other.
Optionally, the device isolation structure may be a P-type isolation well.
Alternatively, the step of providing the semiconductor substrate having the device isolation structure and the photodiode region may include:
providing a semiconductor substrate, and forming a patterned hard mask layer on the semiconductor substrate;
performing P-type ion implantation on the semiconductor substrate by taking the patterned hard mask layer as a mask to form a P-type isolation well structure, and performing well ion implantation on the semiconductor substrate by adopting first conductive type ions before or after the P-type isolation well structure is formed to form a photodiode region;
and performing ion implantation on the surface layer of the photodiode region by using ions of the second conductive type to form a photodiode in the photodiode region.
Optionally, each gate trench required for each photodiode region is completely located in the photodiode region, and the patterned gate structure required for each photodiode region is completely located in the photodiode region;
alternatively, at least one gate trench of each photodiode region extends into a portion of the device isolation structure at the periphery of the photodiode region, and the patterned gate structure required for each photodiode region also extends over a portion of the device isolation structure at the periphery of the photodiode region.
Optionally, the step of forming a patterned gate structure required for each of the photodiode regions may include:
forming a gate oxide layer through a thermal oxidation process or a deposition process;
depositing a gate layer on the gate oxide layer, wherein each gate groove is at least filled with the deposited gate material;
flattening the gate layer until the thickness of the gate layer meets the requirement;
and photoetching and etching the gate electrode layer and the gate oxide layer to form the patterned gate structures which are separated from each other on two adjacent photodiode areas.
Alternatively, the non-closed ring may be a circular ring, an elliptical ring, or a polygonal ring having a notch.
Optionally, when the non-closed ring is a ring with a notch, the inner circle radius of the non-closed ring may range from 0.1 μm to 0.2 μm, and the ratio of the inner circle radius a of the non-closed ring to the outer circle radius b thereof may be 1:5 to 1: 1.
Optionally, a depth of the gate trench in a direction perpendicular to the upper surface of the semiconductor substrate may range from 0.3 μm to 0.5 μm.
Optionally, each of the photodiode regions is arranged in an array, and in a 2 × 2 array region formed by four photodiode regions, each of the gate trenches is disposed in a corner region where the four photodiode regions are adjacent to each other, and the notch of each of the gate trenches is disposed facing a vertex angle of the corner region.
Based on the method for forming the pixel structure of the image sensor, the invention also provides an image sensor which can comprise a plurality of pixel structures, wherein each pixel structure is formed by the method for forming the pixel structure of the image sensor.
Compared with the prior art, the technical scheme of the invention has at least one of the following beneficial effects:
in the method for forming the pixel structure of the image sensor provided by the invention, by extending a portion of the gate structure of the transfer transistor in the pixel structure into the photodiode region in the semiconductor substrate in the form of a non-closed loop (e.g., C-shaped) trench having a notch, since the gate trench of the non-closed loop shape has a special structure having an inner ring surface and an outer ring surface, therefore, the effective area of the gate structure of the transfer transistor can be increased by utilizing the characteristic that the inner surface and the outer surface of the gate groove can carry out electron transfer, and simultaneously the width of the photodiode is extended in the transverse direction, and then increased electron transmission communication area, improved photoproduction electron transmission rate, reduced the electron residue of diode bottom, promoted the full trap capacity of photodiode finally. On the other hand, the manufacturing cost of the chip can be reduced under the condition of not influencing the area and the lighting of the chip. In addition, the electron transmission communication area in the pixel structure is increased, so that the electron residue at the bottom of the diode is reduced, and white pixels are reduced.
Drawings
FIG. 1 is a flow chart illustrating a method for forming a pixel structure of an image sensor according to an embodiment of the invention;
FIGS. 2a to 2c are schematic structural diagrams illustrating a method for forming a pixel structure of an image sensor in a manufacturing process according to an embodiment of the invention;
FIG. 3 is a top view of an image sensor pixel structure according to an embodiment of the invention;
fig. 4 is a schematic cross-sectional view along the direction AA' in fig. 3.
Wherein the reference numbers are as follows:
100-a semiconductor substrate; 101-device isolation structure (P-type isolation well);
102-a gate trench; 110-photodiode region;
120-protective layer (P-type injection layer); 130-patterning a gate structure;
131-a gate oxide layer; 132-gate layer.
Detailed Description
As described in the background, for small pixel image sensors, because the pixel is small, the photon-converted electrons are also small, and the full well charge is on the order of thousands. At present, the electron transmission mode of the surface channel and the vertical channel has a relatively small path, and electrons in the deep position of the photodiode need to pass through the whole junction region and are easily recombined to cause low extraction efficiency. Moreover, electrons at the P-N junction depth require a certain amount of time and voltage to complete the transmission, which is not conducive to fast reading.
Therefore, the invention provides a forming method of an image sensor pixel structure, which aims to solve the problem that the surface channel electron and vertical channel electron transmission paths in the image sensor pixel structure are relatively small, so that the transmission rate of electrons in the deep position of a photodiode is low.
Referring to fig. 1, fig. 1 is a schematic flow chart of a method for forming a pixel structure of an image sensor according to the present invention. The method specifically comprises the following steps:
step S100, providing a semiconductor substrate, in which a device isolation structure and at least one photodiode region defined by the device isolation structure are formed;
step S200, at least etching the semiconductor substrate of the photodiode region to form at least one mutually independent gate trench required by each photodiode region, wherein the cross section of the gate trench parallel to the semiconductor substrate is a non-closed ring with a gap;
step S300 is to form a patterned gate structure required by each of the photodiode regions, where in each of the photodiode regions, the patterned gate structure fills the gate trenches, and the patterned gate structures of the photodiode regions are separated from each other.
That is, in the method for forming the pixel structure of the image sensor provided by the present invention, by extending a portion of the gate structure of the transfer transistor in the pixel structure into the photodiode region in the semiconductor substrate in the form of a non-closed ring (e.g., C-shaped) trench having a notch, the effective area of the gate structure of the transfer transistor can be increased by using the inner ring surface and the outer ring surface of the gate trench in the shape of the non-closed ring, and the width of the photodiode can be extended in the lateral direction, so that the electron transfer area is increased, the photo-generated electron transfer rate is increased, the electron residue at the bottom of the diode is reduced, and finally the full well capacity of the photodiode is increased. On the other hand, the manufacturing cost of the chip can be reduced under the condition of not influencing the area and the lighting of the chip. In addition, the electron transmission communication area in the pixel structure is increased, so that the electron residue at the bottom of the diode is reduced, and white pixels are reduced.
The following describes a method for forming a pixel structure of an image sensor in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Fig. 2a to fig. 2c are schematic structural diagrams of a method for forming a pixel structure of an image sensor in a manufacturing process according to an embodiment of the invention.
In step S100, referring specifically to fig. 2a, a semiconductor substrate 100 is provided, wherein a device isolation structure 101 and at least one photodiode region 110 defined by the device isolation structure 101 are formed in the semiconductor substrate 100. The semiconductor substrate 100 may be any suitable substrate known in the art, and may be at least one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe), silicon carbon (SiC), silicon germanium carbon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP), or other III/V compound semiconductors, and further includes a multilayer structure composed of these semiconductors, or may be Silicon On Insulator (SOI), silicon on insulator (SSOI), silicon germanium on insulator (S-SiGeOI), silicon germanium on insulator (SiGeOI), and germanium on insulator (GeOI), or may be Double-Side Polished silicon Wafers (DSP), or may be a ceramic substrate such as alumina, quartz, or a glass substrate. Illustratively, the semiconductor substrate 100 in this embodiment is, for example, a silicon wafer.
It should be noted that, in the embodiment of the present invention, the device isolation structure 101 may be a P-type isolation well; specifically, a first P-type isolation well 101a and a second P-type isolation well 101b may be included.
In this embodiment, the image sensor is, for example, a CMOS image sensor, and may include a pixel region and a peripheral circuit region (not shown), where the pixel region may include a plurality of pixel structures distributed in an array. Each of the pixel structures is used for converting incident light into an electrical signal and outputting the electrical signal, and thus includes a photodiode having a photoelectric conversion function and a plurality of transistors (not shown) for controlling electronic readout. For example, the pixel structure of the CMOS image sensor according to the embodiment of the present invention may be a pixel structure in which 4 pixels share a floating diffusion point, as shown in fig. 3 and 4. FIG. 3 is a top view of a pixel structure of an image sensor with a 4-pixel sharing floating diffusion point according to one embodiment of the present invention; fig. 4 is a schematic cross-sectional view along the direction AA' in fig. 3. Specifically, all the photodiode regions 110 isolated by the device isolation structure 101 in the pixel structure may be arranged in an array. A patterned gate structure 130 (e.g., a region surrounded by a triangle with a broken line in fig. 3) is formed in each photodiode region 110, wherein the patterned gate structure 130 includes a first portion and a second portion, the first portion is filled in the gate trench 102 in the photodiode region 110, and the second portion is located on the semiconductor substrate 100 at the periphery of the gate trench 102 and is connected to the first portion filled in the gate trench 102. Further, in a 2 × 2 array region in which any four adjacent photodiode regions 110 are formed, each of the gate trenches 102 is disposed in a corner region in which the four photodiode regions 110 are adjacent to each other, and the notch of each of the gate trenches 102 is disposed facing a top corner of the corner region.
It is understood that in the embodiment of the present invention, two or more gate trenches 102 having a notched non-closed ring may be formed in each photodiode region 110. Illustratively, when two gate trenches 102 are formed in each photodiode region 110, the patterned gate structure required for each photodiode region 110 fills the two gate trenches 102 and extends continuously between the two adjacent gate trenches 102, i.e., the gate structures filled in the two gate trenches 102 can be connected together at the periphery of the gate trenches 102.
It should be noted that, in another embodiment, the photodiode region 110 can also be used for connecting to a Charge Coupled (CCD) image sensor. In the embodiment of the present invention, one of the pixel structures is described as a plurality of pixel structures distributed in the pixel region, and the cross-sectional structure of the pixel structure adopts the structure shown in fig. 2 c. It is understood that, among the pixel structures in the pixel region, some of the pixel structures may also be designed differently from the structures described in the present invention.
Alternatively, the embodiment of the present invention further provides a method for forming the semiconductor substrate 100 of the device isolation structure 101 and the photodiode region 110, which specifically includes the following steps:
first, referring specifically to fig. 2a, a semiconductor substrate 100 is provided, and the semiconductor substrate 100 may be any suitable substrate material known to those skilled in the art, such as a bare silicon substrate, a silicon-on-insulator substrate, etc., or a substrate having a doped epitaxial layer on a surface thereof, for example, the semiconductor substrate 100 is composed of a silicon substrate and a silicon germanium epitaxial layer on a surface thereof. A patterned mask layer (not shown) and a protection layer 120 are formed on the semiconductor substrate 100, and the protection layer 120 may be a P-type injection layer;
next, with reference to fig. 2a, with the patterned mask layer as a mask, performing P-type ion implantation on the semiconductor substrate 100 to form a P-type isolation well structure including a first P-type isolation well 101a and a second P-type isolation well 101b as a device isolation structure 101, and performing well ion implantation on the semiconductor substrate 100 by using first conductive type ions before or after forming the device isolation structure 101 to form a photodiode region 110;
thereafter, the surface layer of the photodiode region 110 is ion-implanted with ions of the second conductive type to form a photodiode in the photodiode region 110.
The first conductive type ions may be P-type ions, such as boron ions, and the second conductive type ions may be N-type ions, such as phosphorus ions. In the embodiment of the present invention, a P-well may be formed by performing P-type ion implantation in the semiconductor substrate 100, and then N-type ion implantation may be performed in a partial region in the P-well to form a photodiode. In step S200, referring to fig. 2b specifically, at least the semiconductor substrate 100 of the photodiode region 110 is etched to form at least one gate trench 102 required for each of the photodiode regions 110. The gate trench 102 may be a non-closed circular ring, an elliptical ring or a polygonal ring with a notch, and the polygonal ring with a notch may be any polygonal ring allowed by the process, such as a square ring, a pentagonal star ring, a hexagonal ring, etc.; optionally, the depth of the gate trench 102 in a direction perpendicular to the upper surface of the semiconductor substrate 100 may range from 0.3 μm to 0.5 μm. As an example, when the non-closed ring is a circular ring having a notch, the inner circle radius of the non-closed ring may range from 0.1 μm to 0.2 μm, and the ratio of the inner circle radius a of the non-closed ring to the outer circle radius b thereof may range from 1:5 to 1: 1.
In this embodiment, the gate trench 102 in the shape of a non-closed circular ring with a notch includes two surfaces, namely an inner surface and an outer surface, so that in the process of electron transmission, the two surfaces, namely the inner surface and the outer surface, of the gate trench in the shape can perform electron transmission, thereby effectively increasing the effective area of the gate structure 130 of the transmission transistor, and simultaneously extending the width of the photodiode 110 in the transverse direction, thereby increasing the electron transmission communication area, increasing the transmission rate of photo-generated electrons, reducing the electron residue at the bottom of the diode, and finally increasing the full-well capacity of the photodiode.
It should be noted that the gate trench 102 required for each photodiode region 110 is completely located in the photodiode region 110, and the patterned gate structure required for each photodiode region 110 is completely located in the photodiode region 110.
Optionally, at least one gate trench 102 of each photodiode region 110 extends into a portion of the device isolation structure 101 at the periphery of the photodiode region 110, and the patterned gate structure required for each photodiode region 110 also extends to cover a portion of the device isolation structure 101 at the periphery of the photodiode region. In the embodiment of the present invention, by placing a part of the gate trench 102 in the photodiode region 110 and a part of the gate trench in the device isolation structure 101, the photodiode can be turned off, and electrons in the photodiode can be prevented from being omitted and interfering with subsequent data reading.
In step S300, referring specifically to fig. 2c, a patterned gate structure 130 required for each of the photodiode regions 110 is formed, in each of the photodiode regions 110, the patterned gate structure 130 not only fills each of the gate trenches 102, but also extends to cover a portion of the semiconductor substrate 100 at the periphery of each of the gate trenches 102, and the patterned gate structures 130 of the photodiode regions 110 are separated from each other.
Optionally, an embodiment of the present invention provides a method for forming a patterned gate structure 130 required for each photodiode region 110, which specifically includes the following steps:
first, a gate oxide layer 131 is formed through a thermal oxidation process or a deposition process;
next, depositing a gate layer 132 on the gate oxide layer 131, wherein the deposited gate material at least fills each of the gate trenches 102;
secondly, planarizing the gate layer 132 until the thickness of the gate layer 132 meets the requirement;
then, the gate layer 132 and the gate oxide layer 131 are subjected to photolithography and etching to form the patterned gate structures 130 separated from each other in two adjacent photodiode regions, and the patterned gate structures 130 in the same photodiode region are connected into a whole.
In this embodiment, the gate oxide layer 131 may be made of silicon dioxide (SiO 2). The gate material filled in the gate trench 102 may be polysilicon. For example, the top view shape of the patterned gate structure 130 may be a triangle as shown in fig. 3, and in other embodiments, it may also be a trapezoid (not shown) or a sector (or called a sector ring). Further, when the top view of the patterned gate structure 130 is triangular (trapezoid), the patterned gate structure 130 of 4 separated photodiode regions 110 in the pixel structure sharing a floating diffusion point in 4 pixels according to the embodiment of the present invention can be formed into a quadrilateral shape, such as a square. In another embodiment, the patterned gate structures 130 of 4 mutually separated photodiode regions 110 in the pixel structure of 4 pixels sharing a floating diffusion point can also form a pattern with a non-closed circular ring in a top view.
Based on the method for forming the pixel structure of the image sensor, the embodiment of the invention also provides an image sensor, which comprises a plurality of pixel structures, wherein each pixel structure can be formed by adopting the method for forming the pixel structure of the image sensor.
In summary, in the method for forming a pixel structure of an image sensor provided by the present invention, a portion of a gate structure of a transfer transistor in the pixel structure is extended into a photodiode region in a semiconductor substrate by forming a non-closed ring (e.g., C-shaped) trench having a notch, and the non-closed ring-shaped gate trench has a special structure with inner and outer surfaces, so that the effective area of the gate structure of the transfer transistor can be increased by using the characteristic that the inner and outer surfaces of the gate trench can perform electron transfer, and the width of the photodiode can be extended in the lateral direction, thereby increasing the electron transfer communication area, increasing the transmission rate of photo-generated electrons, reducing the electron residue at the bottom of the diode, and finally increasing the full well capacity of the photodiode. On the other hand, the manufacturing cost of the chip can be reduced under the condition of not influencing the area and the lighting of the chip. In addition, the electron transmission communication area in the pixel structure is increased, so that the electron residue at the bottom of the diode is reduced, and white pixels are reduced.
It should be noted that, although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to the embodiments. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the protection scope of the technical solution of the present invention, unless the content of the technical solution of the present invention is departed from.
It should be further understood that the terms "first," "second," "third," and the like in the description are used for distinguishing between various components, elements, steps, and the like, and are not intended to imply a logical or sequential relationship between various components, elements, steps, or the like, unless otherwise indicated or indicated.
It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. For example, reference to "a step" or "an apparatus" means a reference to one or more steps or apparatuses and may include sub-steps as well as sub-apparatuses. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have the definition of a logical "or" rather than the definition of a logical "exclusive or" unless the context clearly dictates otherwise. Further, implementation of the methods and/or apparatus of embodiments of the present invention may include performing the selected task manually, automatically, or in combination.

Claims (10)

1. A method for forming a pixel structure of an image sensor is characterized by comprising the following steps:
providing a semiconductor substrate, wherein a device isolation structure and at least one photodiode region defined by the device isolation structure are formed in the semiconductor substrate;
etching the semiconductor substrate of at least the photodiode region to form at least one gate trench required by each photodiode region, wherein the cross section of the gate trench parallel to the semiconductor substrate is a non-closed ring with a notch;
and forming a patterned gate structure required by each photodiode region, wherein in each photodiode region, the patterned gate structures fill the gate grooves, and the patterned gate structures of the photodiode regions are separated from each other.
2. The method of claim 1, wherein the device isolation structure is a P-type isolation well.
3. The method of claim 2, wherein providing a semiconductor substrate having a device isolation structure and a photodiode region comprises:
providing a semiconductor substrate, and forming a patterned hard mask layer on the semiconductor substrate;
performing P-type ion implantation on the semiconductor substrate by taking the patterned hard mask layer as a mask to form a P-type isolation well structure, and performing well ion implantation on the semiconductor substrate by adopting first conductive type ions before or after the P-type isolation well structure is formed to form a photodiode region;
and performing ion implantation on the surface layer of the photodiode region by using ions of the second conductive type to form a photodiode in the photodiode region.
4. The method of claim 3, wherein the forming the pixel structure of the image sensor,
each gate trench required for each photodiode region is completely located within the photodiode region, and the patterned gate structure required for each photodiode region is completely located within the photodiode region;
alternatively, at least one gate trench of each photodiode region extends into a portion of the device isolation structure at the periphery of the photodiode region, and the patterned gate structure required for each photodiode region also extends over a portion of the device isolation structure at the periphery of the photodiode region.
5. The method as claimed in claim 4, wherein the step of forming the patterned gate structure for each photodiode region comprises:
forming a gate oxide layer through a thermal oxidation process or a deposition process;
depositing a gate layer on the gate oxide layer, wherein each gate groove is at least filled with the deposited gate material;
flattening the gate layer until the thickness of the gate layer meets the requirement;
and photoetching and etching the gate electrode layer and the gate oxide layer to form the patterned gate structures which are separated from each other on two adjacent photodiode areas.
6. The method of claim 1, wherein the non-closed ring is a circular ring, an elliptical ring, or a polygonal ring with a gap.
7. The method for forming the pixel structure of the image sensor as claimed in claim 6, wherein when the non-closed ring is a notched ring, the inner circle radius of the non-closed ring ranges from 0.1 μm to 0.2 μm, and the ratio of the inner circle radius a of the non-closed ring to the outer circle radius b thereof is 1:5 to 1: 1.
8. The method of claim 1, wherein the gate trench has a depth in a direction perpendicular to the upper surface of the semiconductor substrate in a range from about 0.3 μm to about 0.5 μm.
9. The method of claim 1, wherein each of the photodiode regions is arranged in an array, and wherein in a 2 x 2 array region of four of the photodiode regions, each of the gate trenches is disposed in a corner region where the four photodiode regions are immediately adjacent to each other, the notch of each of the gate trenches being disposed facing a top corner of the corner region.
10. An image sensor comprising a plurality of pixel structures, wherein each of the pixel structures is formed by the method of any one of claims 1 to 9.
CN202011187225.4A 2020-10-30 2020-10-30 Image sensor and forming method of pixel structure of image sensor Pending CN112259569A (en)

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CN113611600A (en) * 2021-07-29 2021-11-05 上海华力微电子有限公司 Method for manufacturing semiconductor device

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