CN112259536A - 一种抑制厚外延层半导体器件寄生bjt的方法及结构 - Google Patents
一种抑制厚外延层半导体器件寄生bjt的方法及结构 Download PDFInfo
- Publication number
- CN112259536A CN112259536A CN201910693631.9A CN201910693631A CN112259536A CN 112259536 A CN112259536 A CN 112259536A CN 201910693631 A CN201910693631 A CN 201910693631A CN 112259536 A CN112259536 A CN 112259536A
- Authority
- CN
- China
- Prior art keywords
- semiconductor device
- epitaxial layer
- parasitic bjt
- thick
- epitaxial
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 238000000034 method Methods 0.000 title claims abstract description 42
- 230000003071 parasitic effect Effects 0.000 title claims abstract description 35
- 230000002401 inhibitory effect Effects 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 239000000969 carrier Substances 0.000 claims abstract description 9
- 238000000605 extraction Methods 0.000 claims description 21
- 239000012535 impurity Substances 0.000 claims description 7
- 239000002019 doping agent Substances 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 2
- 238000002513 implantation Methods 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 6
- 230000008569 process Effects 0.000 description 11
- 239000000463 material Substances 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 4
- 238000000407 epitaxy Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
- 239000000203 mixture Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 229910004143 HfON Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 239000005922 Phosphane Substances 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910004491 TaAlN Inorganic materials 0.000 description 1
- 229910004166 TaN Inorganic materials 0.000 description 1
- 229910004200 TaSiN Inorganic materials 0.000 description 1
- 229910010037 TiAlN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910000064 phosphane Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- FAIAAWCVCHQXDN-UHFFFAOYSA-N phosphorus trichloride Chemical compound ClP(Cl)Cl FAIAAWCVCHQXDN-UHFFFAOYSA-N 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 229910003468 tantalcarbide Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
Abstract
本发明提供一种抑制厚外延层半导体器件寄生BJT的方法及结构，其特征在于，包括以下步骤：提供半导体衬底，并在所述半导体衬底上形成外延层；在所述外延层上形成半导体器件，所述半导体器件包括：源区、漏区、栅极堆叠；在所述半导体器件周围形成与所述半导体器件不相连的导电层，用于减小基区电阻。相应地，本发明还提供一种应用本方法制造的半导体结构。采用本发明的方法以及半导体结构可以有效地抽取外延层中的非平衡载流子，大大减少寄生BJT的基区电阻，有效地抑制厚外延器件中的寄生BJT效应或者闩锁效应，从而减少泄漏电流、降低噪声、减小误开启概率，提高半导体器件的整体性能与可靠性。
Description
技术领域
本发明涉及半导体制造领域，具体地说涉及一种抑制厚外延层半导体器件寄生BJT的方法及结构。
背景技术
随着半导体行业的发展，具有更高性能和更强功能的集成电路要求更大的元件密度，而且各个部件、元件之间或各个元件自身的尺寸、大小和空间也需要进一步缩小(目前已经达到纳米级)，因此半导体器件制造过程中对工艺控制的要求较高。
随着微电子技术的高速发展，在高浓衬底上生长的外延层质量越来越好，因此近年来出现了很多基于外延层的厚外延器。在功率放大器件中，VDMOS(垂直双扩散金属氧化物半导体场效应晶体管)、LDMOS(横向扩散金属氧化物半导体场效应晶体管)、IGBT(绝缘栅双极型晶体管)等大功率器件基本都是在数微米到十几微米的外延层上进行制造的，可以承受高电压的高压器件。虽然外延层的质量越来越好，但是当外延层达到一定厚度时，厚的外延层就会使得寄生BJT(双极结型晶体管)的基区电阻非常大，尤其对于诸如LDMOS的横向高压器件来说，这个影响愈发明显。而由于基区电阻的增大，就会导致在外延层中微小的电流也可以使得寄生BJT开启或者因为寄生BJT的放大产生很大的漏电流。
目前，需要一种能够有效抑制寄生BJT效应的方法，以有效提高半导体器件的整体性能。
发明内容
本发明阐明了一种利用导电层减小厚外延器件寄生BJT效应的方法。在厚外延器件中，注入适当浓度的与外延类型相同的杂质或者采用金属嵌入的方式形成导电层，应用导电层来收集外延层中多余的多数载流子。采用本发明能缩短漏电流流出的距离，改变漏电流的流径，减小外延器件中寄生BJT的基区电阻。
根据本发明的一个方面，提供一种抑制厚外延层半导体器件寄生BJT的方法及结构，包括以下步骤：提供半导体衬底，并在所述半导体衬底上形成外延层；在所述外延层上形成半导体器件，所述半导体器件包括：源区、漏区、栅极堆叠；在所述半导体器件周围形成与所述半导体器件不相连的导电层，用于减小基区电阻。可选的，还包括步骤：将所述导电层与所述衬底相连接。
根据本发明的另一个方面，提供一种半导体结构，其中，所述半导体结构包括：衬底、外延层、半导体器件以及导电层，其特征在于，
所述外延层位于所述衬底之上；
所述半导体器件形成于所述外延层中，所述半导体器件包括：源区、漏区、栅极堆叠；
所述导电层形成于所述外延层中，所述导电层形成在所述半导体器件周围，并且与所述半导体器件不相连。
对于一般的横向厚外延器件，漏电流也就是寄生BJT的集电极电流IC＝bIB。过大的基区电阻会使得寄生BJT不再工作在完全截止状态，以至于放大倍数b不再近似于0，因此会产生比较大的集电极电流IC，使器件出现漏电流过大的问题。应用在半导体结构中增加导电层的方法，可以使导电层吸收一部分电流，而使寄生BJT基区电流不再完全流入衬底，使漏电流的流径改变，且泻放路径缩短，进而有效减小了寄生BJT的基区电阻。如此使得寄生BJT工作在完全截止状态，放大倍数b近似等于0，集电极电流IC约为0。在厚外延器件中应用本发明的方法，可以有效抑制寄生BJT开启，解决由于寄生BJT的放大效应使得其漏电流过大的问题，减小闩锁发生几率。
附图说明
通过阅读参照以下附图对非限制性实施例所作的详细描述，本发明的其它特征、目的和优点将会变得更明显：
图1为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的剖面图；
图2为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的俯视图；
图3为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的流程图；
附图中相同或相似的附图标记代表相同或相似的部件。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本发明的实施例作详细描述。
下面详细描述本发明的实施例，所述实施例的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的，仅用于解释本发明，而不能解释为对本发明的限制。
下文的公开提供了许多不同的实施例或例子用来实现本发明的不同结构。为了简化本发明的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本发明。此外，本发明可以在不同例子中重复参考数字和/或字母。这种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施例和/或设置之间的关系。此外，本发明提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的可应用于性和/或其他材料的使用。另外，以下描述的第一特征在第二特征之“上”的结构可以包括第一和第二特征形成为直接接触的实施例，也可以包括另外的特征形成在第一和第二特征之间的实施例，这样第一和第二特征可能不是直接接触。应当注意，在附图中所图示的部件不一定按比例绘制。本发明省略了对公知组件和处理技术及工艺的描述以避免不必要地限制本发明。
图1为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的剖面图。
在图1中，以具有厚外延的P型衬底和外延的CMOS器件为例，该CMOS器件仅为本发明公开的一种实施例，可以延伸且不限制为LDMOS、IGBT、IGCT等具有厚外延的半导体器件。本实施例中外延层(200)的厚度大于200μm。
在极低电阻率的P型半导体衬底(100)上，生长高电阻率的P型厚外延层(200)。在外延层(200)上制作CMOS器件。CMOS器件包括：P掺杂(210)、N掺杂(220)、栅极(230)、N阱(240)、P阱(250)。
环绕重掺杂(280)为且不限为经过注入与长时间退火形成的高浓度诸如砷、磷、硼等杂质分布，选择性地连接衬底(100)，但一定与多晶抽取棒(290)良好连接。
环绕重掺杂(280)与多晶抽取棒(290)构成的非平衡载流子抽取结构置于CMOS工作区域附近，收集外延层(200)中的多数载流子。由于载流子部分被吸收，减小了寄生BJT的开启几率，解决由于寄生BJT效应造成的漏电流过大、闩锁失效等一系列问题。
图2为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的俯视图。
在图2中，在半导体衬底上形成外延层(300)。在所述外延层(300)上形成CMOS器件，所述CMOS器件包括：P掺杂(310)、N掺杂(320)、栅极(330)、N阱(340)、P阱(350)。在所述CMOS器件周围形成与所述半导体器件不相连的环绕重掺杂(380)和多晶抽取棒(390)，用于抽取厚外延层中的非平衡载流子。如图所示，环绕重掺杂(380)和多晶抽取棒(390)与CMOS器件不相连且保持一定距离，该距离由工艺条件限制与器件耐压需求决定。
图3为根据本发明一种抑制厚外延层半导体器件寄生BJT的方法及结构的具体实施方式的流程图。
在图3中，叙述了本发明的一种实现方法，包括：
步骤S401，提供半导体衬底(100)(300)，并在所述半导体衬底(100)(300)上形成厚外延层(200)(300)。根据现有技术公知的设计要求(例如P型衬底或者N型衬底)，衬底(100)(300)可以包括各种掺杂配置。衬底(100)(300)与外延层(200)(300)的材料为但不限于蓝宝石、硅、锗衬底、碳化硅、砷化镓、砷化铟或者磷化铟。典型地，衬底(100)(300)可以具有但不限于约2000μm的厚度，外延层(200)(300)具有但不限于200μm的厚度。采用但不限于最多的是气相外延工艺在是在衬底(100)(300)上生长外延层(200)(300)，与衬底(100)(300)的晶向相同。在外延生长过程，严格控制掺杂，以保证控制电阻率远远低于衬底(100)(300)。N型外延层所用的掺杂剂一般为磷烷(PH3)或三氯化磷(PCl3)；P型外延层的掺杂剂为乙硼烷(B2H6)或三氯化硼(BCl3)等。
步骤S402，是形成环绕重掺杂(280)和多晶抽取棒(290)非平衡载流子抽取结构的主要步骤。
通过向外延层200中注入适当浓度的与外延层(200)(300)掺杂类型相同的杂质。注入的杂质为且不限为半导体领域常用的，例如砷、磷、硼等。在环绕重掺杂(280)区域内利用但不限于利用ICP技术形成深槽。在本实施例中深槽的深度为50μm。深槽的深度可以大于环绕重掺杂(280)的深度且越深越好，深槽的宽度由工艺限制及多晶硅良好填充的需求确定。利用但不限于利用气相淀积技术在所述的深槽中填充高浓度的多晶硅，杂质类型与外延层(200)(300)掺杂类型相同。选择性的利用但不限于利用CMP技术对填充好的多晶抽取棒(290)表面进行平坦化。
为了达到更好的收集外延层(200)(300)中的非平衡载流子，环绕重掺杂(280)和多晶抽取棒(290)通常为环状结构，即环绕重掺杂(280)和多晶抽取棒(290)位于半导体器件的外围，将半导体器件包围。在此基础上可以改进为位于半导体器件的两侧，呈两条平行线，垂直或者平行于所述半导体器件的栅极(230)(330)。
为了收集半导体器件逸出的非平衡载流子，防止相邻器件两两间形成寄生BJT开启，同时有效吸收器件自身多余的非平衡载流子，防止器件自身的寄生BJT开启，环绕重掺杂(280)和多晶抽取棒(290)与半导体器件之间的距离不能太大；同时也要考虑到器件耐压，环绕重掺杂(280)和多晶抽取棒(290)与半导体器件之间的距离不能太小。因此需要根据实际情况，使得环绕重掺杂(280)和多晶抽取棒(290)与半导体器件之间的工作需要保持合适的距离。
步骤S403，形成CMOS半导体器件。利用但不限于利用离子注入和扩散形成P阱(240)(340)和N阱(250)(350)。之后，形成栅极(230)(330)。栅极(230)(330)由且不限由高k介质层和金属栅层组成。高k介质层的材料例如可以为HfAlON、HfSiAlON、HfTaAlON、HfTiAlON、HfON、HfSiON、HfTaON、HfTiON中的一种或其任意组合，以采用热氧化、化学气相沉积(CVD)、原子层沉积(ALD)等工艺来形成高k介质层。在高k介质层上沉积金属栅极，金属栅极可以为一层或者多层结构。其材料可以为TaN、TaC、TiN、TaAlN、TiAlN、MoAlN、TaTbN、TaErN、TaYbN、TaSiN、HfSiN、MoSiN、RuTax、NiTax中的一种或其任意组合。其厚度范围例如可以为10nm-80nm，如30nm或50nm。本领域技术人员能够理解的栅极结构都可以应用在本发明中，例如多晶硅栅极。特别地，在所述栅极(230)(330)的侧壁上形成侧墙。侧墙可以由氮化硅、氧化硅、氮氧化硅、碳化硅及其组合，和/或其他合适的材料形成。侧墙可以具有多层结构。侧墙可以通过包括沉积刻蚀工艺形成，其厚度范围可以是10nm-100nm，如30nm、50nm或80nm。
P掺杂(210(310)和N掺杂(220)(230)可以通过向外延层(200)(300)中利用但不限于利用离子注入和快速退火的方法注入P型或N型掺杂物或杂质而形成。在本实施例中，P掺杂(210(310)和N掺杂(220)(230)区域在外延层(200)(300)内部，在其他一些实施例中，P掺杂(210(310)和N掺杂(220)(230)可以通过选择性外延生长所形成的提升的源漏极结构，其外延部分的顶部高于栅极(230)(330)底部。
步骤S404，最终通过金属化工艺形成完整的包含环绕重掺杂(280)和多晶抽取棒(290)非平衡载流子抽取结构的器件。通过合理的连接，使得环绕重掺杂(280)和多晶抽取棒(290)与衬底的电位保持一致。
虽然关于示例实施例及其优点已经详细说明，应当理解在不脱离本发明的精神和所附权利要求限定的保护范围的情况下，可以对这些实施例进行各种变化、替换和修改。对于其他例子，本领域的普通技术人员应当容易理解在保持本发明保护范围内的同时，工艺步骤的次序可以变化。
此外，本发明的应用范围不局限于说明书中描述的特定实施例的工艺、机构、制造、物质组成、手段、方法及步骤。从本发明的公开内容，作为本领域的普通技术人员将容易地理解，对于目前已存在或者以后即将开发出的工艺、机构、制造、物质组成、手段、方法或步骤，其中它们执行与本发明描述的对应实施例大体相同的功能或者获得大体相同的结果，依照本发明可以对它们进行应用。因此，本发明所附权利要求旨在将这些工艺、机构、制造、物质组成、手段、方法或步骤包含在其保护范围内。
Claims (3)
1.一种抑制厚外延层半导体器件寄生BJT的方法及结构，其特征在于，结构为环绕重掺杂(280)和多晶抽取棒(290)。
2.根据权利要求1所述的一种抑制厚外延层半导体器件寄生BJT的方法及结构，其特征在于，环绕重掺杂(280)为且不限为杂质注入、扩散方法形成，掺杂类型与多晶抽取棒(290)一致。多晶抽取棒(290)为且不限为ICP填充方法形成，掺杂浓度大于1E16cm-3，掺杂类型与环绕重掺杂(280)一致。电学性能上，环绕重掺杂(280)与有源区域不相连，与多晶抽取棒(290)相连。
3.根据权利要求1所述的一种抑制厚外延层半导体器件寄生BJT的方法及结构，其特征在于，环绕重掺杂(280)与多晶抽取棒(290)共同组成抽取外延层中的非平衡载流子的机构，与衬底(100)的电势保持一致，能够有效抽取厚外延(200)中的非平衡载流子，达到抑制厚外延层半导体器件寄生BJT的目的。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910693631.9A CN112259536A (zh) | 2019-07-21 | 2019-07-21 | 一种抑制厚外延层半导体器件寄生bjt的方法及结构 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910693631.9A CN112259536A (zh) | 2019-07-21 | 2019-07-21 | 一种抑制厚外延层半导体器件寄生bjt的方法及结构 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112259536A true CN112259536A (zh) | 2021-01-22 |
Family
ID=74223786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910693631.9A Pending CN112259536A (zh) | 2019-07-21 | 2019-07-21 | 一种抑制厚外延层半导体器件寄生bjt的方法及结构 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112259536A (zh) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6469354B1 (en) * | 1998-03-24 | 2002-10-22 | Nec Corporation | Semiconductor device having a protective circuit |
| CN102332403A (zh) * | 2011-09-20 | 2012-01-25 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
| CN102646601A (zh) * | 2012-04-19 | 2012-08-22 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
-
2019
- 2019-07-21 CN CN201910693631.9A patent/CN112259536A/zh active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6469354B1 (en) * | 1998-03-24 | 2002-10-22 | Nec Corporation | Semiconductor device having a protective circuit |
| CN102332403A (zh) * | 2011-09-20 | 2012-01-25 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
| CN102646601A (zh) * | 2012-04-19 | 2012-08-22 | 中国科学院微电子研究所 | 一种半导体结构及其制造方法 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10896954B2 (en) | Electronic device including a drift region | |
| US8586435B2 (en) | Fabrication of MOSFET device with reduced breakdown voltage | |
| US7781859B2 (en) | Schottky diode structures having deep wells for improving breakdown voltages | |
| US7791146B2 (en) | Semiconductor device including field effect transistor and method of forming the same | |
| US9093300B2 (en) | Transistor structure having a trench drain | |
| US9837358B2 (en) | Source-gate region architecture in a vertical power semiconductor device | |
| US6759731B2 (en) | Bipolar junction transistor and fabricating method | |
| US20070267672A1 (en) | Semiconductor device and method for manufacturing same | |
| US9490358B2 (en) | Electronic device including a vertical conductive structure | |
| KR20130088704A (ko) | ＦｉｎＦＥＴ 바디 컨택 및 이의 제조 방법 | |
| US9159791B2 (en) | Semiconductor device comprising a conductive region | |
| CN103456788A (zh) | 垂直功率mosfet及其形成方法 | |
| US8395188B2 (en) | Silicon-germanium heterojunction bipolar transistor | |
| JP2019003969A (ja) | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 | |
| KR102542415B1 (ko) | 반도체 장치 및 그 제조 방법 | |
| CN108010964B (zh) | 一种igbt器件及制造方法 | |
| JP2019129300A (ja) | 半導体装置とその製造方法 | |
| US7554174B2 (en) | Bipolar transistor having semiconductor patterns filling contact windows of an insulating layer | |
| US20130099288A1 (en) | SiGe HBT and Manufacturing Method Thereof | |
| US9231120B2 (en) | Schottky diode with leakage current control structures | |
| US8455975B2 (en) | Parasitic PNP bipolar transistor in a silicon-germanium BiCMOS process | |
| CN112259536A (zh) | 一种抑制厚外延层半导体器件寄生bjt的方法及结构 | |
| EP3998638A1 (en) | Laterally diffused metal oxide semiconductor device and manufacturing method therefor | |
| TW202345388A (zh) | 半導體裝置的隔離 | |
| CN117650179A (zh) | 一种屏蔽栅场效应晶体管及其制备方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |