CN112259429A - Semiconductor process equipment - Google Patents
Semiconductor process equipment Download PDFInfo
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- CN112259429A CN112259429A CN202011061838.3A CN202011061838A CN112259429A CN 112259429 A CN112259429 A CN 112259429A CN 202011061838 A CN202011061838 A CN 202011061838A CN 112259429 A CN112259429 A CN 112259429A
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- liner
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- supply line
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- 238000000034 method Methods 0.000 title claims abstract description 103
- 230000008569 process Effects 0.000 title claims abstract description 103
- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 238000012545 processing Methods 0.000 claims abstract description 33
- 239000012212 insulator Substances 0.000 claims abstract description 10
- 239000000463 material Substances 0.000 claims description 10
- 229920001343 polytetrafluoroethylene Polymers 0.000 claims description 7
- 239000004810 polytetrafluoroethylene Substances 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 6
- -1 polytetrafluoroethylene Polymers 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 description 10
- 230000007246 mechanism Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- 238000012423 maintenance Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000009434 installation Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/02—Details
- H01J37/026—Means for avoiding or neutralising unwanted electrical charges on tube components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/02—Details
- H01J37/248—Components associated with high voltage supply
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/305—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating or etching
- H01J37/3053—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating or etching for evaporating or etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Plasma Technology (AREA)
Abstract
The invention provides semiconductor process equipment which comprises a process chamber, a power supply line, a power supply, a shielding box and a lower electrode positioned in the process chamber, wherein the shielding box is arranged on the outer side of the chamber wall of the process chamber, the first end of the power supply line is electrically connected with the lower electrode, and the second end of the power supply line sequentially penetrates through the side wall of the process chamber and the shielding box and is electrically connected with the power supply. The semiconductor processing equipment further comprises an insulating piece, wherein the insulating piece is arranged between the shielding box and the side wall of the process chamber, a wiring hole is formed in the insulating piece, and a power supply wire penetrates through the wiring hole. In the semiconductor process equipment provided by the invention, the insulator blocks the path of current flowing to the shielding box through the side wall of the process chamber, and only allows the radio-frequency current to flow to the power supply through the power supply line below the lower electrode, so that the uniformity of the distribution of the radio-frequency current flowing back to the power supply line along all directions is improved, and the uniformity of the semiconductor process is further improved.
Description
Technical Field
The invention relates to the field of semiconductor equipment, in particular to semiconductor process equipment.
Background
With the upgrading of integrated circuit manufacturing technology and the advancement of semiconductor technology, the requirements of the new generation of products on the uniformity of each film layer of a substrate are higher and higher. In the existing semiconductor process equipment, a corresponding Radio Frequency (RF) electric field is usually emitted to the process gas through a lower electrode to generate ion flow, thereby achieving the effects of etching a substrate surface film layer and the like. However, in the conventional semiconductor processing equipment, the symmetry of the radio frequency path formed by the lower electrode, the process gas, the liner in the process chamber and other structures is often difficult to meet the requirements, so that the rate of the etching process performed on the surface of the substrate is not uniform, and the product quality is poor.
Therefore, how to provide a semiconductor processing equipment structure capable of improving the uniformity of the semiconductor process becomes a technical problem to be solved in the field.
Disclosure of Invention
The present invention is directed to providing a semiconductor process apparatus capable of improving uniformity of a semiconductor process.
In order to achieve the above object, the present invention provides a semiconductor processing apparatus, including a process chamber, a power supply line, a power supply, a shielding box, and a lower electrode located in the process chamber, wherein the shielding box is disposed outside a chamber wall of the process chamber, a first end of the power supply line is electrically connected to the lower electrode, a second end of the power supply line sequentially passes through a sidewall of the process chamber and the shielding box and is electrically connected to the power supply, the semiconductor processing apparatus further includes an insulating member, the insulating member is disposed between the shielding box and the sidewall of the process chamber, a wire hole is formed on the insulating member, and the power supply line passes through the wire hole.
Optionally, the material of the insulating member comprises ceramic or polytetrafluoroethylene.
Optionally, the thickness of the insulator is 0.2mm to 20 mm.
Optionally, the semiconductor processing equipment further comprises an insulating cantilever, a cantilever hole is formed in a wall of the process chamber, the cantilever hole and the wiring hole are coaxially arranged, one end of the insulating cantilever penetrates through the cantilever hole and extends into the process chamber, the other end of the insulating cantilever is fixedly arranged in the wiring hole of the insulating part, a wiring through hole is formed in the insulating cantilever, and the second end of the power supply line penetrates through the wiring through hole.
Optionally, the insulating cantilever includes a cantilever body and an insulating medium layer covering a surface of the cantilever body.
Optionally, the material of the insulating medium layer comprises ceramic or polytetrafluoroethylene.
Optionally, the semiconductor processing equipment further comprises a matcher, the matcher is fixedly arranged on one side of the shielding box, which is away from the insulating part, and the power supply is electrically connected with the lower electrode through the matcher and the shielding box in sequence.
Optionally, semiconductor process equipment still includes the inside lining subassembly, the inside lining subassembly includes lower inside lining, lower inside lining encircles the bottom electrode setting just is symmetrical structure, be equipped with the centre bore on the inside lining down, the one end of power supply line is passed the centre bore with the bottom electrode electricity is connected, the power passes through the power supply line with the bottom electrode with the bottom lining electricity is connected.
Optionally, the lining assembly further includes an upper lining, the upper lining is disposed around the lower electrode, the upper lining is partially sleeved on the outer side of the lower lining, and a gap is formed between a portion of the upper lining disposed on the outer side of the lower lining and the lower lining.
Optionally, the gap has a width of 0.2mm to 20 mm.
In the semiconductor process equipment provided by the invention, the insulating part is arranged between the shielding box and the outer wall of the process chamber, so that a path for current to flow to the shielding box through the side wall of the process chamber is blocked, and only radio-frequency current is allowed to flow to a power supply through the power supply line below the lower electrode, so that the uniformity of the distribution of the radio-frequency current flowing back to the power supply line along all directions is improved, and the uniformity of the semiconductor process (such as the uniformity of the etching rate on all positions of the surface of a substrate) is further improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic diagram of a semiconductor processing apparatus of the prior art;
FIG. 2 is a schematic diagram of a semiconductor processing apparatus according to an embodiment of the present invention;
FIG. 3 is a view of the semiconductor processing apparatus of FIG. 2 from another perspective;
FIG. 4 is a cross-sectional view of the semiconductor processing apparatus of FIG. 2;
FIG. 5 is a cross-sectional view of the semiconductor processing apparatus of FIG. 2 from another perspective;
FIG. 6 is an exploded view of the semiconductor processing apparatus of FIG. 2;
FIG. 7 is a schematic diagram of a liner assembly for semiconductor processing equipment according to an embodiment of the present invention;
FIG. 8 is an enlarged, fragmentary view of the liner assembly of FIG. 7;
FIG. 9 is a schematic block diagram of semiconductor processing equipment according to another embodiment of the present invention;
fig. 10 is a cross-sectional view of the semiconductor processing apparatus shown in fig. 9.
Description of the reference numerals
100: the lower electrode 210: power supply line
220: power supply 230: shielding box
240: matcher 300: insulating member
400: the liner assembly 410: lower liner
411: first annular sidewall 412: bottom wall
420: upper liner 421: second annular side wall
422: inner door notch 430: gap
510: inner door lifting mechanism 512: inner door
511: the sheet conveying opening 520: maintenance assembly
600: insulating cantilever 700: upper electrode
800: the dielectric window 900: process chamber
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
Fig. 1 is a schematic structural diagram of a semiconductor processing apparatus in the prior art, which includes a process chamber 900, a lower electrode 100, a power supply 220 and a shielding box 230, wherein the power supply 220 is connected to the lower electrode 100 in the process chamber 900 through a cable, and supplies a radio frequency signal to the lower electrode 100 through the cable, and the lower electrode 100 generates a radio frequency electric field according to the radio frequency signal and excites a process gas in the process chamber 900 to generate a plasma. The shield box 230 is generally disposed on an outer wall of the process chamber 900 for shielding electromagnetic signals between the power supply 220 and components in the process chamber 900, thereby preventing the power supply 220 and associated components from affecting the electromagnetic field inside the process chamber 900. In addition, some auxiliary functions (e.g., heating, electrostatic adsorption, etc.) are also fed into the process chamber 900 through the shield boxes 230 by wires (e.g., AC heating wires, DC wires), respectively.
The current path in the process chamber 900 is shown by the direction of the arrows in the figure, and the current flows through the plasma from the liner or the like in the process chamber 900 back to the cable below the lower electrode 100 and through the cable back to the power supply 220. To improve the uniformity of the etching process at various locations on the substrate surface, the lower electrode 100 is typically placed in the center of the process chamber 900 to ensure that the current flowing back into the wire is uniformly distributed in all directions.
After research, the inventors of the present invention found that the main reason for the non-uniformity of the etching process on the substrate surface in the prior art is the shield case 230. As shown in fig. 1, the shield can 230 is in direct contact with one side of the outer wall of the process chamber 900, resulting in a portion of the current flowing directly through the outer wall of the chamber and the shield can 230 flowing back to the cable, resulting in a reduced uniformity of the current distribution in all directions.
In order to solve the above technical problems and improve the uniformity of the semiconductor process, the present invention provides a semiconductor processing apparatus, as shown in fig. 2, the semiconductor processing apparatus includes a process chamber 900, a power supply line 210, a power supply 220, a shielding box 230, and a lower electrode 100 located in the process chamber 900, the shielding box 230 is disposed outside a chamber wall of the process chamber 900, a first end of the power supply line 210 is electrically connected to the lower electrode 100, a second end of the power supply line 210 sequentially passes through a sidewall of the process chamber 900 and the shielding box 230 and is electrically connected to the power supply 220, and a radio frequency signal can be supplied to the lower electrode 100 through the power supply line 210. The semiconductor process apparatus further includes an insulating member 300, the insulating member 300 being disposed between the shield case 230 and the sidewall of the process chamber 900, the insulating member 300 having a wire hole formed thereon, through which the power supply line 210 passes.
The type of process performed by the semiconductor processing equipment is not particularly limited, for example, the semiconductor processing equipment may be an etcher, and the lower electrode 100 is used for exciting the process gas in the process chamber 900 to generate plasma to etch a film layer on the surface of the substrate disposed above the lower electrode 100.
In the present invention, the insulating member 300 is disposed between the shielding box 230 and the sidewall of the process chamber 900, so as to block the current flowing through the sidewall of the process chamber 900 to the shielding box 230, and only allow the rf current to flow to the power supply 220 through the power supply line 210 under the lower electrode 100, thereby improving the uniformity of the distribution of the rf current flowing back to the power supply line 210 in all directions, and further improving the uniformity of the semiconductor process (e.g., the uniformity of the etching rate on all portions of the substrate surface).
The material of the insulating member 300 according to the embodiment of the present invention is not particularly limited, and for example, as an implementation manner that is easy to implement and has a low cost, the material of the insulating member 300 may include ceramic or Polytetrafluoroethylene (PTFE).
The area and thickness of the insulator 300 are not particularly limited in the embodiments of the present invention, for example, as an alternative embodiment of the present invention, the length and width of the insulator 300 are matched with the shielding box 230, and the thickness of the insulator 300 is 0.2mm to 20 mm.
The embodiment of the present invention is not particularly limited to how the insulating member 300 is connected to the sidewall of the process chamber 900 and the shield case 230, for example, as an alternative embodiment of the present invention, the insulating member 300 may be fixedly connected to the sidewall of the process chamber 900 and the shield case 230 by insulating screws.
In order to improve the signal quality of the rf signal, it is preferable that the semiconductor process equipment further includes a matcher 240, as shown in fig. 2, the matcher 240 is fixedly disposed at a side of the shield box 230 away from the insulator 300, and the power supply 220 is electrically connected to the power supply line 210 through the matcher 240 and the shield box 230 in sequence. In the embodiment of the present invention, a matching device 240 is disposed between the power supply 220 and the power supply line 210 to implement reflection-free power transmission of the power supply 220. The embodiment of the present invention does not specifically limit how the power supply 220 is connected to the matching unit 240, for example, the power supply 220 may be connected to the matching unit 240 through a coaxial line.
Embodiments of the present invention are not limited to particular components within the process chamber 900, for example, the semiconductor processing apparatus may further include a liner assembly 400. After further research by the present inventors, the current flows from the liner in the process chamber 900 to the cable under the lower electrode 100, and the process of the current flowing through the liner also affects the uniformity of the distribution of the rf current in all directions. In the prior art, the liner is not completely centrosymmetric, for example, an inner door notch is formed on one side of the liner for providing an inner door to facilitate substrate entry and exit into and from the process chamber 900.
In order to solve the above technical problem, as shown in fig. 7 and 8, the liner assembly 400 preferably includes a lower liner 410, the lower liner 410 is disposed around the lower electrode 100 and has a symmetrical structure, a central hole is formed in the lower liner 410, one end of the power supply line 210 passes through the central hole to be electrically connected to the lower electrode 100, and the power supply 220 is electrically connected to the lower electrode 100 and the lower liner 410 through the power supply line 210.
The structure of the lower liner 410 according to the embodiment of the present invention is not particularly limited, and for example, as shown in fig. 7 and 8, the lower liner 410 may include a bottom wall 412 and a first annular sidewall 411 that are connected to each other, and a central hole is formed at a central position of the bottom wall 412.
The present invention is not limited to other structures in the process chamber 900, for example, as shown in fig. 4 and 5, the process chamber 900 may further include an inner door lifting mechanism 510 and a maintenance assembly 520, and notches for disposing the inner door lifting mechanism 510 and the maintenance assembly 520 are formed on an inner wall of the process chamber 900. The upper liner 420 is reserved with an inner door gap 422 at a position corresponding to the inner door lift mechanism 510. The bottom of the gap for installing the inner door lifting mechanism 510 is further formed with a sheet passing opening 511 communicated with the outer wall of the process chamber 900, the inner door lifting mechanism 510 is used for controlling the inner door 512 to selectively close the inner door gap 422 so as to transfer the substrate into and out of the process chamber 900 through the sheet passing opening 511 and the inner door gap 422, and the maintenance assembly 520 is used for performing maintenance on the components in the process chamber 900 when the process chamber 900 is opened. It should be noted that the upper and lower liners are positioned inside the door lifter 510 and the maintenance assembly 520, and the notches are positioned higher than the top of the annular sidewall of the lower liner 410.
As shown in fig. 2, the process chamber 900 is further provided with an upper electrode 700 and a dielectric window 800, wherein the upper electrode 700 is helical and is used for generating a magnetic field in the process chamber 900, so as to cooperate with the lower electrode 100 to excite the process gas to generate plasma.
In the embodiment of the present invention, the liner assembly 400 includes a central symmetric lower liner 410, the lower liner 410 is used for transmitting the current returning to the power supply line 210 in addition to performing the function of protecting the chamber sidewall, and the central symmetric structure can ensure the uniformity of the current returning to the power supply line 210 in all directions, thereby eliminating the influence of structures such as the inner door lifting mechanism 510 on the current and improving the uniformity of the semiconductor process.
The structure of the power supply line 210 is not particularly limited in the present invention, for example, the power supply line 210 may be a Coaxial line (Coaxial line), the outer conductor layer of the power supply line 210 is electrically connected to the lower liner 410, and the inner core (inner conductor) of the power supply line 210 passes through the central hole to be electrically connected to the lower electrode 100.
In order to improve the protection effect of the liner assembly 400 on the inner wall of the process chamber 900 while ensuring the uniformity of the current distribution, it is preferable that, as shown in fig. 7 and 8, the liner assembly 400 further includes an upper liner 420, the upper liner 420 is disposed around the lower electrode 100, the upper liner 420 is partially sleeved on the outer side of the lower liner 410, and a gap is formed between the portion of the upper liner 420 sleeved on the outer side of the lower liner 410 and the lower liner 410.
The structure of the upper liner 420 is not particularly limited in the embodiments of the present invention, for example, as shown in fig. 7 and 8, the upper liner 420 includes a second annular sidewall 421, the second annular sidewall 421 is partially sleeved outside the first annular sidewall 411, and a gap 430 is formed between the second annular sidewall 421 and the first annular sidewall 411. An inner door notch 422 is formed in the second annular sidewall 421.
In the embodiment of the present invention, the bottom of the second annular sidewall 421 of the upper liner 420 is disposed around the top of the first annular sidewall 411 of the lower liner 410, and a gap 430 is formed between the second annular sidewall 421 and the first annular sidewall 411, so that the coverage of the liner assembly 400 on the inner wall of the chamber is improved on the premise of ensuring the insulation between the upper liner 420 and the lower liner 410, and the service life of the process chamber 900 is further prolonged. In addition, the gap 430 also prevents contact friction between the upper liner 420 and the lower liner 410 during installation, thereby increasing the service life of the liner assembly 400.
The width of the gap 430 is not particularly limited in the embodiments of the present invention, for example, as an alternative embodiment of the present invention, the width of the gap 430 may be 0.2mm to 20 mm.
In the prior art, the interface of the cable into the process chamber 900 is usually provided with an electrostatic cantilever (ESC) fixed on the sidewall of the process chamber 900 by a screw and electrically connected to the sidewall of the process chamber 900 by an inductive coil, and the inventor of the present invention found that the ESC is easy to create a path lining the chamber wall electrostatic cantilever and allows the rf current in the process chamber 900 to return to the power supply directly from the path.
Therefore, in order to solve the above problems and further improve the uniformity of the semiconductor process, it is preferable that, as shown in fig. 9 and 10, the semiconductor process equipment further includes an insulating cantilever 600, a cantilever hole is formed on a sidewall of the process chamber 900, the cantilever hole is coaxially disposed with the routing hole, one end of the insulating cantilever 600 penetrates through the cantilever hole and extends into the process chamber 900, the other end of the insulating cantilever 600 is fixedly disposed in the routing hole of the insulating member 300, a routing through hole is formed in the insulating cantilever 600, and the second end of the power supply line 210 penetrates through the routing through hole.
In the embodiment of the present invention, the shielding box 230 is connected to the sidewall of the process chamber 900 through the insulating cantilever 600, so as to block a path through which the rf current directly returns to the power supply 220 from the sidewall of the process chamber 900 and the cantilever, improve the uniformity of the current distribution in each direction, and further improve the uniformity of the semiconductor process.
The embodiment of the present invention does not specifically limit how the insulating cantilever 600 is fixedly connected to the sidewall of the process chamber 900, for example, as an optional implementation manner of the present invention, a plurality of blind installation holes are formed on the sidewall of the process chamber 900, a plurality of through installation holes are formed at corresponding positions on the insulating member 300, and the cantilever is fixed to the sidewall of the process chamber 900 by screws sequentially passing through the through installation holes and the blind installation holes. It should be noted that the connection relationship is also an insulation connection, for example, the screw may be an insulation screw, or the inner walls of the mounting through hole and the mounting blind hole are covered with an insulation medium layer.
The structure of the insulating cantilever 600 is not particularly limited in the embodiments of the present invention, for example, as an optional implementation manner of the present invention, the insulating cantilever 600 may include a cantilever body and an insulating dielectric layer covering a surface of the cantilever body, and the routing through hole is formed in the cantilever body.
In the embodiment of the present invention, the cantilever body may be an approximately cylindrical part, and the surface of the cantilever body may include a sidewall, an inner wall, and two end surfaces. In order to reduce the cost, it is preferable that the insulating medium layer only covers the sidewall and two end faces of the cantilever body, so that the insulating treatment between the cantilever body and the sidewall of the process chamber 900 and between the cantilever body and the power supply can be ensured, the material usage amount of the insulating medium layer can be reduced, and the material and process cost can be reduced.
The material of the insulating medium layer is not particularly limited in the embodiments of the present invention, and for example, as an alternative implementation manner of the present invention, the material of the insulating medium layer includes ceramic or polytetrafluoroethylene.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. The utility model provides a semiconductor processing equipment, includes process chamber, power supply line, power, shielding box and is located bottom electrode in the process chamber, the shielding box sets up the chamber wall outside of process chamber, the first end of power supply line with the bottom electrode electricity is connected, the second end of power supply line passes in proper order process chamber's lateral wall with the shielding box with the power electricity is connected, its characterized in that, semiconductor processing equipment still includes the insulator, the insulator sets up the shielding box with between the lateral wall of process chamber, be formed with the wire hole of walking on the insulator, the power supply line passes the wire hole of walking.
2. The semiconductor processing apparatus of claim 1, wherein the material of the insulating member comprises ceramic or polytetrafluoroethylene.
3. The semiconductor processing apparatus of claim 1, wherein the insulator has a thickness of 0.2mm to 20 mm.
4. The semiconductor processing equipment according to claim 1, further comprising an insulating cantilever, wherein a cantilever hole is formed on a chamber wall of the process chamber, the cantilever hole is coaxially arranged with the wire routing hole, one end of the insulating cantilever penetrates through the cantilever hole and extends into the process chamber, the other end of the insulating cantilever is fixedly arranged in the wire routing hole of the insulating member, a wire routing through hole is formed in the insulating cantilever, and a second end of the power supply wire penetrates through the wire routing through hole.
5. The semiconductor processing apparatus of claim 4, wherein the insulating cantilever comprises a cantilever body and an insulating dielectric layer overlying a surface of the cantilever body.
6. The semiconductor processing apparatus of claim 5, wherein the material of the dielectric layer comprises ceramic or polytetrafluoroethylene.
7. The semiconductor processing equipment according to claim 6, further comprising a matcher, wherein the matcher is fixedly arranged on one side of the shielding box, which is away from the insulating member, and the power supply is electrically connected with the lower electrode through the matcher and the shielding box in sequence.
8. The semiconductor processing apparatus according to any one of claims 1 to 7, further comprising a liner assembly, wherein the liner assembly comprises a lower liner, the lower liner is disposed around the lower electrode and has a symmetrical structure, a central hole is disposed on the lower liner, one end of the power supply line passes through the central hole to be electrically connected to the lower electrode, and the power supply line is electrically connected to the lower electrode and the lower liner through the power supply line.
9. The semiconductor processing apparatus of claim 8, wherein the liner assembly further comprises an upper liner disposed around the lower electrode, the upper liner partially surrounding the lower liner, and a gap between a portion of the upper liner disposed outside the lower liner and the lower liner.
10. The semiconductor processing apparatus of claim 9, wherein the gap has a width of 0.2mm to 20 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011061838.3A CN112259429B (en) | 2020-09-30 | 2020-09-30 | Semiconductor process equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011061838.3A CN112259429B (en) | 2020-09-30 | 2020-09-30 | Semiconductor process equipment |
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| CN112259429A true CN112259429A (en) | 2021-01-22 |
| CN112259429B CN112259429B (en) | 2024-06-21 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114361000A (en) * | 2022-01-04 | 2022-04-15 | 北京北方华创微电子装备有限公司 | Semiconductor processing chamber and semiconductor processing equipment |
| CN114927440A (en) * | 2022-05-27 | 2022-08-19 | 北京北方华创微电子装备有限公司 | Temperature control device and semiconductor process equipment |
| CN115692263A (en) * | 2022-10-31 | 2023-02-03 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process equipment |
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| CN114361000B (en) * | 2022-01-04 | 2024-04-16 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process equipment |
| CN114927440A (en) * | 2022-05-27 | 2022-08-19 | 北京北方华创微电子装备有限公司 | Temperature control device and semiconductor process equipment |
| CN114927440B (en) * | 2022-05-27 | 2023-10-13 | 北京北方华创微电子装备有限公司 | Temperature control device and semiconductor process equipment |
| CN115692263A (en) * | 2022-10-31 | 2023-02-03 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process equipment |
| CN115692263B (en) * | 2022-10-31 | 2023-06-16 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process equipment |
| WO2024093969A1 (en) * | 2022-10-31 | 2024-05-10 | 北京北方华创微电子装备有限公司 | Semiconductor process chamber and semiconductor process apparatus |
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