CN112231256A - Switching device, interface extension assembly and extension system - Google Patents

Switching device, interface extension assembly and extension system Download PDF

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Publication number
CN112231256A
CN112231256A CN202011039756.9A CN202011039756A CN112231256A CN 112231256 A CN112231256 A CN 112231256A CN 202011039756 A CN202011039756 A CN 202011039756A CN 112231256 A CN112231256 A CN 112231256A
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CN
China
Prior art keywords
interface
mounting seat
processor
external
connector
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Pending
Application number
CN202011039756.9A
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Chinese (zh)
Inventor
童俊
邹小兵
晏显栋
费美婧
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Zhongke Controllable Information Industry Co Ltd
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Zhongke Controllable Information Industry Co Ltd
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Application filed by Zhongke Controllable Information Industry Co Ltd filed Critical Zhongke Controllable Information Industry Co Ltd
Priority to CN202011039756.9A priority Critical patent/CN112231256A/en
Publication of CN112231256A publication Critical patent/CN112231256A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026PCI express

Abstract

The application relates to a switching device, an interface extension assembly and an extension system. The switching device is used for being arranged on a first mounting seat of the mainboard. The first mounting seat comprises an external interface and at least one internal interface. The internal interface is used for being connected with the first processor. The switching device comprises a circuit board. The circuit board is used for being arranged on the first mounting seat. The circuit board includes a first connection line. One end of the first connecting wire is used for being connected with the internal connection interface of the first mounting seat. The other end of the first connecting wire is used for being connected with the external interface of the first mounting seat. The switching device enables the first processor to be connected with the external interface of the first mounting seat through the first connecting wire. Furthermore, the switching device enables the interface of the first processor to be connected with external equipment, and waste of interface resources of the processor of the double-path mainboard in the single-path application mode is avoided.

Description

Switching device, interface extension assembly and extension system
Technical Field
The present application relates to the field of computer technologies, and in particular, to a switching device, an interface extension module, and an extension system.
Background
Currently, the mainstream server platform of X86 is mainly intel platform and AMD platform. The processor has a total of 8X 16 bit wide interfaces. The 8X 16 bit wide interfaces are P0, P1, P2, P3, G0, G1, G2, and G3, respectively. When the single-channel motherboard is applied, all the 8 interfaces can be configured as PCIE interfaces by the processor, and the PCIE interfaces are used for connecting with external devices. In a dual-board application, some of the processor's interfaces need to be configured as XGMI to facilitate connection to another processor.
The mainboard is provided with only one processor under the single-channel application scene. Because of the limitation of the mounting seat, the interface of the processor mounted on the mainboard can not be connected with external equipment, which causes the waste of interface resources of the processor of the double-channel mainboard in the single-channel application mode.
Disclosure of Invention
Therefore, it is necessary to provide a switching device, an interface expansion module and an expansion system for solving the problem of how to avoid the waste of interface resources of a processor in a single-channel application mode of a dual-channel motherboard.
The embodiment of the application provides a switching device, the switching device is used for being arranged on a first mounting seat of a mainboard. The first mounting seat comprises an external interface and at least one internal interface. The internal interface is used for being connected with the first processor. The switching device comprises a circuit board. The circuit board is used for being arranged on the first mounting seat. The circuit board includes a first connection line. One end of the first connecting wire is used for being connected with any one of the internal connection interfaces of the first mounting seat. The other end of the first connecting wire is used for being connected with the external interface of the first mounting seat. The switching device provided by the embodiment of the application makes full use of the internal connection interface and the external connection interface of the first mounting seat, and can complete the expansion of the processor interface in the double-circuit mainboard without additionally arranging an adapter.
In one embodiment, the transition device includes a first connector. The first connector is disposed on the circuit board. The input interface of the first connector is connected with the internal interface of the first mounting seat, and the internal interface is connected with only one of the first connecting line or the first connector. The output interface of the first connector is used for being connected with external equipment. The switching device enables the first processor to be connected with external equipment through the first connector, and an interface occupied by the internal connection interface of the first mounting seat is expanded.
In one embodiment, the switch device further comprises a clock buffer. The clock buffer is arranged on the circuit board. The clock buffer is connected with the first connector. The clock buffer is used for enhancing the input interface signal of the first connector and avoiding signal transmission distortion caused by large load impedance.
In one embodiment, the first connector is an OCulinkX8 connector. Each OCulink X8 connector adds a PCIE reference clock through the clock buffer. The PCIE reference clock is used to improve the synchronization of signal transmission of multiple output contacts of the OCulink X8 connector.
In one embodiment, the adapter further comprises an expansion slot. The expansion slot is arranged on the circuit board. The expansion slot is connected with the first connector. The expansion slot is convenient for the first connector to be connected with external equipment.
An interface extension module comprises the switching device and the main board in any of the above embodiments. The mainboard includes the interval setting first mount pad and second mount pad. The first mounting seat and the second mounting seat respectively comprise one external connection interface and at least one internal connection interface. The internal connection interface of the first mounting seat is connected with the internal connection interface of the second mounting seat in a one-to-one correspondence mode. The first mounting seat is provided with the switching device. The second mounting seat is used for placing a first processor. The internal connection interface and the external connection interface of the second mounting seat are both used for being connected with the first processor.
The interface extension assembly comprises the adapter device. The switching device connects the internal connection interface of the first mounting seat with the external connection interface of the first mounting seat through the first connecting wire. The external interface of the first mounting seat is used for being connected with external equipment. The internal connection interface of the first mounting seat is connected with the internal connection interface of the second mounting seat in a one-to-one correspondence mode. The switching device enables the first processor to be connected with the external interface of the first mounting seat through the first connecting wire. Furthermore, the interface extension assembly enables the interface of the first processor to be connected with external equipment through the external interface of the first mounting seat, and waste of interface resources of the processor of the double-path mainboard in a single-path application mode is avoided.
In one embodiment, the first mount and the second mount each include a signal interface. The interface extension assembly further includes a signal feedback. The signal feedback device is arranged on the mainboard. The signal feedback device is respectively connected with the signal interface of the first mounting seat and the signal interface of the second mounting seat. The signal feedback device is used for transmitting a high-level signal to the signal interface of the second mounting seat when the first mounting seat is provided with the connecting plate. The signal feedback device is used for outputting signals to the signal interface of the second mounting seat, and the first processor configures the interface form according to the signal level to ensure smooth communication.
In one embodiment, the signal feedback device comprises a resistor. One end of the resistor is used for being connected with a power supply, and the signal interface of the first mounting seat and the signal interface of the second mounting seat are connected to the other end of the resistor in parallel. The resistor is simple in structure and low in cost, and the overall cost of the interface extension assembly is reduced.
An extension system comprising the interface extension component and the first processor of any of the above embodiments. The first processor is arranged on the second mounting seat. The first processor is connected with the internal connection interface and the external connection interface of the second mounting seat respectively. The extension system that this application provided passes through interface extension subassembly will first mount pad the inscription interface with external interface connection. The external interface is used for being connected with external equipment. Because the internal interface of the first mounting seat is connected with the first processor, the switching device enables the first processor to be connected with the external interface of the first mounting seat through the first connecting wire. Furthermore, the expansion system enables the interface of the first processor to be connected with external equipment, and waste of interface resources of the processor of the double-path mainboard in the single-path application mode is avoided.
In one embodiment, the motherboard further comprises an external device. The external device is arranged on the mainboard. The external device is connected with the external interface. The external device is used for being connected with external equipment, and the first processor is convenient to communicate with the external equipment.
The switching device provided by the embodiment of the application is characterized in that the first connecting wire is arranged to connect any one of the internal connection interfaces of the first mounting seat with the external connection interface. The external interface is used for being connected with external equipment. Because the internal interface is used for being connected with the first processor, the switching device enables the first processor to be connected with the external interface of the first mounting seat through the first connecting wire. Furthermore, the switching device enables the interface of the first processor to be connected with external equipment, and waste of interface resources of the processor of the double-path mainboard in the single-path application mode is avoided.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of the interface expansion structure provided in an embodiment of the present application;
fig. 2 is a schematic structural diagram of the motherboard provided with two processors according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of the interface expansion structure provided in another embodiment of the present application.
Reference numerals:
10. an interface extension component; 20. a main board; 210. a first mounting seat; 220. a second mounting seat; 230. an internal connection interface; 240. an external interface; 250. a signal interface; 30. a switching device; 310. a circuit board; 320. a first connector; 330. a clock buffer; 340. a first connecting line; 260. a signal feedback device; 350. expanding slots; 100. expanding the system; 110. a first processor; 111. a second processor; 120. an external device; 121. a second connector; 122. and an external slot.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of embodiments in many different forms than those described herein and those skilled in the art will be able to make similar modifications without departing from the spirit of the application and it is therefore not intended to be limited to the embodiments disclosed below.
The numbering of the components as such, e.g., "first", "second", etc., is used herein for the purpose of describing the objects only, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
Referring to fig. 1 and 2, the dual motherboard includes two processor sockets. When the double-circuit main board is applied to a double-circuit system, a processor is installed on the installation seat of each processor. Part of the interfaces of the two processors are connected with each other. The interface interconnecting the two processors is configured as an XGMI. When only one processor is installed on the dual-path mainboard, the other installation seat is idle. In the case of the motherboard 20 in a single-channel application scenario, the motherboard 20 is only equipped with one processor. Because of the limitation of the mounting seat, the interface of the processor mounted on the motherboard 20 cannot be connected with external devices, which causes the waste of interface resources of the processor in the single-path application mode of the dual-path motherboard.
The embodiment of the present application provides an adapter 30, where the adapter 30 is configured to be disposed on a first mounting seat 210 of a motherboard 20. The first mounting base 210 includes an external interface 240 and at least one internal interface 230. The internal interface 230 is used for connecting with the first processor 110. The transition device 30 includes a circuit board 310. The circuit board 310 is disposed on the first mounting seat 210. The circuit board 310 includes a first connection line 340. One end of the first connection line 340 is used to connect with any one of the internal connection interfaces 230 of the first mounting base 210. The other end of the first connection line 340 is used for connecting with the external interface 240 of the first mounting seat 210.
In the adapter device 30 provided in the embodiment of the present application, the internal interface 230 of the first mounting base 210 is connected to the external interface 240 by providing the first connection wire 340. The external interface 240 is used for connecting with an external device. Since the internal interface 230 is used to connect with the first processor 110, the adapter 30 connects the first processor 110 with the external interface 240 of the first mounting base 210 through the first connection wire 340. Furthermore, the switching device 30 enables the interface of the first processor 110 to be connected with an external device, so that the interface of the first processor 110 is expanded, and waste of interface resources of a processor of a dual-path motherboard in a single-path application mode is avoided.
The motherboard 20 is a dual-path motherboard. The main board includes a first mount 210 and a second mount 220. The adapter device 30 is provided with the first connection line 340, so that the internal connection interface 230 and the external connection interface 240 of the first mounting base 210 are fully utilized, and the expansion of the processor interface in the dual-path mainboard can be completed without additionally arranging an adapter.
In one embodiment, the first connecting wire 340 may be soldered to the circuit board 310 or mounted on the circuit board 310. The first connecting line 340 can also be stamped on the circuit board 310 when the circuit board 310 is manufactured, so that the first connecting line 340 is effectively protected and prevented from being scratched.
In one embodiment, one of the first connection wires 340 is connected to only one of the internal connection interfaces 230 of the first mounting base 210 and one of the external connection interfaces 240 of the first mounting base 210.
When the first mounting base 210 includes a plurality of external interfaces 240 and a plurality of internal interfaces 230, a plurality of first connecting wires 340 are disposed on the circuit board 310, and each first connecting wire 340 is connected to one internal interface 230 and one external interface 240. One of the internal interfaces 230 is connected to only one of the first connection lines 340, and one of the external interfaces 240 is connected to only one of the first connection lines 340.
When the circuit board 310 is mounted on the first mounting seat 210, one end of the first connecting wire 340 is in contact connection with the internal interface 230 of the first mounting seat 210, and the other end of the first connecting wire 340 is used for being in contact connection with the external interface 240 of the first mounting seat 210.
In one embodiment, the shape of the circuit board 310 may be the same as or different from the shape of the mounting space of the first mounting seat 210, as long as the first connecting line 340 is accurately connected to the interface of the first mounting seat 210. The circuit board 310 may be rectangular, square, or other irregular shapes.
In one embodiment, the transition device 30 includes a first connector 320. The first connector 320 is disposed on the circuit board 310. The input interface of the first connector 320 is connected to the internal interface 230 of the first mounting seat 210, and the internal interface 230 is connected to only one of the first connection line 340 or the first connector 320. The output interface of the first connector 320 is used for connecting with an external device.
The internal interface 230 of the first mounting seat 210 is used to connect with the first processor 110, and the first connector 320 is connected with the internal interface 230 of the first mounting seat 210, so that the first connector 320 is connected with the first processor 110 through the internal interface 230 of the first mounting seat 210. The adapting device 30 connects the first processor 110 with an external device through the first connector 320, and expands an interface occupied by the internal interface 230 of the first mounting seat 210 for the first processor 110.
The first connector 320 may be an OCulinkX8 connector, or may be another high-density connector. The first connector 320 and the first connection line 340 are disposed on the circuit board 310 at an interval.
The number of the first connectors 320 is related to the kind of the first connectors 320 and the number of the internal connection interfaces 230. When the number of the internal connection interfaces 230 is large, a plurality of the first connectors 320 may be provided on the circuit board 310. The specification models of the plurality of first connectors 320 may be the same or different.
The connection relationship between the first connector 320 and the internal interface 230 can be determined according to the specification model of the first connector 320.
In one embodiment, the number of the internal connection interfaces 230 is 3, and one of the internal connection interfaces 230 is used for connecting with the first connection line 340. Two other internal interfaces 230 are used to connect with the first connector 320.
In one embodiment, the first connector 320 is an OCulink X8 connector, the distance between the contacts of the OCulink X8 connector is small, and the OCulink X8 connector is small in size, which facilitates the compact design of the transition device 30. Each of the OCulink X8 includes one input contact and 8 output contacts.
The transition device 30 includes 4 first connectors 320. Two of the first connectors 320 are connected to one of the internal interfaces 230. The 4 first connectors 320 are disposed on the circuit board 310 at intervals.
Through the first connection line 340 and the first connector 320, the first processor 110 may be connected to 12 PCIE X4 NVME SSDs, 3 PCIE X16 GPU cards, or 6 PCIE X8 HBA cards/Raid cards/network cards. The adapter 30 enables the external interface 240 of the processor to achieve the number of completely equal interfaces of the system motherboard 20 of the single processor in the single-channel application mode.
In one embodiment, the translator device 30 also includes a clock buffer 330. The clock buffer 330 is disposed on the circuit board 310. The clock buffer 330 is connected to the first connector 320. The clock buffer 330 is used to enhance the input interface signal of the first connector 320, so as to avoid signal transmission distortion caused by large load impedance. The clock buffer 330 reduces the load impact on the first connector 320.
The number of the clock buffers 330 is related to the specification type and the number of the first connector 320.
In one embodiment, each of the OCulink X8 connectors adds a PCIE reference clock through the clock buffer 330, where the PCIE reference clock is used to improve the synchronization of signal transmission of 8 output contacts of the OCulink X8 connector, and the switching device 30 further improves the stability of signal output of the OCulink X8 connector by setting the PCIE reference clock.
Each OCulink X8 connector adds 2 pairs of PCIE reference clocks of 100Mhz through the clock buffer 330. The switch device 30 includes 4 OCulink X8 connectors and 8 pairs of 100Mhz PCIE reference clocks. According to the communication protocol of the OCulink X8 connector, a PCIE reference clock of 100Mhz is selected. One PCIE reference clock is used to adjust the synchronicity of 4 output contacts, so each OCulink X8 connector needs to be configured with 2 pairs of 100Mhz PCIE reference clocks.
In one embodiment, the transition device 30 further includes an expansion slot 350. The expansion slot 350 is disposed on the circuit board 310. The expansion slot 350 is connected to the first connector 320. The expansion slot 350 is used for connecting an external device. The expansion slot 350 facilitates connection of the first connector 320 with an external device.
The expansion slot 350 is connected to the first processor 110 through the first connector 320 and the internal interface 230. The first processor 110 is connected to an external device through the internal interface 230, the first connector 320 and the expansion slot 350.
The external device includes a memory, a processor, or an external power source, etc. The occupied interface of the first processor 110 is connected to the memory, processor or external power supply via the switching device 30. The switching device 30 extends the occupied interface of the first processor 110.
The expansion slot 350 may also be disposed on a hardware device external to the adapter 30.
The types of the expansion slot comprise ISA, PCI, AGP, CNR, AMR, ACR or special PCMCIA of a notebook computer, etc.
The embodiment of the present application provides an interface expansion assembly 10, which includes the adapting device 30 and the motherboard 20 described in any of the above embodiments. The main board 20 includes the first mounting seat 210 and the second mounting seat 220 arranged at an interval. The first and second mounting seats 210 and 220 each include one of the external interfaces 240 and at least one of the internal interfaces 230. The internal connection ports 230 of the first mounting seat 210 and the internal connection ports 230 of the second mounting seat 220 are connected in a one-to-one correspondence. The first mounting seat 210 is provided with the adapter 30. The second mounting seat 220 is used for placing the first processor 110. The internal interface 230 and the external interface 240 of the second mounting base 220 are used for connecting with the first processor 110.
The interface expansion assembly 10 provided by the embodiment of the present application includes the adaptor device 30. The adapter 30 connects the internal interface 230 of the first mounting base 210 with the external interface 240 of the first mounting base 210 by providing the first connection wire 340. The external interface 240 of the first mounting base 210 is used for connecting with an external device. The internal connection ports 230 of the first mounting seat 210 and the internal connection ports 230 of the second mounting seat 220 are connected in a one-to-one correspondence. The adapter 30 connects the first processor 110 with the external interface 240 of the first mounting base 210 through the first connection wire 340. Furthermore, the interface extension module 10 enables the interface of the first processor 110 to be connected to an external device, thereby avoiding waste of interface resources of the processor in the single-channel application mode of the dual-channel motherboard.
The interface extension component 10 connects the internal interface 230 of the first mounting base 210 and the external interface 240 of the first mounting base 210 through the first connection wire 340, fully utilizes the internal interface 230 of the first mounting base 210 and the external interface 240 of the first mounting base 210, and can complete the expansion of the interface of the first processor 110 in the dual-path motherboard without additionally arranging an adapter.
In one embodiment, the first mounting base 210 includes three internal interfaces 230 and one external interface 240. The second mounting base 220 includes three internal interfaces 230 and one external interface 240. The three internal interfaces 230 of the first mounting base 210 are correspondingly connected with the three internal interfaces 230 of the second mounting base 220. The external interface 240 of the first mounting base 210 and the external interface 240 of the second mounting base 220 are respectively used for connecting with the external device or an expansion interface.
In one embodiment, three of the internal connection ports 230 of the first mounting seat 210 and three of the internal connection ports 230 of the second mounting seat 220 are oppositely arranged at intervals in a one-to-one correspondence manner. And the inner connector 230 of the first mounting seat 210 and the inner connector 230 of the second mounting seat 220 which are opposite to each other are electrically connected through a connecting wire.
When the main board 20 is used to mount two processors, the first mounting base 210 is provided with the second processor 111, and the second mounting base 220 is provided with the first processor 110. The second processor 111 includes 8 interfaces with X16 bit width, which are respectively an interface P0, an interface P1, an interface P2, an interface P3, an interface G0, an interface G1, an interface G2, and an interface G3, and the interface P0, the interface P1, the interface P2, and the interface P3 are sequentially arranged in a first column. The interface G0, the interface G1, the interface G2, and the interface G3 of the second processor 111 are arranged in a second column in sequence. The first column and the second column are respectively disposed at two opposite sides of the second processor 111. The interface G0 of the second processor 111 is in contact connection with the external interface 240 of the second mount 220. The interface G1, the interface G2, and the interface G3 of the second processor 111 are in one-to-one contact connection with the three internal interfaces 230 of the first mounting base 210, respectively.
When the motherboard 20 is used to mount two processors, the first processor 110 also includes 8X 16-bit-wide interfaces, which are respectively interface P0, interface P1, interface P2, interface P3, interface G0, interface G1, interface G2, and interface G3, interface P0, interface P1, interface P2, and interface P3 are sequentially arranged in a third column, and interface G3, interface G0, interface G1, and interface G2 are sequentially arranged in a fourth column. The third column and the fourth column are respectively disposed at two opposite sides of the first processor 110. The interface G3 of the first processor 110 is in contact connection with the external interface 240 of the second mounting base 220. The interface G0, the interface G1, and the interface G2 of the first processor 110 are respectively in one-to-one contact connection with the three internal interfaces 230 of the second mount 220.
When the motherboard 20 is used to mount two processors, the interface G3 of the first processor 110 is connected to an external device through the external interface 240 of the second mount 220. The interface G0 of the first processor 110 is connected with the interface G1 of the second processor 111 through the corresponding internal interface 230 and connecting line of the second mount 220. The interface G1 of the first processor 110 is connected with the interface G2 of the second processor 111 through the corresponding internal interface 230 and connecting line of the second mount 220. The interface G2 of the first processor 110 is connected with the interface G3 of the second processor 111 through the corresponding internal interface 230 and connecting line of the second mount 220. The interface G0, the interface G1, and the interface G2 of the first processor 110 are each configured as an XGMI interface by the first processor 110 internal control circuitry (BIOS).
When the motherboard 20 is used as a one-way system application, the motherboard 20 only provides the first processor 110 at the second mount 220. At this time, the interface G0, the interface G1 and the interface G2 of the first processor 110 are connected to the internal interface 230 of the first mounting seat 210. The internal interface 230 of the first mounting socket 210 cannot be directly used for connection with an external device. Therefore, the interface G0, the interface G1, and the interface G2 of the first processor 110 are occupied by the interconnect interface 230, and an idle state is processed, resulting in waste of interface resources.
When the adapter 30 is disposed on the first mounting seat 210, the adapter 30 connects the internal interface 230 of the first mounting seat 210 with the external interface 240 of the first mounting seat 210 by disposing the first connection wire 340. The external interface 240 of the first mounting base 210 is used for connecting with an external device. Since the internal interface 230 of the first mounting base 210 is used for connecting with the first processor 110, the adapter 30 connects the first processor 110 with the external interface 240 of the first mounting base 210 through the first connection wire 340. Furthermore, the switching device 30 enables the interface of the first processor 110 to be connected to an external device, thereby avoiding waste of interface resources of the processor when the dual-path motherboard is in the single-path application mode.
In one embodiment, one end of the first connection line 340 is connected to the external port of the first mounting base 210, and the other end of the first connection line 340 is connected to the interface G0 of the first processor 110 through the internal interface 230 of the first mounting base 210. The internal interface 230 of the first mounting base 210 corresponding to the interface G0 of the first processor 110 is disposed adjacent to the external interface 240 of the first mounting base 210, and the length of the first connection line 340 is the shortest.
The other end of the first connection line 340 may also be connected to the interface G1 of the first processor 110 through the internal interface 230 of the first mounting base 210.
The other end of the first connection line 340 may also be connected to the interface G2 of the first processor 110 through the internal interface 230 of the first mounting base 210.
When the adapter 30 is disposed on the first mounting seat 210, the adapter 30 further includes the first connector 320. The first connector 320 is disposed on the circuit board 310. The input interface of the first connector 320 is connected to the internal interface 230 of the first mounting seat 210, and the internal interface 230 is connected to only one of the first connection line 340 or the first connector 320. The output interface of the first connector 320 is used for connecting with an external device.
The internal interface 230 of the first mounting base 210 is used for connecting with the first processor 110. The first connector 320 is connected to the internal interface 230 of the first mounting seat 210. The first connector 320 is connected to the first processor 110 through the internal interface 230 of the first mounting base 210. The switching device 30 connects the first processor 110 with an external device through the first connector 320. The interface expansion assembly 10 expands the interface of the first processor 110 occupied by the internal interface 230 of the first mount 210.
In one embodiment, the first connector 320 is an OCulinkX8 connector. The transition device 30 includes 4 first connectors 320. Two of the first connectors 320 are connected to one of the internal interfaces 230. The 4 first connectors 320 are disposed on the circuit board 310 at intervals. Two of the first connectors 320 are connected with the interface G1 of the first processor 110 through the internal interface 230 of the first and second mounts 210 and 220. The other two first connectors 320 are connected to the interface G2 of the first processor 110 through the internal interfaces 230 of the first and second mounts 210 and 220. 4 first connectors 320 are connected to an external device through the expansion slot 350.
When the adapter device 30 is disposed on the first mounting seat 210, the interface expansion assembly 10 enables the first processor 110 to have 12 PCIE X4 NVME SSDs or 3 GPU cards of PCIE X16 or 6 PCIE X8 HBA cards/Raid cards/network cards through the adapter device 30. The interface expansion module 10 enables the external interface 240 of the processor to achieve the same number of interfaces of the system motherboard 20 of the single processor in the single-channel application mode.
In one embodiment, the first mount 210 and the second mount 220 each include a signal interface. The interface expansion assembly 10 also includes a signal feedback 260. The signal feedback unit 260 is disposed on the main board 20. The signal feedback unit 260 is respectively connected to the signal interface of the first mounting base 210 and the signal interface of the second mounting base 220. The signal feedback unit 260 is configured to transmit a high-level signal to the signal interface of the second mounting base 220 when the first mounting base 210 is provided with the connecting plate. The first processor 110 is disposed on the second mounting base 220 and connected to a signal interface of the second mounting base 220. When the first processor 110 receives a high level, the first processor 110 configures the interface G0, the interface G1, and the interface G2 of the first processor 110 as a PCIE interface form.
The signal feedback unit 260 is further configured to transmit a low level to the signal interface of the second mounting base 220 when the second processor 111 is disposed on the first mounting base 210. When the first processor 110 receives a low level, the first processor 110 configures the interface G0, the interface G1, and the interface G2 of the first processor 110 as an XGMI interface form.
In one embodiment, the signal feedback 260 includes a resistor. One end of the resistor is used for being connected with a power supply. The signal interface of the first mounting seat 210 and the signal interface of the second mounting seat 220 are connected in parallel to the other end of the resistor. The resistor is simple in structure and low in cost, and the overall cost of the interface extension assembly is reduced.
The position of the adapting device 30 corresponding to the signal interface of the first mounting base 210 is not provided with an interface, so that when the adapting device 30 is arranged on the first mounting base 210, the signal interface of the first mounting base 210 is not electrically connected with the adapting device 30. The current will be output to the signal interface of the second mounting base 220 through the resistor, and at this time, the signal interface of the second mounting base 220 receives a high level. The first processor 110 configures the interface G0, the interface G1, and the interface G2 of the first processor 110 as PCIE interfaces.
When the first mounting base 210 is provided with the second processor 111, the signal interface of the first mounting base 210 is connected to the second processor 111 and grounded through the second processor 111. The power supply is grounded through the resistor and the second processor 111, and the signal interface of the second mounting base 220 receives a low level. The first processor 110 configures the interface G0, the interface G1, and the interface G2 of the first processor 110 as an XGMI interface form.
The magnitude of the resistance is related to the first processor 110 and the second processor 111. The resistance may be one or more.
The adapter device 30 is detachable. When the adaptor device 30 is detached from the first mounting seat 210, the first mounting seat 210 can be used for mounting the second processor 111.
Referring to fig. 3, an expansion system 100 according to an embodiment of the present application includes the interface expansion module 10 according to any of the above embodiments and the first processor 110.
The first processor 110 is disposed on the second mounting seat 220. The first processor 110 is connected to the internal interface 230 and the external interface 240 of the second mounting base 220, respectively.
The expansion system 100 provided herein connects the internal interface 230 of the first mounting base 210 with the external interface 240 through the interface expansion assembly 10. The external interface 240 is used for connecting with an external device. Since the internal interface 230 of the first mounting base 210 is connected to the first processor 110, the adapter 30 connects the first processor 110 to the external interface 240 of the first mounting base 210 through the first connection wire 340. Furthermore, the expansion system 100 enables the interface of the first processor 110 to be connected to an external device, thereby avoiding waste of interface resources of the processor when the dual-path motherboard is in the single-path application mode.
In one embodiment, the motherboard 20 further comprises an external device 120. The external device 120 is disposed on the motherboard 20. The external device 120 is connected to the external interface 240. The external device 120 is used for connecting with an external device, so that the first processor 110 can communicate with the external device. The external device includes a memory, a processor, or an external power source, etc.
The number of the external devices 120 is two. One of the external devices 120 is connected to the external interface 240 of the first mounting base 210. Another external device 120 is connected to the external interface 240 of the second mounting base 220.
In one embodiment, the external device 120 includes a second connector 121 and an external socket 122. The second connector 121 is connected to the external interface 240 of the first mounting base 210. The external slot 122 is connected to the second connector 121. The external socket 122 is used for connecting the external device, so that the processor communicates with the external device.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-described examples merely represent several embodiments of the present application and are not to be construed as limiting the scope of the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. The utility model provides a switching device, its characterized in that, switching device is used for setting up in the first mount pad of mainboard, first mount pad includes an external interface and at least one inscription interface, inscription interface is used for being connected with first treater, switching device includes:
the circuit board, be used for set up in first mount pad, the circuit board includes first connecting wire, the one end of first connecting wire be used for with any one of first mount pad inscribe interface connection, the other end of first connecting wire be used for with first mount pad external interface connection.
2. The adapter of claim 1, wherein the adapter comprises a first connector disposed on the circuit board, an input interface of the first connector is connected to the internal interface of the first mounting seat, the internal interface is connected to only one of the first connection line or the first connector, and an output interface of the first connector is used for connecting to an external device.
3. The adapter of claim 2, further comprising a clock buffer disposed on the circuit board, the clock buffer coupled to the first connector.
4. The transition device of claim 3, wherein the first connectors are OCulink X8 connectors, each of the OCulink X8 connectors adding a PCIE reference clock through the clock buffer.
5. The adapter of claim 2, further comprising an expansion slot disposed on the circuit board, wherein the expansion slot is connected to the first connector.
6. An interface extension assembly, comprising:
the transition device according to any one of claims 1 to 5, and
the mainboard sets up including the interval first mount pad and second mount pad, first mount pad with the second mount pad all includes one external interface and at least one the inscription interface, first mount pad the inscription interface with the second mount pad the inscription interface one-to-one is connected, first mount pad is provided with switching device, the second mount pad is used for placing first treater, the second mount pad the inscription interface with external interface all be used for with first treater is connected.
7. The interface expansion assembly of claim 6, wherein the first mount and the second mount each include a signal interface, further comprising:
the signal feedback device is arranged on the mainboard and is respectively connected with the signal interface of the first mounting seat and the signal interface of the second mounting seat, and the signal feedback device is used for transmitting a high-level signal to the signal interface of the second mounting seat when the first mounting seat is provided with the switching device.
8. The interface extension assembly of claim 7, wherein the signal feedback comprises:
one end of the resistor is used for being connected with a power supply, and the signal interface of the first mounting seat and the signal interface of the second mounting seat are connected to the other end of the resistor in parallel.
9. An expansion system, comprising:
an interface extension module according to any of claims 6-8, and
the first processor is arranged on the second mounting seat and is respectively connected with the internal connection interface and the external connection interface of the second mounting seat.
10. The expansion system of claim 9, wherein the motherboard further comprises:
and the external device is arranged on the mainboard and connected with the external interface.
CN202011039756.9A 2020-09-28 2020-09-28 Switching device, interface extension assembly and extension system Pending CN112231256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011039756.9A CN112231256A (en) 2020-09-28 2020-09-28 Switching device, interface extension assembly and extension system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011039756.9A CN112231256A (en) 2020-09-28 2020-09-28 Switching device, interface extension assembly and extension system

Publications (1)

Publication Number Publication Date
CN112231256A true CN112231256A (en) 2021-01-15

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103488436A (en) * 2013-09-25 2014-01-01 华为技术有限公司 Memory extending system and memory extending method
CN205750773U (en) * 2016-05-09 2016-11-30 北京立华莱康平台科技有限公司 Network interface expanding unit
CN107894961A (en) * 2017-12-07 2018-04-10 郑州云海信息技术有限公司 A kind of symmetric design framework of multichannel CPU external interfaces interconnection
CN211349344U (en) * 2019-12-06 2020-08-25 海光信息技术有限公司 Mainboard and server

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103488436A (en) * 2013-09-25 2014-01-01 华为技术有限公司 Memory extending system and memory extending method
CN205750773U (en) * 2016-05-09 2016-11-30 北京立华莱康平台科技有限公司 Network interface expanding unit
CN107894961A (en) * 2017-12-07 2018-04-10 郑州云海信息技术有限公司 A kind of symmetric design framework of multichannel CPU external interfaces interconnection
CN211349344U (en) * 2019-12-06 2020-08-25 海光信息技术有限公司 Mainboard and server

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Inventor after: Yan Xiandong

Inventor after: Tong Jun

Inventor after: Zou Xiaobing

Inventor after: Fei Meijing

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Inventor before: Zou Xiaobing

Inventor before: Yan Xiandong

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