CN1122252C - Driving circuit for plasma display panel - Google Patents
Driving circuit for plasma display panel Download PDFInfo
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- CN1122252C CN1122252C CN 99117724 CN99117724A CN1122252C CN 1122252 C CN1122252 C CN 1122252C CN 99117724 CN99117724 CN 99117724 CN 99117724 A CN99117724 A CN 99117724A CN 1122252 C CN1122252 C CN 1122252C
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- switch
- plasma display
- display unit
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Abstract
The present invention relates to a driving circuit for a plasma display panel. The present invention is provided with a first and a second switches which are connected with each other in series, and a third and a fourth switches which are connected with each other in series, wherein the first switch, the second switch, the third switch and the fourth switch are respectively connected between a positive power supply and a negative power supply; an inductance element is connected between a connecting point of the first and the second switches and a connecting point of the third and the fourth switches; the connecting joint of the third and the fourth switches used for loading a plasma display unit. If the voltage of the plasma display unit is raised, the first switch can be conducted firstly by a control device, and after first preset time, the first switch is cut off, and the third switch is conducted. If the voltage of the plasma display unit is reduced, the second switch is firstly conducted by the control device, and after second preset time, the second switch is cut off, and the fourth switch is conducted.
Description
Technical field
The invention relates to a kind of driving circuit of capacity load, and particularly relevant for a kind of driving circuit of plasma display panel, it can avoid plasma display unit (capacity load) because of two interpolar suddenly-applied short circuits or apply the big electric current that high pressure occurs, and and then reduces energy loss and electromagnetic interference (EMI).
Background technology
The size of plasma display panel (plasma display pane1) approaches greatly, and does not have radiant rays, is the main flow of following large-sized monitor therefore.The principle of plasma display panel is that the alternating current by high voltagehigh frequency drives the electric charge in the plasma back and forth, emits ultraviolet ray and hit the fluorescent agent on the tube wall and emit beam in the process that drives.The circuit characteristic of plasma display panel can be represented by electric capacity of rough usefulness.When driving plasma display panel, to the two poles of the earth suddenly-applied short circuit of capacity load or apply high pressure, can cause very big electric current and produce many energy losses and electromagnetic interference (EMI) in moment, this be the driving circuit institute urgent problem that drives plasma display panel.The driving circuit of traditional plasma display board adopts the mode of inductance and capacitor resonance in order to reduce above-mentioned immediate current, makes gentle the discharging and recharging of plasma display panel, but the too complicated and too high problem of cost of circuit is generally all arranged.
Please refer to Fig. 1, this is the circuit diagram of known single sided driving circuit 10.Single sided driving circuit 10 is to be used for driving plasma display unit 14.Plasma display unit 14 is the load capacitance C with an equivalence
LRepresent.Single sided driving circuit 10 includes a two-way gauge tap 12, four transistor M11, M12, M15 and M16, two diode D11 and D12, inductance L 11, one a big capacitor C 11 and two a direct voltage source V and V
GTwo-way gauge tap 12 comprises two transistor M13 and M14 and two and is used for Zener (Zener) the diode ZD11 and the ZD12 of pressure limiting.
Fig. 2 then is the sequential chart of Fig. 1 single sided driving circuit 10.Wherein A represents the current potential of two-way gauge tap 12 input points, B represents the current potential of two-way gauge tap 12 output points, C represents the current potential of the grid of transistor M11, D represents the current potential of the grid of transistor M12, E represents the current potential of the grid of transistor M15, F represents the current potential of the grid of transistor M16, and Vo represents the current potential of plasma display unit 14 output terminals, Io then represent the to flow through electric current of plasma display unit 14.When oxide-semiconductor control transistors M11 and M15,, therefore the control of Electric potentials of the grid of transistor M11 and M15 can be made transistor M11 and M15 conducting when the electronegative potential, otherwise then it can be opened circuit because the source electrode of transistor M11 and M15 all is to be electrically connected on a noble potential.When oxide-semiconductor control transistors M12 and M16,, therefore the control of Electric potentials of the grid of transistor M12 and M16 can be made transistor M12 and M16 conducting when the noble potential, otherwise then it can be opened circuit because the source electrode of transistor M12 and M16 all is a ground connection.The shown control program of the control timing figure of Fig. 2 is as follows: step (1) is before period T1, and the current potential Vo of plasma display unit 14 is 0, transistor M11 with
M15 is for opening circuit, M12 and M16 be conducting step (2) in period T1, the grid C of transistor M11 can be controlled so as to and be electronegative potential 22, therefore
Can make transistor M11 conducting, A point current potential can rise to V
GWith 12 actions of control two-way switch,
The B current potential also can and then rise to V/2, and this moment, inductance and plasma display unit 14 beginnings were humorous
Shake, output terminal current potential Vo can slowly be charged to V; Step (3) is in period T2, and the grid D of transistor M12 can be controlled so as to and be noble potential 24, this meeting
Make transistor M12 conducting, A point current potential can be for reducing to 0 with control two-way switch 12, and this can make B
More to rising to V, this moment, the output terminal current potential still remained on V to current potential; Owing to transistor M15 this moment
The drain electrode and source electrode between potential difference (PD) level off to 0 and make the drain electrode and source electrode between the parasitic diode conducting,
This moment, the grid E with transistor M15 reduced to electronegative potential 26 so that transistor M15 produces zero potential
Switch; Step (4) is in period T3, and the grid C of transistor M11 can be reduced to electronegative potential 28 once again and make crystal
Pipe M11 conducting, A point current potential can rise once again and make B point potential drop extremely with conducting two-way switch 12
V/2, the grid E of transistor M15 can be controlled as noble potential and transistor M15 is opened circuit, this
The time inductance and plasma display unit 14 beginning resonance, load capacitance C
LSlowly discharge and make defeated
Go out terminal potential Vo and reduce to 0; Step (5) is in period T4, and the grid D of transistor M12 can be controlled as noble potential and make transistor M12
Conducting, A point current potential can reduce to 0 so that two-way switch 12 open circuit, this moment output terminal current potential Vo
Remain 0, B point current potential also reduces to 0, because the potential difference (PD) between transistor M16 drain electrode and source electrode
Tend to be 0 and make the drain electrode and source electrode between the parasitic diode conducting, this moment with transistor M16's
Grid F raises to noble potential 30 so that transistor M16 conducting is switched to reach zero potential; Step (6) repeating step (2) to (5) is so that the charging back and forth that plasma display unit 14 is continued.
Because the inductance L and the load capacitance C of single sided driving circuit 10
LA resonant circuit with energy exchange function be can form, inductance L and load capacitance C therefore are stored in
LOn energy just can intercourse.Yet in the process of exchange, in order to make the conducting resistance that energy can be not a large amount of consume and make the electrical potential energy of output end vo to do mild variation by transistor M15 and M16, therefore by the ON time of oxide-semiconductor control transistors M15 and M16, it is finished that is the current potential of output end vo is 0 or just conducting during V at resonance, and so just can reduce load capacitance in a large number discharges and recharges the energy that is consumed.And transistor M15 and M16 be current potential between drain-to-source itself are just conducting in 0 o'clock, therefore are called zero potential and switch.
Please refer to Fig. 3, this is the circuit diagram of the bilateral driving circuit 40 that is made of single sided driving circuit 10 shown in Figure 1.Bilateral driving circuit 40 has the two ends that two single sided driving circuits 10 are electrically connected on plasma display unit 14, is used for driving the plasmas in the plasma display unit 14 so that plasma display unit 14 is able to keep via the charging back and forth that continues the demonstration of image signal in back and forth mode.Two-way switch 42 in the single sided driving circuit 10 is two-way gauge tap 12, transistor M11 and M12 and the direct voltage source V by Fig. 1 driving circuit 10
GConstitute, switch Qa and Qb are made of transistor M15 and M16.Because the element complexity that bilateral driving circuit 40 is used, and need to use a big capacitor C 11, so its circuit complexity, control is difficult and cost is also high.
Summary of the invention
Therefore fundamental purpose of the present invention is the driving circuit that a kind of plasma display panel is provided, it utilizes four switches (MOS field effect transistor) control plasma display unit, before making its voltage draw high/draw to fall in advance by a lc circuit resonance high/drop, so as to avoiding plasma display unit (capacity load) because of two interpolar suddenly-applied short circuits or apply the big electric current that high pressure produces, and then reduce energy loss and electromagnetic interference (EMI).
According to proposed by the invention, a kind of driving circuit of plasma display panel in order to drive the plasma display unit of this plasma display board, is characterized in that, the driving circuit of this plasma display board comprises: one first switch and a second switch are one another in series between positive-negative power; One the 3rd switch and one the 4th switch are one another in series between positive-negative power, and their connected node is connected to this plasma display unit; One buffer circuit, be connected between the connected node of connected node and the 3rd, the 4th switch of this first, second switch, with so that the current potential of these gas ions display units is slow rises to noble potential or slowly reduce to electronegative potential, this buffer circuit is made of an inductance element; And this first, second, third and the 4th switch one first diode respectively in parallel, one second diode, one the 3rd diode and one the 4th diode.Therefore, when drawing high this plasma display unit to noble potential, this first switch of conducting at first, and after first schedule time, by this first switch, conducting the 3rd switch, and, drawing when falling this plasma display unit to electronegative potential, this second switch of conducting at first, and after second schedule time, by this second switch, conducting the 4th switch; This first schedule time voltage that is this plasma display unit wherein, resonance is increased to the required time of conducting the 3rd diode; This second schedule time is the voltage of this plasma display unit, and resonance is reduced to the required time of conducting the 4th diode.。When desiring to draw high the voltage of plasma display unit, control device at first can conducting first switch, and after first schedule time, by first switch and conducting the 3rd switch.And when desiring to draw the voltage of degradation gas ions display unit, control device is conducting second switch at first then, and after second schedule time, by second switch and conducting the 4th switch.In this driving circuit, first schedule time and second schedule time are respectively the lifting of plasma display unit resonance near needed time positive supply and the negative supply, first, second, third, fourth switch then can be made of the MOS field effect transistor respectively, the parasitic diode structure that has pressure limiting to use between its drain-source.
For above-mentioned and other purposes of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Brief Description Of Drawings:
Fig. 1 is the circuit diagram of known single sided driving circuit;
Fig. 2 is the sequential chart of single sided driving circuit among Fig. 1;
Fig. 3 is the circuit diagram of the bilateral driving circuit that is made of Fig. 1 single sided driving circuit;
Fig. 4 is the circuit diagram of the single sided driving circuit of plasma display panel of the present invention;
Fig. 5 is in the driving circuit of plasma display panel of the present invention, plasma display unit C
LThe sequential chart of voltage and switch M1～M4 control signal; And
Fig. 6 is another circuit diagram of the single sided driving circuit of plasma display panel of the present invention.
Embodiment
Please refer to Fig. 4, this is for the single sided driving circuit 10 of plasma display panel of the present invention.Wherein, the plasma display unit of desire driving is with capacitor C
LExpression (because plasma display unit C
LOn electrical property feature, can be considered a capacity load), driving circuit 10 then comprises four switch M1～M4, four diode D1～D4, and buffer circuit, inductance component L as shown in FIG..Switch M1, M2 and switch M3, M4 are connected in series with respectively between positive-negative power, and inductance component L then is connected between the contact of the contact of switch M1, M2 and switch M3, M4.
As plasma display unit C
LVoltage when desiring to draw high, at first conducting of switch M1, at this moment, positive supply V sees through inductance component L, plasma display unit C
LResonance makes plasma display unit C
LVoltage rise.Treat plasma display unit C
LVoltage rise near the positive supply V and conducting diode D3 after, actuating switch M3 and cutoff switch M1, so, the inductance energy amount just can be recycled to positive supply V via diode D2 and switch M3, diode D3, and makes plasma display unit C
LVoltage maintain positive supply V.
As plasma display unit C
LVoltage desire to draw when falling, at first conducting of switch M2, at this moment, negative supply (place) sees through inductance component L, plasma display unit C
LResonance makes plasma display unit C
LVoltage descend.Treat plasma display unit C
LVoltage drop near the negative supply (place) and conducting diode D2 after, actuating switch M4 and cutoff switch M2, so, the inductance energy amount just can be recycled to positive supply V via diode D4, switch M4 and diode D1, and makes plasma display unit C
LVoltage maintain negative supply (place).
The detailed action of this circuit then, is described.
Please refer to Fig. 5, this is plasma display unit C
LThe sequential chart of the control signal G1 of voltage and switch M1～M4～G4.Wherein, plasma display unit C
LDrawing high of voltage is to finish in first period (t1) and second period (t2); And plasma display unit C
LIt then is to finish in the 3rd period (t3) and the 4th period (t4) that the drawing of voltage fallen.
In first period (t1), the control signal of switch M1, M2, M3, M4 is respectively electronegative potential, electronegative potential, noble potential, electronegative potential, and therefore, switch M1, M2, M3, M4 are respectively conducting, end, end, end.At this moment, positive supply V sees through inductance component L and plasma display unit C
LResonance makes plasma display unit C
LVoltage walk unhurriedly high.
Second period (t2) is then at plasma display unit C
LVoltage rise near the positive supply and conducting diode D3 after launch.In second period (t2), the control signal of switch M1, M2, M3, M4 is respectively noble potential, electronegative potential, electronegative potential, electronegative potential, therefore, switch M1, M2, M3, M4 be respectively by, by, conducting, end.At this moment, plasma display unit C
LBe to see through switch M3 directly to connect positive supply V, so voltage can maintain high pressure.And, because plasma display unit C
LResonance rises near the positive supply V, because of plasma display unit C before connecting positive supply V
LTwo interpolars apply high pressure and the big electric current that occurs can be improved.
In the 3rd period (t3), the control signal of switch M1, M2, M3, M4 is respectively noble potential, noble potential, noble potential, electronegative potential, therefore, switch M1, M2, M3, M4 be respectively by, conducting, by, end.At this moment, negative supply (place) sees through inductance component L and plasma display unit C
LResonance makes plasma display unit C
LVoltage walk unhurriedly and drop.
The 4th period (t4) is then at plasma display unit C
LVoltage reduce near the negative supply (place) and conducting diode D4 after launch.In the 4th period (t4), the control signal of switch M1, M2, M3, M4 is respectively noble potential, electronegative potential, noble potential, noble potential, therefore, switch M1, M2, M3, M4 be respectively by, by, by, conducting.At this moment, plasma display unit C
LBe to see through switch M4 directly to connect negative supply (place), so voltage can maintain low pressure.And, because plasma display unit C
LNear the preceding resonance of connection negative supply (place) is reduced to negative supply (place), because of plasma display unit C
LTwo interpolar suddenly-applied short circuits and the big electric current that occurs can be improved.
Please refer to Fig. 6, this is another circuit diagram of the driving circuit of plasma scope of the present invention.The driving circuit that is different from Fig. 1, switch M1, the M2 in this circuit, M3, M4 and diode D1, D2, D3, D4 replace with MOS field effect transistor T1, T2, T3, T4 respectively.Wherein, the connection two ends of switch M1, M2, M3, M4 are made of MOS field effect transistor T1, T2, T3, the drain electrode of T4, source electrode respectively, then respectively by grid G 1, G2, G 3, the G4 input of MOS field effect transistor T1, T2, T3, T4, diode D1, D2, D3, D4 then are made of MOS field effect electric crystal pipe T1, T2, T3, T4 parasitic diode D1 ', D2 ', D3 ', the D4 ' institute between drain-source respectively the control signal of switch M1, M2, M3, M4.
Driving circuit among the principle of operation of this driving circuit and action and Fig. 4 is identical, is therefore no longer repeated.Control signal as for switch M1, M2, M3, M4 or MOS field effect transistor T1, T2, T3, T4 then can be provided by a control device, and it can be the sequential control circuit that microprocessor or other modes obtain.
In sum, driving circuit of the present invention is to utilize four switches (MOS field effect transistor) control plasma display unit, before making its voltage draw high/draw to fall in advance by a lc circuit resonance high/drop, so as to avoiding plasma display unit (capacity load) because of two interpolar suddenly-applied short circuits or apply the big electric current that high pressure produces, and then reduce energy loss and electromagnetic interference (EMI).
Though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim scope person of defining of the present invention.
Claims (2)
1. the driving circuit of a plasma display panel in order to drive the plasma display unit of this plasma display board, is characterized in that, the driving circuit of this plasma display board comprises:
One first switch and a second switch are one another in series between positive-negative power;
One the 3rd switch and one the 4th switch are one another in series between positive-negative power, and their connected node is connected to this plasma display unit;
One buffer circuit, be connected between the connected node of connected node and the 3rd, the 4th switch of this first, second switch, with so that the current potential of these gas ions display units is slow rises to noble potential or slowly reduce to electronegative potential, this buffer circuit is made of an inductance element; And
This first, second, third and the 4th switch one first diode respectively in parallel, one second diode, one the 3rd diode and one the 4th diode, therefore, when drawing high this plasma display unit to noble potential, this first switch of conducting at first, and after first schedule time, by this first switch, conducting the 3rd switch, and, drawing when falling this plasma display unit to electronegative potential, this second switch of conducting at first, and after second schedule time, by this second switch, conducting the 4th switch; Wherein
This first schedule time is the voltage of this plasma display unit, and resonance is increased to the required time of conducting the 3rd diode;
This second schedule time is the voltage of this plasma display unit, and resonance is reduced to the required time of conducting the 4th diode.
2. the driving circuit of plasma display panel according to claim 1, it is characterized in that, this first, second, third, fourth switch is made of a MOS field effect transistor respectively, and this first, second, third, fourth diode then is the parasitic diode of those MOS field effect transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99117724 CN1122252C (en) | 1999-08-12 | 1999-08-12 | Driving circuit for plasma display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99117724 CN1122252C (en) | 1999-08-12 | 1999-08-12 | Driving circuit for plasma display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1284702A CN1284702A (en) | 2001-02-21 |
| CN1122252C true CN1122252C (en) | 2003-09-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99117724 Expired - Fee Related CN1122252C (en) | 1999-08-12 | 1999-08-12 | Driving circuit for plasma display panel |
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| Country | Link |
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| CN (1) | CN1122252C (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100399381C (en) * | 2001-04-29 | 2008-07-02 | 中华映管股份有限公司 | Cooling controlling method for addressing-electrode driving chip on planar plasma display |
| US6963174B2 (en) * | 2001-08-06 | 2005-11-08 | Samsung Sdi Co., Ltd. | Apparatus and method for driving a plasma display panel |
| KR100428625B1 (en) * | 2001-08-06 | 2004-04-27 | 삼성에스디아이 주식회사 | A scan electrode driving apparatus of an ac plasma display panel and the driving method thereof |
| KR100463185B1 (en) * | 2001-10-15 | 2004-12-23 | 삼성에스디아이 주식회사 | A plasma display panel, a driving apparatus and a method of the plasma display panel |
| KR100477985B1 (en) * | 2001-10-29 | 2005-03-23 | 삼성에스디아이 주식회사 | A plasma display panel, a driving apparatus and a method of the plasma display panel |
| JP4031971B2 (en) * | 2001-12-27 | 2008-01-09 | 富士通日立プラズマディスプレイ株式会社 | Power module |
| TWI266270B (en) * | 2003-10-08 | 2006-11-11 | Lg Electronics Inc | Energy recovery apparatus and method of a plasma display panel |
| KR100578854B1 (en) * | 2004-08-18 | 2006-05-11 | 삼성에스디아이 주식회사 | Plasma display device driving method thereof |
| KR100670150B1 (en) * | 2005-08-17 | 2007-01-16 | 삼성에스디아이 주식회사 | Plasma display and driving method thereof |
| KR100855995B1 (en) * | 2007-05-23 | 2008-09-02 | 삼성전자주식회사 | Apparatus and method for driving display panel |
-
1999
- 1999-08-12 CN CN 99117724 patent/CN1122252C/en not_active Expired - Fee Related
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| Publication number | Publication date |
|---|---|
| CN1284702A (en) | 2001-02-21 |
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