CN112217388A - Output ripple-free DCM Buck PFC converter based on optimized modulation wave - Google Patents

Output ripple-free DCM Buck PFC converter based on optimized modulation wave Download PDF

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Publication number
CN112217388A
CN112217388A CN202010870902.6A CN202010870902A CN112217388A CN 112217388 A CN112217388 A CN 112217388A CN 202010870902 A CN202010870902 A CN 202010870902A CN 112217388 A CN112217388 A CN 112217388A
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China
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output
resistor
operational amplifier
input
circuit
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CN202010870902.6A
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Inventor
刘乐
姚凯
刘劲滔
杨坚
高阳
李家镇
王泽松
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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Priority to CN202010870902.6A priority Critical patent/CN112217388A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/42Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208Arrangements for improving power factor of AC input
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/2176Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only comprising a passive stage to generate a rectified sinusoidal voltage and a controlled switching element in series between such stage and the output
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses an output ripple-free DCMBuckPFC (discontinuous conduction mode buck power factor correction) converter based on an optimized modulation wave. Detecting the input voltage peak value signal and the output power signal by an input voltage peak value sampling circuit and an output current sampling circuit, and providing an output voltage error signal v according to the input voltage change and the output power changeeaMultiplication by a function vp_fit(Po2,Vm2) And the optimized modulated wave is intersected with the sawtooth wave, so that the duty ratio in a new state can be quickly obtained, and the converter enters a new steady state to work. The control idea of the invention is that when the input voltage changes or the output power changes, the control system can rapidly change the modulation wave signal according to the input voltage peak value sampling signal and the output current sampling signal without changing the modulation wave signalThe compensation network is adjusted to reflect the change of input voltage or the change of output power, so that the aims of quick dynamic response and no fluctuation of output voltage are fulfilled.

Description

Output ripple-free DCM Buck PFC converter based on optimized modulation wave
Technical Field
The invention relates to the technical field of alternating current-direct current converters of electric energy conversion devices, in particular to an output fluctuation-free DCMBuckPFC converter based on an optimized modulation wave.
Background
The switching power supply is widely applied to various industries, such as the fields of electronics, communication, power systems, national defense, new energy, aerospace and the like. With the continuous development and progress of society, people have increasingly strengthened protection consciousness on the natural environment, the requirements on the switch power supply technology are higher and higher, and the Power Factor Correction (PFC) technology can improve the performance of the switch power supply.
When a sinusoidal voltage signal is input into the AC-DC single-phase bridge type rectifying and filtering circuit, the input current is no longer in a sinusoidal form and contains a large number of harmonics, the power factor of the circuit is low, and the nonlinear characteristic of a load can be improved by a power factor correction technology, so that the input current is in a sinusoidal form, the power factor of the circuit is improved, and the harmonics of the input current are reduced. The technology not only effectively treats the harmonic pollution of the power grid, but also improves the efficiency of the power supply. Because the output voltage of the traditional PFC converter contains large double power frequency ripples, in order to improve the power factor of the converter, a lower voltage loop crossing frequency (generally only 10-20 Hz) needs to be set, the dynamic performance of the converter is severely restricted, and for the condition of load transient, the switching converter is limited by the bandwidth and has longer regulation time accompanied with output voltage fluctuation.
In the prior art, there are three main control methods for improving the PFC converter: the first type provides fast compensation for the load and input voltage through load current feed-forward and input voltage feed-forward to reduce overshoot of the output voltage under dynamic conditions; the second type is sliding mode control, the amplified error signal is added into a current inner ring to form a sliding mode function to control the on and off of a switching tube, and output voltage overshoot during load jump is improved; the third type is that the ripple component of the output voltage is estimated according to the parameters of the converter, the ripple part is removed before the output voltage enters the output voltage error amplifier, and the output voltage error amplifier processes the ripple-free voltage quantity and can improve the bandwidth at the same time, thereby improving the dynamic response performance of the converter.
Therefore, in the art, a converter with high dynamic performance is also a necessary trend in the development of the PFC converter.
Disclosure of Invention
The invention aims to provide an output ripple-free DCMBuckPFC converter based on an optimized modulation wave. When the dynamic change occurs, the converter can give the output voltage error signal v according to the input voltage change and the output power changeeaMultiplication by a function vp_fit(Po2,Vm2) The optimized modulated wave and the sawtooth wave are intersected, the duty ratio in a new state can be quickly obtained, the converter enters a new steady state to work, quick dynamic response can be realized, and the output voltage is free of fluctuation.
In order to solve the technical problem, the invention provides an output ripple-free DCM Buck PFC converter based on an optimized modulation wave, which comprises a main power circuit and a control circuit, wherein the control circuit comprises an output voltage sampling circuit, an output current sampling circuit, an input voltage peak value sampling circuit, an output voltage error amplifier, a first multiplier and a PWM signal generating circuit; error amplification signal v generated by output voltage error amplifier of output ripple-free DCM Buck PFC converter based on optimized modulation waveeaAfter optimization, the Pulse Width Modulation (PWM) wave is intercepted with the sawtooth wave to generate a PWM wave to control the on-off of the switching tube.
Further, the main power circuit comprises an input voltage source vinEMI filter, diode rectification circuit RB, LC filter and main power inductor LbMain power switch tube QbFreewheel diode DbAn output filter capacitor CoLoad RLAnd an output current sampling resistor Rs(ii) a Said input voltage source vinThe output port of the EMI filter is connected with the input port of a rectifier bridge RB, the output positive port of the rectifier bridge RB is connected with the input positive port of the LC filter, the output negative port of the rectifier bridge RB is connected with the input negative port of the LC filter, the output positive port of the LC filter is connected with a main power inductor LbAnd a freewheeling diode DbIs connected with the negative electrode of the LC filter, and the output negative port of the LC filter is connected with the main power switch tube QbThe negative port of the LC filter is a reference potential zero point; main power inductor LbAnother end of (1) and an output filter capacitor CoPositive electrode and load RLOne end of the two ends are connected; output filter capacitor CoNegative electrode and load RLAnd an output current sampling resistor RsIs connected to output current sampling resistor RsAnd the other end of the diode and a freewheeling diode DbPositive pole of the switch tube and the main power switch tube QbThe drain electrodes of the two electrodes are connected;
furthermore, the control circuit comprises an output voltage sampling circuit, an output current sampling circuit, an input voltage peak value sampling circuit, an output voltage error amplifier, a first multiplier and a PWM signal generating circuit; the input end of the input voltage peak value sampling circuit is connected with the positive output port of the LC filter in the main power circuit, the output end of the input voltage peak value sampling circuit is connected with the input port C of the first multiplier, and the positive input end of the output voltage sampling circuit passes through the first resistor R1And an output voltage VoThe reverse input end of the output voltage sampling circuit passes through a second resistor R2And an output voltage VoIs connected with the output end of the output voltage sampling circuit, the output end of the output voltage error amplifier is connected with the input end of the output voltage error amplifier, the output end of the output voltage error amplifier is connected with the input port A of the first multiplier, and the positive input end of the output current sampling circuit is directly connected with the output current sampling resistor RsIs connected with the output current sampling resistor R, and the reverse input end of the output current sampling circuit is directly connected with the output current sampling resistor RsThe output port of the output current sampling circuit is connected with the input port B of the first multiplierThe output port of the first multiplier is connected with the input end of the PWM signal generating circuit, and the output port of the PWM signal generating circuit is connected with the main power switch tube QbAre connected.
Further, the input voltage peak value sampling circuit comprises a third operational amplifier IC3, a fourth operational amplifier IC4, a fifth operational amplifier IC5, and a bias current source VbiasA ninth resistor R9A tenth resistor R10An eleventh resistor R11And a twelfth resistor R12A thirteenth resistor R13A fourteenth resistor R14A fifteenth resistor R15Sixteenth resistor R16A first capacitor C1A first diode D1The same-direction input end of the third operational amplifier IC3 passes through a ninth resistor R9Connected with the positive output port of the LC filter, and the same-direction input end of the third operational amplifier IC3 passes through the tenth resistor R10The inverting input terminal of the third operational amplifier IC3 is directly connected to the output terminal, and the output terminal of the third operational amplifier IC3 passes through an eleventh resistor R11And diode D1Is connected to the anode of a diode D1Is connected to the non-inverting input of a fourth operational amplifier IC4, a first diode D1Respectively with the first capacitor C1And a twelfth resistor R12Is connected to a first capacitor C1And the other end of (1) and a twelfth resistor R12Is grounded, the inverting input terminal of the fourth operational amplifier IC4 is directly connected to the output terminal, and the output terminal of the fourth operational amplifier IC4 passes through a thirteenth resistor R13Connected to the non-inverting input of a fifth operational amplifier IC5, the non-inverting input of the fifth operational amplifier IC5 being connected via a fourteenth resistor R14Grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a fifteenth resistor R15And a bias current source VbiasConnected, bias current source VbiasIs grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a sixteenth resistor R16Is connected to the output of the fifth operational amplifier IC 5.
Further, the output voltage sampling circuit includes a first operationAmplifier IC1, first resistor R1A second resistor R2A third resistor R3A fourth resistor R4The positive input terminal of the first operational amplifier IC1 passes through a first resistor R1And an output voltage VoIs connected to the positive terminal of the first operational amplifier IC1, the positive input terminal of the first operational amplifier IC1 passing through the fourth resistor R4Grounded, the inverting input terminal of the first operational amplifier IC1 passes through the second resistor R2And an output voltage VoIs connected to the negative terminal of the first operational amplifier IC1, the inverting input terminal of which passes through a third resistor R3Is connected to the output of the first operational amplifier IC 1.
Further, the output current sampling circuit comprises a second operational amplifier IC2 and a fifth resistor R5A sixth resistor R6A seventh resistor R7An eighth resistor R8The positive input terminal of the second operational amplifier IC2 passes through a fifth resistor R5And an output current sampling resistor RsIs connected to the positive input terminal of the second operational amplifier IC2 via a seventh resistor R7To ground, the inverting input of the second operational amplifier IC2 passes through a sixth resistor R6And an output current sampling resistor RsIs connected to the other end of the first operational amplifier IC2, the inverting input terminal of the second operational amplifier IC2 passing through an eighth resistor R8Is connected to the output of the second operational amplifier IC 2.
Further, the output voltage error amplifier comprises a sixth operational amplifier IC6, a second capacitor C2Seventeenth resistor R17Compensating resistor RCOMPAnd a compensation capacitor CCOMPThe positive input terminal of the sixth operational amplifier IC6 is connected to the +2.5V input voltage, and the negative input terminal of the sixth operational amplifier IC6 is connected to the seventeenth resistor R17Connected with the output end of the output voltage sampling circuit, and the inverting input end of the sixth operational amplifier IC6 and the second capacitor C2One terminal of (1), compensation capacitor CCOMPIs directly connected with one end of a compensation capacitor CCOMPAnother terminal of (1) and a compensation resistor RCOMPConnecting, compensating resistor RCOMPAnd a second capacitor C2And the other end thereof is connected to the output terminal of the sixth operational amplifier IC 6.
Further, the PWM signal generating circuit includes a seventh operational amplifier IC7, an eighth operational amplifier IC8, a sawtooth wave signal VrampThe non-inverting input terminal of the seventh operational amplifier IC7 is connected to the output terminal of the first multiplier, the inverting input terminal of the seventh operational amplifier IC7 is directly connected to the output terminal, the output terminal of the seventh operational amplifier IC7 is connected to the non-inverting input terminal of the eighth operational amplifier IC8, the inverting input terminal of the eighth operational amplifier IC8 is connected to the sawtooth wave signal VrampThe output end of the eighth operational amplifier IC8 is connected with the main power switch tube QbAre connected.
Further, the output voltage error signal v of the output voltage error amplifiereaInput to the first multiplier, and output voltage error signal v according to input voltage variation and output power variationeaMultiplying the coefficient reflecting the input voltage change and the output power change to obtain an optimized modulated wave signal vwThen is in accordance with the sawtooth wave signal VrampIntersecting to obtain duty ratio under corresponding input voltage and output power, wherein R is satisfied in the input voltage peak value sampling circuit14=R13=R16=R15,R9/R9+R10=0.016,Vbias1.075, so vJ=0.016Vm-1.075, satisfying R in the output current sampling circuit8/R6=R7/R58/3, so vK=Io/1.5=Po/120:
The optimized modulated wave signal vwAnd an output voltage error signal veaThe relationship of the function reflecting the change of the input voltage and the function of the change of the output power is as follows:
when the input voltage VmChange or output power PoWhen the input voltage peak value sampling signal and the output current sampling signal are changed, the control system can rapidly change the modulation wave signal according to the input voltage peak value sampling signal and the output current sampling signal to reach the corresponding input voltage peak value VmAnd the output power PoAnd the converter enters a new stable state, so that the aims of quick dynamic response and no fluctuation of output voltage are fulfilled.
Furthermore, the operational amplifiers used in the first operational amplifier IC1, the second operational amplifier IC2, the third operational amplifier IC3, the fourth operational amplifier IC4, the fifth operational amplifier IC5, the sixth operational amplifier IC6, the seventh operational amplifier IC7 and the eighth operational amplifier IC8 are TL074, TL072, LM358 or LM 324.
Compared with the prior art, the invention has the remarkable advantages that: (1) the dynamic response of the Buck PFC converter in the current interruption mode is improved, the voltage overshoots or undershoots when the input voltage changes and the output power changes, the output voltage of the DCM Buck PFC converter based on modulation wave optimization control has no fluctuation, and the dynamic regulation time is extremely short. (2) The method has strong expansibility and is suitable for other PFC converter topologies in a current discontinuous working mode.
Drawings
Fig. 1 is a schematic diagram of a circuit structure and a control structure in an embodiment of the invention. Wherein 1 is a main power circuit, 2 is an output voltage sampling circuit, 3 is an output current sampling circuit, 4 is an input voltage peak value sampling circuit, 5 is an output voltage error amplifier, 6 is a first multiplier, and 7 is a PWM signal generating circuit.
Fig. 2 is a schematic diagram of a main circuit of the buck pfc converter according to an embodiment of the present invention.
Fig. 3 is a waveform diagram of the inductor current of the current discontinuous mode Buck converter in one switching cycle according to an embodiment of the present invention.
FIG. 4 is a graph illustrating the variation of g _1 with respect to the input voltage Vm1 according to an embodiment of the present invention.
FIG. 5 is a graph comparing a fitted curve with an actual calculated curve.
The main points in the above figuresSymbol name: v. ofinThe voltage is input. i.e. iinInputting a current. RB rectifier bridge. v. ofgThe rectified output voltage. L isbA main power inductor. QbAnd a main power switch tube. DbA freewheeling diode. CoAnd outputting a filter capacitor. RLAnd (4) loading. RsAnd outputting a current sampling resistor. VoAnd outputting the voltage. I isoAnd outputting the current. i.e. iLbMain power inductor current. v. ofgsThe main power switch tube drives the voltage. v. ofeaAnd outputting a voltage error signal. And (t) time. ω input voltage angular frequency. VmThe input voltage peak. i.e. ioThe current transient is output. v. ofoThe voltage transient is output. DyMain power switch tube QbThe duty cycle of (c). DrFreewheeling diode DbThe freewheel duty cycle of (2). T issThe switching period of the converter. f. ofsThe switching frequency of the converter.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the specification, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, belong to the scope of the present invention.
Example 1
The working principle of the DCM BuckPFC converter is as follows:
the single-phase DCM BuckPFC converter main circuit is shown in figure 2.
Setting: 1) all devices in the main power circuit are ideal elements; 2) the output voltage ripple is very small compared to its dc amount; 3) the switching frequency is much greater than the input voltage frequency of the grid.
Fig. 3 shows a main power inductor current waveform diagram of a current discontinuous mode buck pfc converter during one switching cycle. When main power switch tube QbWhen conducting, the freewheeling diode DbCut-off, main power inductor LbVoltage across vg-VoCurrent of i thereofLbFrom zero to openStarting with (v)g-Vo) Slope linear rise of/L, main power inductance LbAnd an output filter capacitor CoAnd (4) storing energy. When the switch tube QbAt turn-off, the inductor current iLbThrough a freewheeling diode DbFollow current when the voltage across the inductor L is-VoInductor current iLbWith VoThe slope of/L decreases and the inductor current iLbDrops to zero before a new period starts. When the capacity of the inductor is released, the freewheeling diode D is cut off, and the filter capacitor C is outputoReleasing energy to an output load.
Without loss of generality, define the input voltage vinIs expressed as
vin=Vm sinωt (1)
Wherein VmIs the amplitude of the input voltage, ω is the angular frequency of the input voltage, and t is time.
The input voltage is rectified by a rectifier bridge and isolated by an LC filter to obtain rectified input voltage vgIs composed of
vg=Vm·|sinωt| (2)
According to the above analysis, the peak value i of the inductor current in one switching periodL_pkIs composed of
Wherein DyFor duty cycle of the switching tube, TsIs a switching cycle.
When the rectified voltage v is inputgHigher than the output voltage VoAnd the Buck converter can work, so that the converter does not work in a power frequency period, and the period is defined as dead time and is recorded as theta. According to the working principle of the converter, the average value of the input current and the current of the switching tube is equal in the positive half cycle power frequency period; and in the negative half cycle power frequency period, the average value of the input current is equal to that of the negative switch tube current. The input current expression is:
wherein the dead zone angle theta is arcsin (V)o/Vm)。
Assuming the efficiency of the converter to be 1, Pin=Po
The expression for the duty cycle can be derived from equation (6) as:
in conventional control, a voltage error signal v is outputeaIntercepting with sawtooth wave signal to obtain main power switch tube QbDuty ratio signal of
Example 2
The control principle of the DCM Buck PFC converter based on modulation wave optimization is as follows:
when the output power is Po1An input voltage of Vm1Compensating the network error signal vea1The expression of (a) is:
when the input voltage Vm1Constant, output power from Po1Is changed into Po2Then, the output power P can be obtainedo2An input voltage of Vm1Compensating the error signal v output by the networkea2Is expressed as
From the above equation, when the output power changes, if only the compensation network adjusts, the error signal output by the compensation network will be from v due to the limitation of the converter bandwidthea1Slowly change to vea2Thereby affecting the dynamic response performance of the converter. When the output power changes, the error signal is still v for ensuring the output voltageea1Multiplying the error signal to the output voltage with respect to the output power Po2In order to reflect the change in output power without the compensation network adjusting in order to reflect the change in output power, the function h (P)o2) Comprises the following steps:
in order to determine the magnitude of the value to which the error signal needs to be multiplied in response to changes in load, a reference power P needs to be determined in the control systemo1Since the converter is designed with a full load of 120W, the reference power P is 120W of the full loado1
Similarly, when the output power P iso1Unchanged, input voltage is from Vm1Becomes Vm2Then, an output voltage error signal v can be obtainedea3The expression of (a) is:
if no extra measures are taken, the error signal output by the compensation network becomes vea3To ensure that the output voltage error signal is vea1Multiplying the error signal to the output voltage with respect to the input voltage Vm2To reflect changes in the input voltage without the compensation network adjusting to reflect changes in the input voltage, the function g (V)m2) Comprises the following steps:
in order to determine the magnitude of the value to which the error signal needs to be multiplied to reflect changes in the input voltage, a reference input voltage V needs to be determined in the control systemm1
From the formula (12), it can be obtained that the molecular part of the formula is related to the input voltage Vm1Expression of (c) g _1 (V)m1) Comprises the following steps:
the change curve shown in fig. 4 can be obtained by equation (13). It can be seen from the figure that the variation curve of the molecular part with respect to the input voltage is a monotone upward curve, and h (V) is set to h (V) in order to prevent the duty ratio of 1 from occurring during the adjustment processm2) Must be a value less than or equal to 1 over a wide input voltage range, thereby ensuring that the initial error signal value of the converter operation is multiplied by h (V)m2) Then are all smaller than the amplitude V of the triangular waverampThe duty ratio is not 1, so the reference input voltage V is inputm1Determined as the minimum value of 90VAC over a wide voltage range.
In summary, a parametric expression v can be obtained by which the error signal needs to be multiplied when the output power and the input voltage change simultaneouslypComprises the following steps:
wherein the reference power Po1Is 120W, reference voltage Vm1Is 90 VAC.
Equation (14) is more complex, equation (15) is obtained by fitting mathematical analysis, and as the fitted curve in fig. 5 is more consistent with the actual calculated curve, equation (15) can replace equation (14) to simplify the control,
example 3
The control circuit:
according to the control principle of modulated wave optimization, a control circuit diagram as shown in fig. 1 can be designed. Output voltage error signal v of output voltage error amplifier (5)eaIs input to a first multiplier (6) to provide an output voltage error signal v in response to input voltage variations and output power variationseaMultiplying the coefficient reflecting the input voltage change and the output power change to obtain an optimized modulated wave signal vwThen is in accordance with the sawtooth wave signal VrampIntersecting to obtain duty ratio under corresponding input voltage and output power, wherein R is satisfied in the input voltage peak value sampling circuit (4)14=R13=R16=R15,R9/R9+R10=0.016,Vbias1.075, so vJ=0.016Vm-1.075, satisfying R in said output current sampling circuit (3)8/R6=R7/R58/3, so vK=Io/1.5=Po/120:
The optimized modulated wave signal vwAnd an output voltage error signal veaThe relationship of the function reflecting the change of the input voltage and the function of the change of the output power is as follows:
when the input voltage VmChange or output power PoWhen the input voltage peak value sampling signal and the output current sampling signal are changed, the control system can rapidly change the modulation wave signal according to the input voltage peak value sampling signal and the output current sampling signal to reach the corresponding input voltage peak value VmAnd the output power PoAnd the converter enters a new stable state, so that the aims of quick dynamic response and no fluctuation of output voltage are fulfilled.
As shown in figure 1 of the drawings, in which,the main power circuit 1 comprises an input voltage source vinEMI filter, diode rectification circuit RB, LC filter and main power inductor LbMain power switch tube QbFreewheel diode DbAn output filter capacitor CoLoad RLAnd an output current sampling resistor Rs(ii) a Said input voltage source vinThe output port of the EMI filter is connected with the input port of a rectifier bridge RB, the output positive port of the rectifier bridge RB is connected with the input positive port of the LC filter, the output negative port of the rectifier bridge RB is connected with the input negative port of the LC filter, the output positive port of the LC filter is connected with a main power inductor LbAnd a freewheeling diode DbIs connected with the negative electrode of the LC filter, and the output negative port of the LC filter is connected with the main power switch tube QbThe negative port of the LC filter is a reference potential zero point; main power inductor LbAnother end of (1) and an output filter capacitor CoPositive electrode and load RLOne end of the two ends are connected; output filter capacitor CoNegative electrode and load RLAnd an output current sampling resistor RsIs connected to output current sampling resistor RsAnd the other end of the diode and a freewheeling diode DbPositive pole of the switch tube and the main power switch tube QbThe drain electrodes of the two electrodes are connected;
further, the control circuit comprises an output voltage sampling circuit 2, an output current sampling circuit 3, an input voltage peak value sampling circuit 4, an output voltage error amplifier 5, a first multiplier 6 and a PWM signal generating circuit 7; the input end of the input voltage peak value sampling circuit 4 is connected with the output positive port of the LC filter in the main power circuit 1, the output end of the input voltage peak value sampling circuit 4 is connected with the input port C of the first multiplier 6, and the positive input end of the output voltage sampling circuit 2 passes through the first resistor R1And an output voltage VoIs connected with the positive port of the output voltage sampling circuit 2, and the reverse input end of the output voltage sampling circuit passes through a second resistor R2And an output voltage VoIs connected with the negative port of the output voltage sampling circuit 2, the output end of the output voltage sampling circuit 2 is connected with the input end of the output voltage error amplifier 5, the output end of the output voltage error amplifier 5 is connected with the first multiplier6, the positive input end of the output current sampling circuit 3 is directly connected with the output current sampling resistor RsIs connected with the output current sampling resistor R, the reverse input end of the output current sampling circuit 3 is directly connected with the output current sampling resistor RsThe output port of the output current sampling circuit 3 is connected with the input port B of the first multiplier 6, the output port of the first multiplier 6 is connected with the input end of the PWM signal generating circuit 7, and the output port of the PWM signal generating circuit 7 is connected with the main power switch tube QbAre connected.
Further, the input voltage peak sampling circuit 4 comprises a third operational amplifier IC3, a fourth operational amplifier IC4, a fifth operational amplifier IC5, a bias current source VbiasA ninth resistor R9A tenth resistor R10An eleventh resistor R11And a twelfth resistor R12A thirteenth resistor R13A fourteenth resistor R14A fifteenth resistor R15Sixteenth resistor R16A first capacitor C1A first diode D1The same-direction input end of the third operational amplifier IC3 passes through a ninth resistor R9Connected with the positive output port of the LC filter, and the same-direction input end of the third operational amplifier IC3 passes through the tenth resistor R10The inverting input terminal of the third operational amplifier IC3 is directly connected to the output terminal, and the output terminal of the third operational amplifier IC3 passes through an eleventh resistor R11And diode D1Is connected to the anode of a diode D1Is connected to the non-inverting input of a fourth operational amplifier IC4, a first diode D1Respectively with the first capacitor C1And a twelfth resistor R12Is connected to a first capacitor C1And the other end of (1) and a twelfth resistor R12Is grounded, the inverting input terminal of the fourth operational amplifier IC4 is directly connected to the output terminal, and the output terminal of the fourth operational amplifier IC4 passes through a thirteenth resistor R13Connected to the non-inverting input of a fifth operational amplifier IC5, the non-inverting input of the fifth operational amplifier IC5 being connected via a fourteenth resistor R14Grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a fifteenth resistor R15And a bias current source VbiasConnected, bias current source VbiasIs grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a sixteenth resistor R16Is connected to the output of the fifth operational amplifier IC 5.
Further, the output voltage sampling circuit 2 includes a first operational amplifier IC1, a first resistor R1A second resistor R2A third resistor R3A fourth resistor R4The positive input terminal of the first operational amplifier IC1 passes through a first resistor R1And an output voltage VoIs connected to the positive terminal of the first operational amplifier IC1, the positive input terminal of the first operational amplifier IC1 passing through the fourth resistor R4Grounded, the inverting input terminal of the first operational amplifier IC1 passes through the second resistor R2And an output voltage VoIs connected to the negative terminal of the first operational amplifier IC1, the inverting input terminal of which passes through a third resistor R3Is connected to the output of the first operational amplifier IC 1.
Further, the output current sampling circuit 3 includes a second operational amplifier IC2, a fifth resistor R5A sixth resistor R6A seventh resistor R7An eighth resistor R8The positive input terminal of the second operational amplifier IC2 passes through a fifth resistor R5And an output current sampling resistor RsIs connected to the positive input terminal of the second operational amplifier IC2 via a seventh resistor R7To ground, the inverting input of the second operational amplifier IC2 passes through a sixth resistor R6And an output current sampling resistor RsIs connected to the other end of the first operational amplifier IC2, the inverting input terminal of the second operational amplifier IC2 passing through an eighth resistor R8Is connected to the output of the second operational amplifier IC 2.
Further, the output voltage error amplifier 5 comprises a sixth operational amplifier IC6, a second capacitor C2Seventeenth resistor R17Compensating resistor RCOMPAnd a compensation capacitor CCOMPThe positive input terminal of the sixth operational amplifier IC6 is connected to the +2.5V input voltage, and the negative input terminal of the sixth operational amplifier IC6 is connected to the seventeenth resistor R17Connected to the output of the output voltage sampling circuit 2Inverting input terminal of six operational amplifier IC6 and second capacitor C2One terminal of (1), compensation capacitor CCOMPIs directly connected with one end of a compensation capacitor CCOMPAnother terminal of (1) and a compensation resistor RCOMPConnecting, compensating resistor RCOMPAnd a second capacitor C2And the other end thereof is connected to the output terminal of the sixth operational amplifier IC 6.
Further, the PWM signal generating circuit 7 includes a seventh operational amplifier IC7, an eighth operational amplifier IC8, a sawtooth wave signal VrampThe non-inverting input terminal of the seventh operational amplifier IC7 is connected to the output terminal of the first multiplier 6, the inverting input terminal of the seventh operational amplifier IC7 is directly connected to the output terminal, the output terminal of the seventh operational amplifier IC7 is connected to the non-inverting input terminal of the eighth operational amplifier IC8, and the inverting input terminal of the eighth operational amplifier IC8 is connected to the sawtooth wave signal VrampThe output end of the eighth operational amplifier IC8 is connected with the main power switch tube QbAre connected.
Further, an output voltage error signal v of the output voltage error amplifier 5 is outputtedeaIs input to a first multiplier 6 for providing an output voltage error signal v according to the input voltage variation and the output power variationeaMultiplying the coefficient reflecting the input voltage change and the output power change to obtain an optimized modulated wave signal vwThen is in accordance with the sawtooth wave signal VrampIntersecting to obtain duty ratio under corresponding input voltage and output power, wherein R is satisfied in the input voltage peak value sampling circuit 414=R13=R16=R15,R9/R9+R10=0.016,Vbias1.075, so vJ=0.016Vm-1.075, satisfying R in the output current sampling circuit 38/R6=R7/R58/3, so vK=Io/1.5=Po/120:
The optimized modulated wave signal vwAnd an output voltage error signal veaThe relationship of the function reflecting the change of the input voltage and the function of the change of the output power is as follows:
when the input voltage VmChange or output power PoWhen the input voltage peak value sampling signal and the output current sampling signal are changed, the control system can rapidly change the modulation wave signal according to the input voltage peak value sampling signal and the output current sampling signal to reach the corresponding input voltage peak value VmAnd the output power PoAnd the converter enters a new stable state, so that the aims of quick dynamic response and no fluctuation of output voltage are fulfilled.
Furthermore, the operational amplifiers used in the first operational amplifier IC1, the second operational amplifier IC2, the third operational amplifier IC3, the fourth operational amplifier IC4, the fifth operational amplifier IC5, the sixth operational amplifier IC6, the seventh operational amplifier IC7 and the eighth operational amplifier IC8 are TL074, TL072, LM358 or LM 324.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes in the embodiments and modifications of the invention can be made, and equivalents and modifications of some features of the invention can be made without departing from the spirit and scope of the invention.

Claims (10)

1. An output ripple-free DCM Buck PFC converter based on an optimized modulation wave is characterized in that: the control circuit comprises an output voltage sampling circuit, an output current sampling circuit, an input voltage peak value sampling circuit, an output voltage error amplifier, a first multiplier and a PWM signal generating circuit; error amplification signal v generated by output voltage error amplifier of output ripple-free DCM Buck PFC converter based on optimized modulation waveeaThroughAfter optimization, the Pulse Width Modulation (PWM) wave is generated by intersecting the sawtooth wave, and the switching on and off of a switching tube are controlled;
the main power circuit is respectively connected with the output voltage sampling circuit, the output current sampling circuit, the input voltage peak value sampling circuit and the PWM signal generating circuit, the output voltage sampling circuit is connected with the output voltage error amplifier, the output current sampling circuit, the input voltage peak value sampling circuit and the output voltage error amplifier are connected with the first multiplier, and the first multiplier is connected with the PWM signal generating circuit.
2. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the main power circuit comprises an input voltage source vinEMI filter, diode rectification circuit RB, LC filter and main power inductor LbMain power switch tube QbFreewheel diode DbAn output filter capacitor CoLoad RLAnd an output current sampling resistor Rs(ii) a Said input voltage source vinThe output port of the EMI filter is connected with the input port of a rectifier bridge RB, the output positive port of the rectifier bridge RB is connected with the input positive port of the LC filter, the output negative port of the rectifier bridge RB is connected with the input negative port of the LC filter, the output positive port of the LC filter is connected with a main power inductor LbAnd a freewheeling diode DbIs connected with the negative electrode of the LC filter, and the output negative port of the LC filter is connected with the main power switch tube QbThe negative port of the LC filter is a reference potential zero point; main power inductor LbAnother end of (1) and an output filter capacitor CoPositive electrode and load RLOne end of the two ends are connected; output filter capacitor CoNegative electrode and load RLAnd an output current sampling resistor RsIs connected to output current sampling resistor RsAnd the other end of the diode and a freewheeling diode DbPositive pole of the switch tube and the main power switch tube QbThe drain electrodes of the two electrodes are connected;
main power switch tube Q of main power circuitbIs connected with a PWM signal generating circuit, and has main powerOutput current sampling resistor R of circuitsBoth ends of the main power circuit are connected with an output current sampling circuit, and the load R of the main power circuitLAnd the output positive port of the LC filter of the main power circuit is connected with the input voltage peak value sampling circuit.
3. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the control circuit comprises an output voltage sampling circuit, an output current sampling circuit, an input voltage peak value sampling circuit, an output voltage error amplifier, a first multiplier and a PWM signal generating circuit; the input end of the input voltage peak value sampling circuit is connected with the positive output port of the LC filter in the main power circuit, the output end of the input voltage peak value sampling circuit is connected with the input port C of the first multiplier, and the positive input end of the output voltage sampling circuit passes through the first resistor R1And an output voltage VoThe reverse input end of the output voltage sampling circuit passes through a second resistor R2And an output voltage VoIs connected with the output end of the output voltage sampling circuit, the output end of the output voltage error amplifier is connected with the input end of the output voltage error amplifier, the output end of the output voltage error amplifier is connected with the input port A of the first multiplier, and the positive input end of the output current sampling circuit is directly connected with the output current sampling resistor RsIs connected with the output current sampling resistor R, and the reverse input end of the output current sampling circuit is directly connected with the output current sampling resistor RsThe output port of the output current sampling circuit is connected with the input port B of the first multiplier, the output port of the first multiplier is connected with the input end of the PWM signal generating circuit, and the output port of the PWM signal generating circuit is connected with the main power switch tube QbAre connected.
4. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the input voltage peak value sampling circuit comprises a third operational amplifier IC3, a fourth operational amplifier IC4, a fifth operational amplifier IC5 and a bias current source VbiasA ninth resistor R9A tenth resistor R10An eleventh resistor R11And a twelfth resistor R12A thirteenth resistor R13A fourteenth resistor R14A fifteenth resistor R15Sixteenth resistor R16A first capacitor C1A first diode D1The same-direction input end of the third operational amplifier IC3 passes through a ninth resistor R9Connected with the positive output port of the LC filter, and the same-direction input end of the third operational amplifier IC3 passes through the tenth resistor R10The inverting input terminal of the third operational amplifier IC3 is directly connected to the output terminal, and the output terminal of the third operational amplifier IC3 passes through an eleventh resistor R11And diode D1Is connected to the anode of a diode D1Is connected to the non-inverting input of a fourth operational amplifier IC4, a first diode D1Respectively with the first capacitor C1And a twelfth resistor R12Is connected to a first capacitor C1And the other end of (1) and a twelfth resistor R12Is grounded, the inverting input terminal of the fourth operational amplifier IC4 is directly connected to the output terminal, and the output terminal of the fourth operational amplifier IC4 passes through a thirteenth resistor R13Connected to the non-inverting input of a fifth operational amplifier IC5, the non-inverting input of the fifth operational amplifier IC5 being connected via a fourteenth resistor R14Grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a fifteenth resistor R15And a bias current source VbiasConnected, bias current source VbiasIs grounded, and the inverting input terminal of the fifth operational amplifier IC5 passes through a sixteenth resistor R16Is connected to the output of the fifth operational amplifier IC 5.
5. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the output voltage sampling circuit comprises a first operational amplifier IC1, a first resistor R1A second resistor R2A third resistor R3A fourth resistor R4The positive input terminal of the first operational amplifier IC1 passes through a first resistor R1And the transmissionVoltage V outoIs connected to the positive terminal of the first operational amplifier IC1, the positive input terminal of the first operational amplifier IC1 passing through the fourth resistor R4Grounded, the inverting input terminal of the first operational amplifier IC1 passes through the second resistor R2And an output voltage VoIs connected to the negative terminal of the first operational amplifier IC1, the inverting input terminal of which passes through a third resistor R3Is connected to the output of the first operational amplifier IC 1.
6. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the output current sampling circuit comprises a second operational amplifier IC2 and a fifth resistor R5A sixth resistor R6A seventh resistor R7An eighth resistor R8The positive input terminal of the second operational amplifier IC2 passes through a fifth resistor R5And an output current sampling resistor RsIs connected to the positive input terminal of the second operational amplifier IC2 via a seventh resistor R7To ground, the inverting input of the second operational amplifier IC2 passes through a sixth resistor R6And an output current sampling resistor RsIs connected to the other end of the first operational amplifier IC2, the inverting input terminal of the second operational amplifier IC2 passing through an eighth resistor R8Is connected to the output of the second operational amplifier IC 2.
7. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the output voltage error amplifier comprises a sixth operational amplifier IC6 and a second capacitor C2Seventeenth resistor R17Compensating resistor RCOMPAnd a compensation capacitor CCOMPThe positive input terminal of the sixth operational amplifier IC6 is connected to the +2.5V input voltage, and the negative input terminal of the sixth operational amplifier IC6 is connected to the seventeenth resistor R17Connected with the output end of the output voltage sampling circuit, and the inverting input end of the sixth operational amplifier IC6 and the second capacitor C2One terminal of (1), compensation capacitor CCOMPIs directly connected with one end of a compensation capacitor CCOMPAnother terminal of (1) and a compensation resistor RCOMPConnecting, compensating resistor RCOMPAnd a second capacitor C2And the other end thereof is connected to the output terminal of the sixth operational amplifier IC 6.
8. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the PWM signal generating circuit comprises a seventh operational amplifier IC7, an eighth operational amplifier IC8, a sawtooth wave signal VrampThe non-inverting input terminal of the seventh operational amplifier IC7 is connected to the output terminal of the first multiplier, the inverting input terminal of the seventh operational amplifier IC7 is directly connected to the output terminal, the output terminal of the seventh operational amplifier IC7 is connected to the non-inverting input terminal of the eighth operational amplifier IC8, the inverting input terminal of the eighth operational amplifier IC8 is connected to the sawtooth wave signal VrampThe output end of the eighth operational amplifier IC8 is connected with the main power switch tube QbAre connected.
9. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: output voltage error signal v of output voltage error amplifiereaInput to the first multiplier, and output voltage error signal v according to input voltage variation and output power variationeaMultiplying the coefficient reflecting the input voltage change and the output power change to obtain an optimized modulated wave signal vwThen is in accordance with the sawtooth wave signal VrampIntersecting to obtain duty ratio under corresponding input voltage and output power, wherein R is satisfied in the input voltage peak value sampling circuit14=R13=R16=R15,R9/R9+R10=0.016,Vbias1.075, so vJ=0.016Vm-1.075, satisfying R in the output current sampling circuit8/R6=R7/R58/3, so vK=Io/1.5=Po/120:
The optimized modulated wave signal vwAnd an output voltage error signal veaThe relationship of the function reflecting the change of the input voltage and the function of the change of the output power is as follows:
when the input voltage VmChange or output power PoWhen the input voltage peak value sampling signal and the output current sampling signal are changed, the control system can rapidly change the modulation wave signal according to the input voltage peak value sampling signal and the output current sampling signal to reach the corresponding input voltage peak value VmAnd the output power PoAnd the converter enters a new stable state, so that the aims of quick dynamic response and no fluctuation of output voltage are fulfilled.
10. The DCM Buck PFC converter based on optimized modulated wave output ripple-free according to claim 1, wherein: the amplifiers used in the first operational amplifier IC1, the second operational amplifier IC2, the third operational amplifier IC3, the fourth operational amplifier IC4, the fifth operational amplifier IC5, the sixth operational amplifier IC6, the seventh operational amplifier IC7 and the eighth operational amplifier IC8 are operational amplifiers of models such as TL074, TL072, LM358 or LM 324.
CN202010870902.6A 2020-08-26 2020-08-26 Output ripple-free DCM Buck PFC converter based on optimized modulation wave Pending CN112217388A (en)

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Application publication date: 20210112