CN103813591A - CRM Flyback LED (Light-Emitting Diode) driver with low output current peak-to-average ratio - Google Patents

CRM Flyback LED (Light-Emitting Diode) driver with low output current peak-to-average ratio Download PDF

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CN103813591A
CN103813591A CN201410056250.7A CN201410056250A CN103813591A CN 103813591 A CN103813591 A CN 103813591A CN 201410056250 A CN201410056250 A CN 201410056250A CN 103813591 A CN103813591 A CN 103813591A
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operational amplifier
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CN103813591B (en
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姚凯
毕晓鹏
吕建国
付晓勇
孟庆赛
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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Abstract

The invention discloses a CRM Flyback LED (Light-Emitting Diode) driver with a low output current peak-to-average ratio. The CRM Flyback LED driver comprises a main power circuit, a saw-tooth wave comparison and switching tube driving circuit, an input voltage feed-forward circuit, a first multiplier, a second multiplier and an output current feedback circuit. The input voltage feed-forward circuit is characterized in that the output end of a first voltage division follower circuit is connected with one input end of a summing circuit and one input end of a subtracting circuit respectively; the output end of a second voltage division peak sampling circuit is connected with the other input end of the subtracting circuit; the output end of a third voltage division amplifying circuit is connected with the other input end of the adding circuit and the third input end of the first multiplier respectively; the output end of the summing circuit is connected with the second input end of the first multiplier, the output end of the subtracting circuit is connected with the first input end of the first multiplier, the output end of the first multiplier is connected with the first input end of the second multiplier, and the output end of the second multiplier is connected to the input end of the saw-tooth wave comparison and switching tube driving circuit. By adopting the CRM Flyback LED driver, the output current peak-to-average ratio is reduced.

Description

The CRM Flyback LED driver of low output current peak-to-average force ratio
Technical field
The present invention relates to the CRM Flyback LED driver in the A.C.-D.C. converter field of electrical energy changer, particularly a kind of low output current peak-to-average force ratio.
Background technology
High brightness light emitting diode LED (light-emitting diode), because of advantages such as its high efficiency, environmental protection and long-lives, has been described as next generation's " green " light source.LED can adopt unidirectional pulsating current to drive, by controlling the mean value control LED output light flux of pulsating current, if but drive current peak-to-average force ratio is too high, and LED will damage.The advantages such as CRM Flyback LED driver has input and output isolation, it is simple to control and loss is little, but when within half input cycle, switching tube determine ON time, output current peak-to-average force ratio is larger, LED is normally worked unfavorable.
Summary of the invention
The object of the present invention is to provide a kind of CRM Flyback LED driver of low output current peak-to-average force ratio, guaranteeing that CRM Flyback LED driver PF value is greater than under the prerequisite of application requirements, reduces output current peak-to-average force ratio.
The technical solution that realizes the object of the invention is: a kind of CRM Flyback LED driver of low output current peak-to-average force ratio, comprise main power circuit and control circuit, and described main power circuit comprises input voltage source v in, electromagnetic interface filter, diode rectifier circuit RB, transformer T 1, switching tube Q b, diode D b, filter capacitor C o, filter inductance L owith load LED, wherein input voltage source v inbe connected with the input port of electromagnetic interface filter, the output port of electromagnetic interface filter is connected with the input port of diode rectifier circuit RB, the output negative pole of diode rectifier circuit RB is reference potential zero point, the first winding N of the output cathode of diode rectifier circuit RB and transformer T1 pdifferent name end connect, the first winding N of transformer T1 pthe drain electrode of Same Name of Ends access switching tube Qb, the source electrode of switching tube Qb is connected with reference potential zero point, transformer T 1the second winding N zdifferent name end be connected zero point with reference potential, transformer T 1tertiary winding N ssame Name of Ends and diode D banodic bonding, diode D bnegative electrode access respectively filter capacitor C oone end and filter inductance L oone end, filter capacitor C oother end access reference potential zero point, filter inductance L othe other end be connected with the anode tap of load LED, the both end voltage of load LED is output voltage V o;
Described control circuit comprises sawtooth waveforms comparison and switch tube driving circuit, the first dividing potential drop follow circuit, the second dividing potential drop peak sample circuit, the 3rd dividing potential drop amplifying circuit, add circuit, subtraction circuit, the first multiplier, the second multiplier, output current feedback circuit; The wherein output of sawtooth waveforms comparison and switch tube driving circuit and switching tube Q bgate pole connect; The input of the first dividing potential drop follow circuit and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the output terminals A of the first dividing potential drop follow circuit is connected with input of add circuit and an input of subtraction circuit respectively; The input of the second dividing potential drop peak sample circuit and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the second output C of dividing potential drop peak sample circuit and another input of subtraction circuit are connected; The 3rd input of dividing potential drop amplifying circuit and the output voltage V of main power circuit oanodal connection, the output D of the 3rd dividing potential drop amplifying circuit respectively with another input of add circuit and the 3rd input v of the first multiplier zconnect; The second input v of the output E of add circuit and the first multiplier yconnect the output F of subtraction circuit and the first input end v of the first multiplier xconnect the first input end v of the output of the first multiplier and the second multiplier aconnect the output access sawtooth waveforms comparison of the second multiplier and the input of switch tube driving circuit, the second input v of the output of output current feedback circuit and the second multiplier bconnect.
Compared with prior art, its remarkable advantage is in the present invention: (1), keeping whole input voltage range internal power factor PF value to be greater than under the prerequisite of application requirements, has effectively reduced output current peak-to-average force ratio; (2) reduce the spoilage of LED, extended the life-span of institute's driving LED; (3) there is safe and reliable advantage, have a extensive future.
Accompanying drawing explanation:
Fig. 1 is Flyback pfc converter main circuit schematic diagram.
Fig. 2 is the inductive current oscillogram of CRM Flyback pfc converter.
Fig. 3 is power factor PF value and V m/ nV ograph of relation.
Fig. 4 is output current peak-to-average force ratio and V m/ nV ograph of relation.
Fig. 5 is g (ω ideal curve and matched curve figure t) in half power frequency period.
Fig. 6 is wide input range lower critical inductance value curve chart.
Fig. 7 is switching frequency change curve in half power frequency period under different input voltages, and wherein (a) input voltage is 85V, and (b) input voltage is 175V, and (c) input voltage is 265V.
Fig. 8 is primary current peak I pkwith effective value I rmscurve chart under wide region input.
Fig. 9 is the electrical block diagram of the CRM Flyback LED driver of the low output current peak-to-average force ratio of the present invention.
Embodiment
The operation principle of 1CRM Flyback pfc converter
Fig. 1 is Flyback pfc converter main circuit.
Without loss of generality, definition input ac voltage v inexpression formula be
v in(t)=V msinωt (1)
Wherein V mfor input voltage peak value, ω=2 π f linefor input voltage angular frequency, f linefor input voltage frequency
Voltage after input rectifying is so
v g=V m|sinωt| (2)
Fig. 2 is the inductive current waveform of a switch periods inner conversion device.In the time of switching tube Q conducting, diode D cut-off, former limit inductance L pthe voltage at two ends is v g, current i L pby zero beginning with v g/ L plinear rising of slope, i so lppeak value iL p_pkfor
i Lp _ pk = V m | sin ωt | L p t on - - - ( 3 )
Wherein t onfor the ON time of Q
When Q turn-offs, diode D conducting, by secondary inductance L scurrent i lsafterflow, now secondary inductance L sthe voltage at two ends is V o, secondary inductance current i lswith V o/ L sslope from secondary current peak value i ls_pkdecline, i lsdrop to zero time t offfor
t off = i Ls _ pk V o / L s = ni Lp _ pk n 2 V o / L p = V m | sin ωt | nV o t on - - - ( 4 )
Wherein n is the transformer primary secondary turn ratio, L sfor transformer secondary inductance, i ls_pkfor secondary inductance current peak.
Because Flyback converter is operated in CRM pattern, therefore, in the time that the electric current of diode D drops to zero, switching tube Q is open-minded, starts new switch periods.
Can obtain duty ratio d by formula (4) is
d(t)=t on/(t on+t off)=nV o/(nV o+V m|sinωt|) (5)
By formula (3) and (5), in a switch periods, the mean value i of former limit inductive current lp_avfor
i Lp _ av = 1 2 i Lp _ pk d ( t ) = n V o V m | sin ωt | 2 L p ( nV o + V m | sin ωt | ) t on - - - ( 6 )
So, input current i infor
i in ( t ) = n V o V m sin ωt 2 L p ( nV o + V m | sin ωt | ) t on - - - ( 7 )
In a switch periods, the mean value i of secondary current ls_avbe output current i ofor:
i o ( t ) = i Lp _ av = 1 2 i Lp _ pk ( 1 - d ( t ) ) = n ( V m | sin ωt | ) 2 2 L p ( nV o + V m | sin ωt | ) t on - - - ( 8 )
So, in half power frequency period, output current mean value I ofor
I o = 1 T line / 2 ∫ 0 T line / 2 i o ( t ) dt - - - ( 9 )
Wherein T linefor the input voltage cycle.
By formula (1) and formula (7), can obtain the average value P of input power in half power frequency period in
P in = 1 T line / 2 ∫ 0 T line / 2 v in ( t ) i in ( t ) dt = 1 π ∫ 0 π 1 2 ( V m sin ωt ) 2 L p t on nV o nV o + V m | sin ωt | d ωt - - ( 9 )
Suppose that transducer effciency is 100%, input power equals power output so, i.e. P in=P o.Can obtain switching tube ON time t by formula (10) on
t on = 2 π L p P o nV o V m 2 · 1 ∫ 0 π ( sin ωt ) 2 nV o + V m | sin ωt | dωt - - - ( 11 )
By formula (7), formula (10) and formula (11) can be in the hope of the expression formula of power factor PF value
PF = P in 1 2 V m I in _ rms = P o 1 2 V m 1 π ∫ 0 π ( i in ( t ) ) 2 dωt = 2 π ∫ 0 π ( sin ωt ) 2 1 + V m nV o | sin ωt | dωt ∫ 0 π ( sin ωt 1 + V m nV o | sin ωt | ) 2 - - - ( 12 )
By formula (12), in conjunction with 3.1 joint design objectives, power factor PF is with V m/ nV ovariation rule curve as shown in Figure 3.2 reduce the control strategy of output current peak-to-average force ratio
3.1 traditional approach
By formula (8), formula (9) and formula (11), determine under ON time control mode output current instantaneous value i owith mean value I oratio
i o ( t ) I o = π sin 2 ωt ∫ 0 π sin 2 ωt 1 + V m nV o | sin ωt | dωt · 1 1 + V m nV o | sin ωt | - - - ( 13 )
In the time of ω t=pi/2, formula (13) is got maximum, and peak-to-average force ratio is
i o ( t ) I o | max = π ∫ 0 π sin 2 ωt 1 + V m nV o | sin ωt | dωt · 1 ( 1 + V m nV o ) - - - ( 14 )
Make Fig. 4 according to formula (14), can find out and adopt while determining ON time control, peak-to-average force ratio is larger.
3.2 become ON time control method
For reducing output current peak-to-average force ratio, can in input current, inject 3 times and 5 subharmonic, establish input current expression formula and be
i in 1 + 3 + 5 ( t ) = I 1 ( sin ωt + I 3 * sin 3 ωt + I 5 * sin 5 ωt ) = I 1 sin ωt · g ( ωt ) - - - ( 15 )
Wherein i 1for fundamental voltage amplitude, I 3 *that 3 subharmonic amplitudes are based on I 1per unit value, I 5 *that 5 subharmonic amplitudes are based on I 1per unit value.
By power-balance, output current instantaneous value i o1+3+5(t) be
i o 1 + 3 + 5 ( t ) = V m sin ωt V o i in ( t ) = V m I 1 V o sin ωt · ( sin ωt + I 3 * sin 3 ωt + I 5 * sin 5 ωt ) = V m I 1 V o sin 2 ωt · g ( ωt ) - - - ( 16 )
In half power frequency period, to formula (16) integration, can obtain output current mean value I in half power frequency period o1+3+5
I o 1 + 3 + 5 = 2 T line ∫ 0 T line 2 i o 1 + 3 + 5 dt = I 1 V m 2 V o - - - ( 17 )
Can be found out by formula (17), in output current mean value and input current, inject 3 times, 5 subharmonic amounts irrelevant.Guarantee to equate with the output current of determining under ON time control, can obtain
I 1 = 2 V o I o 1 + 3 + 5 V m = 2 V o I o V m = 2 P o V m - - - ( 18 )
According to formula (6), formula (10) and formula (15), ON time t on1+3+5for
t on 1 + 3 + 5 = 4 P o L p ( nV o + V m | sin ωt | ) V m 2 n V o g ( ωt ) - - - ( 19 )
By formula (16) and formula (18), output current with the ratio of its mean value is
i o 1 + 3 + 5 * ( t ) = i o 1 + 3 + 5 ( t ) I o 1 + 3 + 5 - - - ( 20 )
After input current injection 3 times, 5 subharmonic, meet under the prerequisite of PF>=0.9 I 3 *, I 5 *must just can make peak-to-average force ratio minimum for particular value, get I 3 *=0.382, I 5 *=0.081, now peak-to-average force ratio is 1.40, PF=0.93.
3.3 matchings become ON time control method
ON time shown in formula (19) change function analog circuit realize more difficult, seek below relatively simple function come matching it.Can find out from formula (19), fitting function core is that (ω t) for matching g wherein.
Based on Taylor series
f ( x ) = f ( x 0 ) + f ′ ( x 0 ) ( x - x 0 ) + f ″ ( x 0 ) 2 ! ( x - x 0 ) 2 + · · · + f n ( x 0 ) n ! ( x - x 0 ) n + · · · - - - ( 21 )
Only retain first derivative item, (ω can approximate expression be t) g
g ( ωt ) ≈ g ( sin ωt 0 ) + d ( g ( ωt ) ) d ( sin ωt ) | t = t 0 ( sin ωt - sin ωt 0 ) = a ( 1 + k | sin ωt | ) - - - ( 22 )
According to formula (15) and formula (16), can obtain
i in ( t ) = 2 aP o V m sin ωt ( 1 + k | sin ωt | ) - - - ( 23 )
i o ( t ) = V m sin ωt V o i in ( t ) = 2 aP o V o sin 2 ωt ( 1 + k | sin ωt | ) - - - ( 24 )
Can be obtained by formula (1) and formula (23), adopt matching to become after ON time control, power factor PF is
1 T line / 2 ∫ 0 T line / 2 v in ( t ) i in ( t ) dt 1 2 V m I in _ rms = 1 2 ( 1 + 8 3 π k ) π 2 + 8 2 k + 3 π 8 k 2
Get PF=0.93, can obtain k=-0.78.
According to formula (24), in half power frequency period, output current mean value is
I o = 1 π ∫ 0 π i o ( ωt ) dωt = P o V o ( a + 8 ak 3 π ) - - - ( 26 )
Guarantee to become after ON time control in matching, average output driving current remains unchanged,
a + 8 ak 3 π = 1 - - - ( 27 )
By k=-0.78 substitution formula (27), obtain a=3.086.(ideal curve t) of ω and matched curve are as shown in Figure 5 for g.
Can be in the hope of by formula (6), formula (10) and formula (23), after matching, become ON time into
t on = 4 P o L p ( nV o + V m | sin ωt | ) a ( 1 + k | sin ωt | ) V m 2 · n V o - - - ( 28 )
By k=-0.78, a=3.086 substitution formula (24), can obtain the ratio i of output current and its mean value o *for
i o * ( t ) = i o ( t ) I o = 6.16 sin 2 ωt ( 1 - 0.78 | sin ωt | ) - - - ( 29 )
To above formula differentiate in half power frequency period, making derivative is zero to ask extreme value, can be in the hope of adopting matching to become after ON time control, and output current peak-to-average force ratio is 1.44.
4 performance comparison
4.1 former limit inductance and switching frequencies
For ease of analyzing, design parameter is as follows: v in=85~265VAC, P o=60W, V o=24V, n=4.
By formula (4) and formula (11), determine switching frequency f under ON time sfor
f s = 1 t on + t off = nV o V m 2 ∫ 0 π ( sin ϖt ) 2 nV o + V m | sin ωt | dωt 2 π L p P o ( 1 + V m | sin ωt | nV o ) - - - ( 31 )
Can be obtained by formula (4) and (28), become switching frequency f under ON time s' be
f s ′ = V m 2 ( nV o ) 2 12.34 P o L p ′ · 1 ( nV o + V m | sin ωt | ) 2 ( 1 - 0.78 | sin ωt | ) - - - ( 32 )
Adopt and determine ON time control, input voltage V mone timing, f in half power frequency period sconstantly change, when ω t=pi/2, f sminimum.At different input voltage V munder, f sminimum value is also different.Adopt and become ON time control, input voltage V mone timing, f in half power frequency period sconstantly change, when ω t gets [0, pi/2] interior a certain value, f sminimum.At different input voltage V munder, f sminimum value difference, its corresponding ω t is also different.Consider human auditory system frequency range, get f smin=20kHz, can make the threshold inductance value under different input voltages, as shown in Figure 6.
By the threshold inductance value L under wide input range pmax=656 μ H and L ' pmax=598 μ H are substitution formula (31) and formula (32) respectively, and the switching frequency that can obtain switching tube in two kinds of situations changes function
f s = nV o V m 2 ∫ 0 π ( sin ωt ) 2 nV o + V m | sin ωt | dωt 2 π L p max P o ( 1 + V m | sin ωt | nV o ) - - - ( 33 )
f s ′ = V m 2 ( nV o ) 2 12.34 P o L p max ′ · 1 ( nV o + V m | sin ωt | ) 2 ( 1 - 0.72 | sin ωt | ) - - - ( 34 )
Fig. 7 is for being respectively (a) 85V, (b) 175V and (c) excursion of switching frequency under half power frequency period ON time decided at the higher level but not officially announced and the control of change ON time when 265V when input voltage.On the whole, within the scope of 85V~175V, under the control of change ON time, switching tube switching frequency is less; Within the scope of 175V~265V, determine under ON time control switching tube switching frequency less.
4.2 current peaks and effective value
According to formula (3) and formula (11), can be in half power frequency period, determine primary current peak I under ON time control lp_pkwith effective value I lP_rmsbe respectively
I Lp _ pk = 2 π P o v m ∫ 0 π sin 2 ωt 1 + V m nV o | sin ωt dωt - - - ( 35 )
I LP _ rms = 2 T line ∫ 0 T line 2 [ i in _ rms ( t ) ] 2 dt = 2 T line ∫ 0 T line 2 ( V m | sin ωt | L p ) 2 · t on 3 3 t s dt = 2 P o V m π 3 ∫ 0 π sin 2 ωt 1 + V m nV o | sin ωt | dωt - - - ( 36 )
In like manner, according to formula (3), formula (23) and formula (28), can be in half power frequency period, primary current peak I under the control of change ON time ' lp_pkwith effective value I' lP_rmsbe respectively
I Lp _ pk ′ = 12.34 P o V m | sin ωt | ( 1 + V m | sin ωt | nV o ) ( 1 - 0.78 | sin ωt | ) - - - ( 37 )
I LP _ rms ′ = 4 P o V m 3.086 3 π ∫ 0 π ( 1 + V m | sin ωt | nV o ) sin 2 ωt ( 1 - 0.78 | sin ωt | ) 2 dt - - - ( 38 )
Fig. 8 is that wide region is inputted lower two kinds of control mode primary current peak values and effective value waveform.As can be seen from the figure, than the control of fixing time, adopt and become conducting control, converter primary current peak value is smaller, and effective value is bigger.
The CRM Flyback LED driver of the low output current peak-to-average force ratio of 5 the present invention
In conjunction with Fig. 9, input voltage v gthrough resistance the first resistance R 1with the second resistance R 2dividing potential drop obtains v a=k vgv m| sin ω t|, k here vgit is dividing potential drop coefficient.The 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the first diode D 1, the first capacitor C 1composition dividing potential drop peak sample circuit, v c=1.28k vgv m, wherein R 3/ R 4=1.28R 1/ R 2.Output voltage V othrough the 9th resistance R 9with the tenth resistance R 10dividing potential drop is again through the 7th resistance R 7, the 8th resistance R 8, the 4th operational amplification circuit A 4the amplifier of composition obtains v d=k vgnV o, wherein R 9/ R 10=R 1/ R 2, R 8/ R 7=n-1.V awith v caccess subtraction circuit, wherein R 11=R 14, R 12=R 13, R 14/ R 13=0.78, be output as v f=k vgv m(1-0.78|sin ω t|).V awith v daccess add circuit, wherein R 15=R 16=R 17=R 19=2R 18, be output as v e=k vg(nV o+ V m| sin ω t|).V d, v ewith v faccess the first multiplier, it exports v a=[k vgv m(1-0.78|sin ω t|) (nV o+ V m| sin ω t|)]/nV o.Output current i oobtain error signal v by output current feedback circuit eA, v eAwith v aaccess the second multiplier, it exports v c=v eAv a=[v eAk vgv m(1-0.78|sin ω t|) (nV o+ V m| sin ω t|)]/nV o, by v chand over and cut the ON time that can obtain suc as formula Changing Pattern shown in (30) with sawtooth waveforms.Wherein v a, v c, v d, v e, v f, v a, v c, v bbe respectively the first dividing potential drop follow circuit 3, the second dividing potential drop peak sample circuit 4, the 3rd dividing potential drop amplifying circuit 5, add circuit 6, subtraction circuit 7, the 1st multiplier the 8, the 2nd multiplier 9, output voltage output current feedback circuit 10.Physical circuit is as follows:
The CRM Flyback LED driver of low output current peak-to-average force ratio of the present invention, comprises main power circuit 1 and control circuit, and described main power circuit 1 comprises input voltage source v in, electromagnetic interface filter, diode rectifier circuit RB, transformer T 1, switching tube Q b, diode D b, filter capacitor C o, filter inductance L owith load LED, wherein input voltage source v inbe connected with the input port of electromagnetic interface filter, the output port of electromagnetic interface filter is connected with the input port of diode rectifier circuit RB, and the output negative pole of diode rectifier circuit RB is reference potential zero point, the output cathode of diode rectifier circuit RB and transformer T 1the first winding N pdifferent name end connect, transformer T 1the first winding N psame Name of Ends access switching tube Q bdrain electrode, switching tube Q bsource electrode be connected zero point with reference potential, transformer T 1the second winding N zdifferent name end be connected zero point with reference potential, transformer T 1tertiary winding N ssame Name of Ends and diode D banodic bonding, diode D bnegative electrode access respectively filter capacitor C oone end and filter inductance L oone end, filter capacitor C oother end access reference potential zero point, filter inductance L othe other end be connected with the anode tap of load LED, the both end voltage of load LED is output voltage V o; It is V that described control circuit adopts Changing Pattern m(nV o+ V m| sin ω t|) (1-0.78|sin ω t)/nV othe output signal driving switch pipe Q of ON time bcomprise sawtooth waveforms comparison and switch tube driving circuit 2, the first dividing potential drop follow circuit 3, the second dividing potential drop peak sample circuit 4, the 3rd dividing potential drop amplifying circuit 5, add circuit 6, subtraction circuit 7, the first multiplier 8, the second multiplier 9, output current feedback circuit 10, the wherein output of sawtooth waveforms comparison and switch tube driving circuit 2 and switching tube Q bgate pole connect; The input of the first dividing potential drop follow circuit 3 and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the output terminals A of the first dividing potential drop follow circuit 3 is connected with input of add circuit 6 and an input of subtraction circuit 7 respectively; The input of the second dividing potential drop peak sample circuit 4 and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the second output C of dividing potential drop peak sample circuit 4 and another input of subtraction circuit 7 are connected; The output D of the 3rd dividing potential drop amplifying circuit 5 respectively with another input of add circuit 6 and the 3rd input v of the first multiplier 8 zconnect; The second input v of the output E of add circuit 6 and the first multiplier 8 yconnect the first input end v of the output F of subtraction circuit 7 and the first multiplier 8 xconnect the first input end v of the output of the first multiplier 8 and the second multiplier 9 aconnect the output access sawtooth waveforms comparison of the second multiplier 9 and the input of switch tube driving circuit 2, the second input v of the output of output current feedback circuit 10 and the second multiplier 9 bconnect.
Described sawtooth waveforms comparison and switch tube driving circuit 2 comprise zero passage detection, rest-set flip-flop, driving, saw-toothed wave generator, the first operational amplifier A 1; The input of zero passage detection and transformer T 1the second winding N zsame Name of Ends connect, the output of zero passage detection and the S of rest-set flip-flop end is connected, the R of rest-set flip-flop holds and the first operational amplifier A 1output connect, the Q of rest-set flip-flop end is connected with the input driving and the input of saw-toothed wave generator respectively, the output of saw-toothed wave generator and the first operational amplifier A 1positive input connect, the output of driving is output and the switching tube Q of sawtooth waveforms comparison and switch tube driving circuit 2 bgate pole connect, the output of the second multiplier 9 accesses the first operational amplifier A 1reverse input end be the input of sawtooth waveforms comparison and switch tube driving circuit 2.
The first described dividing potential drop follow circuit 3 comprises the second operational amplifier A 2, the first resistance R 1, the second resistance R 2; Wherein the first resistance R 1one end and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, the first resistance R 1the other end and the second resistance R 2one end connects, and the first resistance R 1with the second resistance R 2common port access the first operational amplifier A 2positive input, the second resistance R 2the other end be connected zero point with reference potential, the second operational amplifier A 2reverse input end be directly connected with output terminals A, form in-phase voltage follower.
The second described dividing potential drop peak sample circuit 4 comprises the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the first diode D 1, the first capacitor C 1, the 6th resistance R 6, the 3rd operational amplifier A 3; Wherein the 3rd resistance R 3one end and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, the 3rd resistance R 3the other end and the 4th resistance R 4one end connects, and the 3rd resistance R 3with the 4th resistance R 4common port access the 5th resistance R 5one end, the 4th resistance R 4the other end be connected zero point with reference potential, the 5th resistance R 5the other end and the first diode D 1after anodal series connection through the first diode D 1negative pole access the 3rd operational amplifier A 3normal phase input end, the first capacitor C 1with the 6th resistance R 6one end and the 3rd operational amplifier A after in parallel 3normal phase input end be connected, another termination reference potential zero point, the 3rd operational amplifier A 3inverting input be directly connected with output C.
The 3rd described dividing potential drop amplifying circuit 5 comprises the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, four-operational amplifier A 4; Wherein the 7th resistance R 7termination reference potential zero point, the 7th resistance R 7the other end and the 8th resistance R 8one end connect, and the 7th resistance R 7with the 8th resistance R 8common port access four-operational amplifier A 4inverting input, the 8th resistance R 8the other end and four-operational amplifier A 4output D connect, the 9th resistance R 9one end and the output voltage V of main power circuit 1 oanodal connection, the 9th resistance R 9the other end and the tenth resistance R 10one end connect, and the 9th resistance R 9with the tenth resistance R 10common port access four-operational amplifier A 4normal phase input end.
Described add circuit 6 comprises the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 5th operational amplifier A 5; Wherein the 15 resistance R 15one end is connected with the output terminals A of the first dividing potential drop follow circuit 3, other end access the 5th operational amplifier A 5positive input, the 16 resistance R 16one end is connected with the 3rd dividing potential drop amplifying circuit 5 output D, other end access the 5th operational amplifier A 5positive input, the 17 resistance R 17one end and the 5th operational amplifier A 5positive input connect, other end access reference point position zero point, the 18 resistance R 18one end access the 5th operational amplifier A 5reverse input end, other end access reference point position zero point, the 19 resistance R 19access the 5th operational amplifier A 5reverse input end and output E between, the second input v of add circuit 6 output E and the first multiplier 8 yconnect.
Described subtraction circuit 7 comprises the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 6th operational amplifier A 6; Wherein the 11 resistance R 11one end is connected with the output terminals A of the first dividing potential drop follow circuit 3, and the other end is connected to the 6th operational amplifier A 6reverse input end, the 12 resistance R 12be connected to the 6th operational amplifier A 6reverse input end and output F between, the 13 resistance R 13one end is connected to the output C of the second dividing potential drop peak sample circuit 4, the 13 resistance R 13other end access the 6th operational amplifier A 6positive input, the 14 resistance R 14one end access the 6th operational amplifier A 6positive input, the 14 resistance R 14the other end be connected zero point with reference potential, the 6th operational amplifier A 6output be the first input end v that the output F of subtraction circuit 7 accesses the first multiplier 8 x.
Described output current feedback circuit 10 comprises the second transformer T 2, the second diode D 2, the 20 resistance R 20, the 21 resistance R 21, the second capacitor C 2, the 3rd capacitor C 3, the 22 resistance R 22, the 7th operational amplifier A 7; Wherein the second transformer T 2former limit Same Name of Ends and the transformer T of main power circuit 1 1tertiary winding N sdifferent name end connect, the second transformer T 2former limit different name end be connected zero point with reference potential, the second transformer T 2secondary Same Name of Ends and the second diode D 2anodal connection, the second transformer T 2secondary different name end and the 20 resistance R 20rear and the second diode D connect 2negative pole connects, the 20 resistance R 20with the second diode D 2common port access the 21 resistance R 21one end, the 21 resistance R 21the other end and the second capacitor C 2one end connect, and the 21 resistance R 21with the second capacitor C 2common port access the 7th operational amplifier A 7inverting input, the second capacitor C 2the other end be connected zero point with reference potential, the 22 resistance R 22with the 3rd capacitor C 3access the 7th operational amplifier A after series connection 7reverse input end and output between, the positive input of the 7th operational amplifier A 7 and input voltage reference point V ogconnect the 7th operational amplifier A 7output be the second input v that the output of output current feedback circuit 10 accesses the second multiplier 9 b.
In sum, the CRM Flyback LED driver of low output current peak-to-average force ratio of the present invention, in the situation that keeping power factor PF value to meet application requirements, adopt and become ON time control and realize and in input current, only contain a certain amount of identical with first-harmonic initial phase three times, quintuple harmonics, the switching tube ON time of driver is changed according to certain rule in a power frequency period, within the scope of whole 85V~265V ac input voltage, output current peak-to-average force ratio is reduced near 1.44, reduce output current peak-to-average force ratio, simultaneously little to other performance impacts.

Claims (8)

1. a CRM Flyback LED driver for low output current peak-to-average force ratio, is characterized in that, comprises main power circuit (1) and control circuit, and described main power circuit (1) comprises input voltage source v in, electromagnetic interface filter, diode rectifier circuit RB, transformer T 1, switching tube Q b, diode D b, filter capacitor C o, filter inductance L owith load LED, wherein input voltage source v inbe connected with the input port of electromagnetic interface filter, the output port of electromagnetic interface filter is connected with the input port of diode rectifier circuit RB, and the output negative pole of diode rectifier circuit RB is reference potential zero point, the output cathode of diode rectifier circuit RB and transformer T 1the first winding N pdifferent name end connect, transformer T 1the first winding N psame Name of Ends access switching tube Q bdrain electrode, switching tube Q bsource electrode be connected zero point with reference potential, transformer T 1the second winding N zdifferent name end be connected zero point with reference potential, transformer T 1tertiary winding N ssame Name of Ends and diode D banodic bonding, diode D bnegative electrode access respectively filter capacitor C oone end and filter inductance L oone end, filter capacitor C oother end access reference potential zero point, filter inductance L othe other end be connected with the anode tap of load LED, the both end voltage of load LED is output voltage V o;
Described control circuit comprises sawtooth waveforms comparison and switch tube driving circuit (2), the first dividing potential drop follow circuit (3), the second dividing potential drop peak sample circuit (4), the 3rd dividing potential drop amplifying circuit (5), add circuit (6), subtraction circuit (7), the first multiplier (8), the second multiplier (9), output current feedback circuit (10); The wherein output of sawtooth waveforms comparison and switch tube driving circuit (2) and switching tube Q bgate pole connect; The input of the first dividing potential drop follow circuit (3) and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the output terminals A of the first dividing potential drop follow circuit (3) is connected with input of add circuit (6) and an input of subtraction circuit (7) respectively; The input of the second dividing potential drop peak sample circuit (4) and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, and the output C of the second dividing potential drop peak sample circuit (4) is connected with another input of subtraction circuit (7); The output voltage V of the input of the 3rd dividing potential drop amplifying circuit (5) and main power circuit (1) oanodal connection, the output D of the 3rd dividing potential drop amplifying circuit (5) respectively with another input of add circuit (6) and the 3rd input v of the first multiplier (8) zconnect; The second input v of the output E of add circuit (6) and the first multiplier (8) yconnect the first input end v of the output F of subtraction circuit (7) and the first multiplier (8) xconnect the first input end v of the output of the first multiplier (8) and the second multiplier (9) aconnect, the output access sawtooth waveforms comparison of the second multiplier (9) and the input of switch tube driving circuit (2), the second input v of the output of output current feedback circuit (10) and the second multiplier (9) bconnect.
2. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, it is characterized in that, described sawtooth waveforms comparison and switch tube driving circuit (2) comprise zero passage detection, rest-set flip-flop, driving, saw-toothed wave generator, the first operational amplifier A 1; The input of zero passage detection and transformer T 1the second winding N zsame Name of Ends connect, the output of zero passage detection and the S of rest-set flip-flop end is connected, the R of rest-set flip-flop holds and the first operational amplifier A 1output connect, the Q of rest-set flip-flop end is connected with the input driving and the input of saw-toothed wave generator respectively, the output of saw-toothed wave generator and the first operational amplifier A 1positive input connect, the output of driving is output and the switching tube Q of sawtooth waveforms comparison and switch tube driving circuit (2) bgate pole connect, the output of the second multiplier (9) accesses the first operational amplifier A 1reverse input end is the input of sawtooth waveforms comparison and switch tube driving circuit (2).
3. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, the first described dividing potential drop follow circuit (3) comprises the second operational amplifier A 2, the first resistance R 1, the second resistance R 2; Wherein the first resistance R 1one end and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, the first resistance R 1the other end and the second resistance R 2one end connects, and the first resistance R 1with the second resistance R 2common port access the second operational amplifier A 2positive input, the second resistance R 2the other end be connected zero point with reference potential, the first operational amplifier A 1reverse input end be directly connected with output terminals A, form in-phase voltage follower.
4. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, described the second dividing potential drop peak sample circuit (4) comprises the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the first diode D 1, the first capacitor C 1, the 6th resistance R 6, the 3rd operational amplifier A 3; Wherein the 3rd resistance R 3one end and input voltage sampled point V gthe output cathode that is diode rectifier circuit RB connects, the 3rd resistance R 3the other end and the 4th resistance R 4one end connects, and the 3rd resistance R 3with the 4th resistance R 4common port access the 5th resistance R 5one end, the 4th resistance R 4the other end be connected zero point with reference potential, the 5th resistance R 5the other end and the first diode D 1after anodal series connection through the first diode D 1negative pole access the 3rd operational amplifier A 3normal phase input end, the first capacitor C 1with the 6th resistance R 6one end and the 3rd operational amplifier A after in parallel 3normal phase input end be connected, another termination reference potential zero point, the 3rd operational amplifier A 3inverting input be directly connected with output C.
5. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, described the 3rd dividing potential drop amplifying circuit (5) comprises the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, four-operational amplifier A 4; Wherein the 7th resistance R 7termination reference potential zero point, the 7th resistance R 7the other end and the 8th resistance R 8one end connect, and the 7th resistance R 7with the 8th resistance R 8common port access four-operational amplifier A 4inverting input, the 8th resistance R 8the other end and four-operational amplifier A 4output D connect, the 9th resistance R 9one end and the output voltage V of main power circuit (1) oanodal connection, the 9th resistance R 9the other end and the tenth resistance R 10one end connect, and the 9th resistance R 9with the tenth resistance R 10common port access four-operational amplifier A 4normal phase input end.
6. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, described add circuit (6) comprises the 15 resistance R 15, the 16 resistance R 16, the 17 resistance R 17, the 18 resistance R 18, the 19 resistance R 19, the 5th operational amplifier A 5; Wherein the 15 resistance R 15one end is connected with the output terminals A of the first dividing potential drop follow circuit (3), other end access the 5th operational amplifier A 5positive input, the 16 resistance R 16one end is connected with the 3rd dividing potential drop amplifying circuit (5) output D, other end access the 5th operational amplifier A 5positive input, the 17 resistance R 17one end and the 5th operational amplifier A 5positive input connect, other end access reference point position zero point, the 18 resistance R 18one end access the 5th operational amplifier A 5reverse input end, other end access reference point position zero point, the 19 resistance R 19access the 5th operational amplifier A 5reverse input end and output E between, the second input v of add circuit (6) output E and the first multiplier (8) yconnect.
7. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, described subtraction circuit (7) comprises the 11 resistance R 11, the 12 resistance R 12, the 13 resistance R 13, the 14 resistance R 14, the 6th operational amplifier A 6; Wherein the 11 resistance R 11one end is connected with the output terminals A of the first dividing potential drop follow circuit (3), and the other end is connected to the 6th operational amplifier A 6reverse input end, the 12 resistance R 12be connected to the 6th operational amplifier A 6reverse input end and output F between, the 13 resistance R 13one end is connected to the output C of the second dividing potential drop peak sample circuit (4), the 13 resistance R 13other end access the 6th operational amplifier A 6positive input, the 14 resistance R 14one end access the 6th operational amplifier A 6positive input, the 14 resistance R 14the other end be connected zero point with reference potential, the 6th operational amplifier A 6output be the first input end v that the output F of subtraction circuit (7) accesses the first multiplier (8) x.
8. the CRM Flyback LED driver of low output current peak-to-average force ratio according to claim 1, is characterized in that, described output current feedback circuit (10) comprises the second transformer T 2, the second diode D 2, the 20 resistance R 20, the 21 resistance R 21, the second capacitor C 2, the 3rd capacitor C 3, the 22 resistance R 22, the 7th operational amplifier A 7; Wherein the second transformer T 2former limit Same Name of Ends and the transformer T of main power circuit (1) 1tertiary winding N sdifferent name end connect, the second transformer T 2former limit different name end be connected zero point with reference potential, the second transformer T 2secondary Same Name of Ends and the second diode D 2anodal connection, the second transformer T 2secondary different name end and the 20 resistance R 20rear and the second diode D connect 2negative pole connects, the 20 resistance R 20with the second diode D 2common port access the 21 resistance R 21one end, the 21 resistance R 21the other end and the second capacitor C 2one end connect, and the 21 resistance R 21with the second capacitor C 2common port access the 7th operational amplifier A 7inverting input, the second capacitor C 2the other end be connected zero point with reference potential, the 22 resistance R 22with the 3rd capacitor C 3access the 7th operational amplifier A after series connection 7reverse input end and output between, the positive input of the 7th operational amplifier A 7 and input voltage reference point V ogconnect the 7th operational amplifier A 7output be the second input v that the output of output current feedback circuit (10) accesses the second multiplier (9) b.
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CN104702108A (en) * 2015-03-20 2015-06-10 南京理工大学 Critical continuous boost converter employing constant-frequency control
CN104702131A (en) * 2015-03-20 2015-06-10 南京理工大学 CRM Buck PFC convertor with optimal frequency variation range
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CN107359788A (en) * 2017-09-07 2017-11-17 西华大学 Signal conditioning circuit and flyback, SEPIC and Buck Boost power factor correcting converters
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CN112217388A (en) * 2020-08-26 2021-01-12 南京理工大学 Output ripple-free DCM Buck PFC converter based on optimized modulation wave

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