CN112214058A - Circuit for inhibiting starting current overshoot - Google Patents
Circuit for inhibiting starting current overshoot Download PDFInfo
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- CN112214058A CN112214058A CN202011358019.5A CN202011358019A CN112214058A CN 112214058 A CN112214058 A CN 112214058A CN 202011358019 A CN202011358019 A CN 202011358019A CN 112214058 A CN112214058 A CN 112214058A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/461—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using an operational amplifier as final control device
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
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- Automation & Control Theory (AREA)
- Amplifiers (AREA)
Abstract
The application relates to a circuit for suppressing starting current overshoot, which comprises a current loop and a regulating loop, wherein the current loop comprises a first operational amplifier U1 and a diode D2; the adjusting loop comprises a first transistor Q1, a second transistor Q2 and a diode D3, wherein a first end of the first transistor Q1 is connected with an enabling signal EN, a second end of the first transistor Q1 and a second end of the second transistor Q2 are both connected with a positive power supply VCC, a third end of the first transistor Q1 and a third end of the second transistor Q2 are both connected with a negative power supply VDD, a third end of the first transistor Q1 is connected with a first end of a second transistor Q2, a cathode of the diode D3 is connected with a second end of the second transistor Q2, and an anode of the diode D3 is connected with a positive input end of the first operational amplifier U1, so that the potential of the positive input end of the first operational amplifier U1 is adjusted through the enabling signal EN. The circuit for restraining the starting current overshoot effectively restrains the starting current overshoot.
Description
Technical Field
The application relates to the technical field of lithium battery formation, in particular to a circuit for restraining starting current overshoot.
Background
In the lithium battery formation and partial capacity industry, a common bidirectional charging and discharging device carries out formation and partial capacity on a primary lithium battery, and the common bidirectional charging and discharging device has two control modes of digital control and analog control.
The digital control mode is flexible in programming, current and voltage can be controlled through a control algorithm, starting overshoot is prevented, however, the digital control requires a control chip MCU and a sampling chip ADC which are high in precision and speed, the control precision is greatly influenced by environmental interference and the performance of the ADC chip, when the constant-current charge-discharge mode CC is switched to a constant-voltage charge-discharge mode CV, the current is not controlled, meanwhile, the general switching frequency of the digital control mode cannot be too high, and therefore the size of the whole device is larger than that of the analog control mode.
The analog control mode is simple to control, the MCU and the ADC with high precision and high speed are not needed, once control parameters are fixed through an external circuit, any voltage and current can be set and output only by changing reference voltage Vref and reference current Iref, the conversion from the CC mode to the CV mode is hardware natural conversion, the current is controlled, and meanwhile, the analog control mode does not need sampling, the switching frequency can be very high, so the size of the device can be small.
The existing bidirectional charging device comprises an analog control loop and an analog control chip, wherein the analog control loop comprises a current loop and a voltage loop, the input parameter of the current loop comprises a current reference Iref, the input parameter of the voltage loop comprises a reference voltage Vref, the current loop and the voltage loop jointly output a control signal Cfb for controlling the analog control chip, only one loop of the current loop or the voltage loop is active at any moment, and the current loop or the voltage loop firstly works in a current loop mode and then works in a voltage loop mode, so that the analog control mode can be realized.
However, the process of implementing analog control by the existing analog control loop is limited by the control of the external hardware control loop, i.e. the current loop and the voltage loop, and the external hardware control loop has an output upon power-up of the system, i.e. upon power-up of the system, the existing analog control loop outputs the control signal Cfb greater than 0, thereby generating a large current overshoot.
Disclosure of Invention
The embodiment of the application provides a circuit for inhibiting starting current overshoot, so as to solve the technical problem of starting current overshoot in the related technology.
In a first aspect, a circuit for suppressing start-up current overshoot is provided, which includes:
a current loop including a first operational amplifier U1 and a diode D2, a positive input terminal of the first operational amplifier U1 is connected to the reference current Iref, the first operational amplifier U1 outputs a control signal Cfb, and an anode of the diode D2 is grounded and a cathode is connected to the control signal Cfb;
a regulation loop including a first transistor Q1, a second transistor Q2 and a diode D3, wherein a first terminal of the first transistor Q1 is connected to an enable signal EN, a second terminal of the first transistor Q1 and a second terminal of the second transistor Q2 are both connected to a forward power VCC, a third terminal of the first transistor Q1 and a third terminal of the second transistor Q2 are both connected to a negative power VDD, the third terminal of the first transistor Q1 is connected to a first terminal of the second transistor Q2, a cathode of the diode D3 is connected to a second terminal of the second transistor Q2, and an anode of the diode D3 is connected to a forward input terminal of the first operational amplifier U1, so as to regulate a potential of the forward input terminal of the first operational amplifier U1 by the enable signal EN.
In some embodiments, the regulation loop further includes a resistor R11, a resistor R12, a resistor R13, a resistor R14, and a resistor R15, the resistor R11 is disposed between the enable signal EN and a first end of the first transistor Q1, one end of the resistor R12 is connected to a positive power source VCC, the other end of the resistor R12 is connected to a first end of the first transistor Q1, the resistor R13 is disposed between a third end of the first transistor Q1 and a negative power source VDD, the resistor R14 is disposed between a third end of the first transistor Q1 and a first end of the second transistor Q2, one end of the resistor R15 is connected to a second end of the second transistor Q2, and the other end of the resistor R15 is connected to the positive power source VCC.
In some embodiments, the first transistor Q1 is a PNP transistor.
In some embodiments, the second transistor Q2 is an NPN transistor.
In some embodiments, the forward power source VCC is 5V.
In some embodiments, the negative supply VDD is-5V.
In some embodiments, the current loop further includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a capacitor C1, and a capacitor C2, where the resistor R1 is disposed between a forward input terminal of the first operational amplifier U1 and the reference current Iref, one end of the resistor R2 is connected to an inverting input terminal of the first operational amplifier U1, the other end of the resistor R2 is connected to the feedback current Ifb, the resistor R3 and the capacitor C2 are connected in series and then connected in parallel to the capacitor C1, the capacitor C1 is connected across between an output terminal and an inverting input terminal of the first operational amplifier U1, the resistor R4 and the resistor R5 are connected in series and then connected at one end to an output terminal of the first operational amplifier U1, the other end is grounded, and the control signal Cfb is connected between the resistor R4 and.
In some embodiments, the circuit for suppressing the start-up current overshoot further includes a voltage loop, the voltage loop includes a second operational amplifier U2, a resistor R6, a resistor R7, a resistor R9, a resistor R10, a capacitor C3, a capacitor C4, and a diode D1, a forward input terminal of the second operational amplifier U2 is connected to the reference voltage Vset through a resistor R9, a reverse input terminal of the second operational amplifier U2 is connected to the feedback voltage Vfb through a resistor R10, an output terminal of the second operational amplifier U2 is connected to a cathode of the diode D1 through a resistor R6, an anode of the diode D1 is connected to the control signal Cfb, the resistor R7 and the capacitor C4 are connected in series and then connected in parallel to a capacitor C3, and the capacitor C3 is connected across the reverse input terminal and the output terminal of the second operational amplifier U2.
In some embodiments, the voltage ring further includes a resistor R8 and a capacitor C5, and the resistor R8 and the capacitor C5 are connected in series and then connected in parallel with the resistor R10.
In some embodiments, the diode D3 is a diode with small reverse leakage current.
The beneficial effect that technical scheme that this application provided brought includes: the start-up current overshoot is effectively suppressed.
The embodiment of the application provides a circuit for suppressing the starting current overshoot, and due to the fact that an adjusting loop is arranged, the adjusting loop comprises a first transistor Q1, a second transistor Q2 and a diode D3, when the circuit is started, an enable signal EN is set to be 0 at a low level, the potential of a positive input end of a first operational amplifier U1 is adjusted to be-5V, further the output of the first operational amplifier U1 is enabled to be negative, a control signal Cfb is clamped to be 0 by a diode D2, namely the control signal Cfb sent to an analog control chip is 0, and the starting current overshoot is effectively suppressed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a circuit for suppressing a start-up current overshoot according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, an embodiment of the present application provides a circuit for suppressing a start-up current overshoot, which includes a current loop and a regulation loop.
The current loop comprises a first operational amplifier U1 and a diode D2, the positive input terminal of the first operational amplifier U1 is connected to the reference current Iref, the first operational amplifier U1 outputs the control signal Cfb, and the anode of the diode D2 is connected to ground and the cathode is connected to the control signal Cfb.
The adjusting loop comprises a first transistor Q1, a second transistor Q2 and a diode D3, wherein a first end of the first transistor Q1 is connected with an enable signal EN, a second end of the first transistor Q1 and a second end of the second transistor Q2 are both connected with a forward power VCC, a third end of the first transistor Q1 and a third end of the second transistor Q2 are both connected with a negative power VDD, the third end of the first transistor Q1 is connected with a first end of the second transistor Q2, a cathode of the diode D3 is connected with a second end of the second transistor Q2, and an anode of the diode D3 is connected with a forward input end of the first operational amplifier U1, so that the potential of the forward input end of the first operational amplifier U1 is adjusted through the enable signal EN.
When the positive power supply VCC is 5V and the negative power supply VDD is-5V, the working principle of the circuit for suppressing the starting current overshoot according to the embodiment of the present application is as follows:
when the circuit is started, the enable signal EN is at low level 0, at the moment, the first transistor Q1 is conducted, so that the second transistor Q2 is also conducted, the positive input end of the first operational amplifier U1 of the current loop is clamped to-5V through the diode D3, the output of the first operational amplifier U1 is negative, the control signal Cfb is clamped to 0 by the diode D2, namely the control signal Cfb sent to the analog control chip is 0, and the overshoot of the starting current is effectively inhibited;
when the circuit normally works, the enable signal EN changes from low level 0V to high level +5V, at this time, the first transistor Q1 is not conducted, the second transistor Q2 is also not conducted, so the voltage at the positive input end of the operational amplifier U1 gradually increases from-5V to the reference voltage Iset, at this time, the output of the current loop composed of the operational amplifier U1 gradually increases from-5V, due to the clamping action of the diode D2, the control signal Cfb gradually increases from 0, so the output current also increases from 0 to the set value, and in this process, since the control signal Cfb increases from 0, the current does not overshoot.
The circuit for suppressing the starting current overshoot of the embodiment of the application is provided with the adjusting loop, the adjusting loop comprises the first transistor Q1, the second transistor Q2 and the diode D3, the potential of the positive input end of the first operational amplifier U1 is adjusted to be-5V by setting the enable signal EN to be 0 at a low level when the circuit is started, further, the output of the first operational amplifier U1 is negative, the control signal Cfb is clamped to be 0 by the diode D2, namely, the control signal Cfb sent to the analog control chip is 0, and the starting current overshoot is effectively suppressed.
Furthermore, in this embodiment of the application, the regulation loop further includes a resistor R11, a resistor R12, a resistor R13, a resistor R14, and a resistor R15, the resistor R11 is disposed between the enable signal EN and the first end of the first transistor Q1, one end of the resistor R12 is connected to the positive power VCC, the other end is connected to the first end of the first transistor Q1, the resistor R13 is disposed between the third end of the first transistor Q1 and the negative power VDD, the resistor R14 is disposed between the third end of the first transistor Q1 and the first end of the second transistor Q2, one end of the resistor R15 is connected to the second end of the second transistor Q2, and the other end is connected to the positive power VCC.
As a preferred implementation manner, in the embodiment of the present application, the first transistor Q1 is a PNP transistor. The second transistor Q2 is an NPN transistor.
Because the triode is a current control type device, the triode is adopted in a circuit for restraining the starting current overshoot, the interference can be reduced, and the circuit performance is more stable.
Correspondingly, the base of the first transistor Q1 is connected to the enable signal EN, the collector of the first transistor Q1 and the collector of the second transistor Q2 are both connected to the positive power source VCC, the emitter of the first transistor Q1 and the emitter of the second transistor Q2 are both connected to the negative power source VDD, the emitter of the first transistor Q1 is connected to the base of the second transistor Q2, the cathode of the diode D3 is connected to the collector of the second transistor Q2, and the anode of the diode D3 is connected to the positive input terminal of the first operational amplifier U1, so that the potential of the positive input terminal of the first operational amplifier U1 is adjusted by the enable signal EN.
It should be noted that, in some other embodiments, the first transistor Q1 and the second transistor Q2 may also be field effect transistors or other components that can achieve similar functions, and it should be understood that the transistors are within the scope of the present application and are not described herein again.
Specifically, in the embodiment of the present application, the forward power VCC is 5V. And the negative power supply VDD is-5V.
Furthermore, in the embodiment of the present application, the current loop further includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a capacitor C1, and a capacitor C2, where the resistor R1 is disposed between the forward input terminal of the first operational amplifier U1 and the reference current Iref, one end of the resistor R2 is connected to the inverting input terminal of the first operational amplifier U1, the other end of the resistor R2 is connected to the feedback current, the resistor R3 and the capacitor C2 are connected in series and then connected in parallel to the capacitor C1, the capacitor C1 is connected across between the output terminal and the inverting input terminal of the first operational amplifier U1, the resistor R4 and the resistor R5 are connected in series and then connected with one end of the output terminal of the first operational amplifier U1 and the other end of the resistor R5, and the control signal Cfb is connected between.
Furthermore, in this embodiment of the present application, the circuit for suppressing the start-up current overshoot further includes a voltage loop, the voltage loop includes a second operational amplifier U2, a resistor R6, a resistor R7, a resistor R9, a resistor R10, a capacitor C3, a capacitor C4, and a diode D1, a forward input end of the second operational amplifier U2 is connected to the reference voltage Vset through a resistor R9, an inverting input end of the second operational amplifier U2 is connected to the feedback voltage Vfb through a resistor R10, an output end of the second operational amplifier U2 is connected to a cathode of the diode D1 through a resistor R6, an anode of the diode D1 is connected to the control signal Cfb, the resistor R7 and the capacitor C4 are connected in series and then connected in parallel to the capacitor C3, and the capacitor C3 is connected across the inverting input end and the output end of the second operational amplifier U2.
Furthermore, in the embodiment of the present application, the voltage ring further includes a resistor R8 and a capacitor C5, and the resistor R8 and the capacitor C5 are connected in series and then connected in parallel with the resistor R10.
Preferably, in the embodiment of the present application, the diode D3 is a diode with small reverse leakage current, such as a small-signal switch diode.
Since the reverse leakage current of the diode D3 is small, it is easier to adjust the potential of the forward input terminal of the first operational amplifier U1 by the enable signal EN, and further adjust the control signal Cfb to keep the control signal Cfb at 0 when the circuit is started, thereby effectively suppressing the overshoot of the start current.
In the description of the present application, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are intended to be inclusive and mean, for example, that they may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It is noted that, in the present application, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A circuit for suppressing start-up current overshoot, comprising:
a current loop including a first operational amplifier U1 and a diode D2, a positive input terminal of the first operational amplifier U1 is connected to the reference current Iref, the first operational amplifier U1 outputs a control signal Cfb, and an anode of the diode D2 is grounded and a cathode is connected to the control signal Cfb;
a regulation loop including a first transistor Q1, a second transistor Q2 and a diode D3, wherein a first terminal of the first transistor Q1 is connected to an enable signal EN, a second terminal of the first transistor Q1 and a second terminal of the second transistor Q2 are both connected to a forward power VCC, a third terminal of the first transistor Q1 and a third terminal of the second transistor Q2 are both connected to a negative power VDD, the third terminal of the first transistor Q1 is connected to a first terminal of the second transistor Q2, a cathode of the diode D3 is connected to a second terminal of the second transistor Q2, and an anode of the diode D3 is connected to a forward input terminal of the first operational amplifier U1, so as to regulate a potential of the forward input terminal of the first operational amplifier U1 by the enable signal EN.
2. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein:
the regulation loop further comprises a resistor R11, a resistor R12, a resistor R13, a resistor R14 and a resistor R15, the resistor R11 is arranged between the first ends of the enable signal EN and the first transistor Q1, one end of the resistor R12 is connected with a positive power supply VCC, the other end of the resistor R12 is connected with the first end of the first transistor Q1, the resistor R13 is arranged between the third end of the first transistor Q1 and a negative power supply VDD, the resistor R14 is arranged between the third end of the first transistor Q1 and the first end of the second transistor Q2, one end of the resistor R15 is connected with the second end of the second transistor Q2, and the other end of the resistor R15 is connected with the positive power supply VCC.
3. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein: the first transistor Q1 is a PNP transistor.
4. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein: the second transistor Q2 is an NPN transistor.
5. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein: the forward power supply VCC is 5V.
6. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein: and the negative power supply VDD is-5V.
7. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein:
the current loop further comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a capacitor C1 and a capacitor C2, the resistor R1 is arranged between a forward input end of the first operational amplifier U1 and a reference current Iref, one end of the resistor R2 is connected with an inverted input end of the first operational amplifier U1, the other end of the resistor R2 is connected with a feedback current Ifb, the resistor R3 and the capacitor C2 are connected in series and then connected in parallel with the capacitor C1, the capacitor C1 is bridged between an output end and an inverted input end of the first operational amplifier U1, the resistor R4 and the resistor R5 are connected in series and then connected with one end of the output end of the first operational amplifier U1 and the other end of the resistor R3684 is grounded, and the control signal Cfb is connected between the resistor R46.
8. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein:
the voltage loop comprises a second operational amplifier U2, a resistor R6, a resistor R7, a resistor R9, a resistor R10, a capacitor C3, a capacitor C4 and a diode D1, wherein a forward input end of the second operational amplifier U2 is connected with a reference voltage Vset through a resistor R9, a reverse input end of the second operational amplifier U2 is connected with a feedback voltage Vfb through a resistor R10, an output end of the second operational amplifier U2 is connected with a cathode of the diode D1 through a resistor R6, an anode of the diode D1 is connected with a control signal Cfb, the resistor R7 and the capacitor C4 are connected in series and then connected with the capacitor C3 in parallel, and the capacitor C3 is connected between the reverse input end and the output end of the second operational amplifier U2.
9. A circuit for suppressing start-up current overshoot as defined in claim 8, wherein:
the voltage ring further comprises a resistor R8 and a capacitor C5, and the resistor R8 and the capacitor C5 are connected in series and then are connected with the resistor R10 in parallel.
10. A circuit for suppressing start-up current overshoot as defined in claim 1, wherein:
the diode D3 is a diode with a small reverse leakage current.
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| CN202011358019.5A CN112214058B (en) | 2020-11-27 | 2020-11-27 | Circuit for inhibiting starting current overshoot |
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| CN202011358019.5A CN112214058B (en) | 2020-11-27 | 2020-11-27 | Circuit for inhibiting starting current overshoot |
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| CN202840489U (en) * | 2012-09-05 | 2013-03-27 | 成都科方电源技术有限公司 | Output short-circuit protection and output overload protection apparatus for inverter |
| CN203151079U (en) * | 2012-12-10 | 2013-08-21 | 江苏嘉钰新能源技术有限公司 | Double-current loop protective circuit of limited current and excess current |
| CN109088396A (en) * | 2018-08-29 | 2018-12-25 | 广州金升阳科技有限公司 | A kind of current foldback circuit and the Switching Power Supply comprising the circuit |
| CN110545031A (en) * | 2019-07-26 | 2019-12-06 | 上海空间电源研究所 | Laser load distributor current-limiting control circuit for space |
| CN210225247U (en) * | 2019-07-31 | 2020-03-31 | 北京大豪科技股份有限公司 | Soft start circuit and power switch |
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