Summary of the invention
Technical problem to be solved by this invention is to overcome deficiency of the prior art, and a kind of effective startup overshoot current suppression circuit is provided.
In order to solve the problems of the technologies described above, the present invention is achieved through the following technical solutions: start overshoot current suppression circuit, comprise overshoot current bypass circuit, constant current or constant-voltage control circuit and load current-limiting circuit, it is characterized in that:
Described overshoot current bypass circuit comprises capacitance C1, transistor Q1, discharge diode D1 and/or discharge resistance R6; Described capacitance C1 only crosses step current at the start transient flow, discharge by discharge diode D1 and/or discharge resistance R6 during shutdown, thereby realization suppresses the function of output overshoot current;
Described constant current or constant-voltage control circuit comprise sampling resistor Rs, integrating capacitor C2 and suppress resistance R 2 that described sampling resistor Rs is connected in the load current ring; , because suppressing to produce a step voltage VR2 on the resistance R 2, step current and reduces rapidly in start moment; When step voltage VR2 is reduced to reference voltage when following, electric current loop begins operate as normal, and the overshoot current bypass circuit is owing to the effect of capacitance C1 is turn-offed;
Described load current-limiting circuit comprises transistor Q2, capacitor C 4, resistance R 4 and voltage-stabiliser tube Z2; Because the effect of capacitor C 4 and resistance R 4 makes the voltage that is added on the Q2 slowly rise, and makes its conducting through the cut-in voltage that just reaches Q2 after one period blink, thereby makes load LED normally luminous.
Described constant current or constant-voltage control circuit can be realized by integrated regulator Z1, in start moment because step current is suppressing to produce on the resistance R 2 a step voltage VR2, make the R pin voltage of integrated regulator integrated regulator Z1 in blink, be higher than the reference voltage of integrated regulator Z1 inside, and reduce rapidly; When VR2 is reduced to reference voltage when following, electric current loop begins operate as normal, and the overshoot current bypass circuit is owing to the effect of capacitance C1 is turn-offed.
Described constant current or constant-voltage control circuit can be realized by operational amplifier U1 and direct current biasing source S1, in start moment because step current is suppressing to produce on the resistance R 2 a step voltage VR2, make the backward end voltage of operational amplifier U1 in blink, be higher than the dc offset voltage of end in the same way, and reduce rapidly; When backward end voltage is reduced to bias voltage when following, electric current loop begins operate as normal, and the overshoot current bypass circuit is owing to the effect of capacitance C1 is turn-offed.
The another kind of technical scheme that the present invention solves the starting current overshooting problem is: start overshoot current suppression circuit, comprise overshoot current bypass circuit, constant current or constant-voltage control circuit and load current-limiting circuit, it is characterized in that:
Described overshoot current bypass circuit comprises capacitance C1, transistor Q1, discharge diode D1 and/or discharge resistance R6; Described capacitance C1 only crosses step current at the start transient flow, discharge by discharge diode D1 and/or discharge resistance R6 during shutdown, thereby realization suppresses the function of output overshoot current;
Described constant current or constant-voltage control circuit comprise sampling resistor Rs, integrating capacitor C2 and suppress resistance R 2 that described sampling resistor Rs is connected in the load current ring; The step current of being introduced by the Vcc pin of chip in the moment of starting shooting makes transistor Q1 open-minded, with the of short duration closely current potential that is pulled low to of voltage that suppresses on the resistance R 2, and then increase to reference voltage rapidly, make current loop begin operate as normal, and the overshoot current bypass circuit turn-off owing to the effect of capacitance C1;
Described load current-limiting circuit comprises transistor Q2, capacitor C 4, resistance R 4 and voltage-stabiliser tube Z2; Because the effect of capacitor C 4 and resistance R 4 makes the voltage that is added on the Q2 slowly rise, and makes its conducting through the cut-in voltage that just reaches Q2 after one period blink, thereby makes load LED normally luminous.
Described constant current or constant-voltage control circuit can be realized by integrated regulator Z1, the step current of being introduced by the Vcc pin of chip in the moment of starting shooting makes transistor Q1 open-minded, with the of short duration closely current potential that is pulled low to of the voltage on the R pin of integrated regulator Z1, and then increase to reference voltage rapidly, make current loop begin operate as normal, and the overshoot current bypass circuit is owing to the effect of capacitance C1 is turn-offed.
Described constant current or constant-voltage control circuit can be realized by operational amplifier U1 and direct current biasing source S1.
Overshoot current bypass circuit of the present invention only utilizes step current to act on the constant current or the constant-voltage control circuit of back in the moment of starting shooting, and makes the of short duration change of its reference voltage, thereby realizes suppressing the function of output overshoot current.Described transistor Q1 can be that triode also can be MOSFET.
Compared with prior art, the invention has the beneficial effects as follows:
1, used components and parts are few, and are simple in structure, with low cost;
2, the inhibition overshoot current is effective, can effectively eliminate the little bright and scintillation of opening moment;
3, be suitable for topology extensively, be not only applicable to non-isolation type topologys such as BOOST circuit, also be applicable to isolated form topologys such as circuit of reversed excitation.
4, can be applicable in the converter topology circuit of all kinds of constant currents or constant voltage output.
According to first kind of technical scheme of the present invention, the execution mode of a typical overshoot current bypass circuit is: the collector electrode of the termination transistor Q1 of described capacitance C1 (or drain electrode), the base stage (or grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter (or source electrode) that meets transistor Q1 directly or connect the R pin of integrated regulator Z1 behind the pull-up resistor R1 that connects, the collector electrode of transistor Q1 (or drain electrode) is directly or connect the Vcc pin of chip behind the pull-up resistor R0 that connects.
According to first kind of technical scheme of the present invention, the execution mode of another typical overshoot current bypass circuit is: the collector electrode (drain electrode) of the termination transistor Q1 of described capacitance C1, the base stage (or grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of R1, the emitter of transistor Q1 (or source electrode) directly or connect the R pin of integrated regulator Z1 behind the pull-up resistor R1 that connects connects the Vcc pin of chip behind the direct or pull-up resistor R0 that connects of the collector electrode of transistor Q1 (drain electrode).
According to first kind of technical scheme of the present invention, the execution mode of the third typical overshoot current bypass circuit is: the collector electrode of the termination transistor Q1 of described capacitance C1 (or drain electrode), the base stage (grid) of another termination transistor Q1, the end of the negative electrode of discharge diode D1 and discharge resistance R6, the other end ground connection of the anode of discharge diode D1 and discharge resistance R6, the emitter of transistor Q1 (source electrode) directly or connect the R pin of integrated regulator Z1 behind the pull-up resistor R1 that connects, the collector electrode of transistor Q1 (or drain electrode) is directly or connect the Vcc pin of chip behind the pull-up resistor R0 that connects.
According to first kind of technical scheme of the present invention, the execution mode of a kind of typical constant current or constant-voltage control circuit is: the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
According to first kind of technical scheme of the present invention, the execution mode of another kind of typical constant current or constant-voltage control circuit is: the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, an end that suppresses another termination sampling resistor Rs of resistance R 2, the source electrode (emitter) of the emitter of transistor Q1 (source electrode) and transistor Q2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
According to second kind of technical scheme of the present invention, the execution mode of a typical overshoot current bypass circuit is: the Vcc pin of the termination control chip of described capacitance C1, the base stage (or grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter of transistor Q1 (or source electrode) ground connection, the collector electrode of transistor Q1 (or drain electrode) connects the R pin of integrated regulator Z1.
According to second kind of technical scheme of the present invention, the execution mode of another typical overshoot current bypass circuit is: the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of discharge resistance R6, the emitter of transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
According to second kind of technical scheme of the present invention, the execution mode of the third typical overshoot current bypass circuit is: the end of the termination pull-up resistor R0 of described capacitance C1, the base stage (or grid) of another termination transistor Q1, the negative electrode of discharge diode D1 and the end of discharge resistance R6, the Vcc pin of another chip termination of pull-up resistor R0, the emitter of the other end of the anode of discharge diode D1, discharge resistance R6 and transistor Q1 (or source electrode) ground connection, the collector electrode of transistor Q1 (or drain electrode) connects the R pin of integrated regulator Z1.
According to second kind of technical scheme of the present invention, the execution mode of a kind of typical constant current or constant-voltage control circuit is: the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (or emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
According to second kind of technical scheme of the present invention, the execution mode of another kind of typical constant current or constant-voltage control circuit is: the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, an end that suppresses another termination sampling resistor Rs of resistance R 2, the source electrode (emitter) of the collector electrode of transistor Q1 (drain electrode) and transistor Q2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
According to the present invention, the execution mode of described load current-limiting circuit is: the drain electrode of transistor Q2 (or collector electrode) links to each other with the negative terminal of load LED, the source electrode of transistor Q2 (or emitter) links to each other with the end of sampling resistor Rs, an end of capacitor C 4 and the positive pole of voltage-stabiliser tube Z2, the grid of transistor Q2 (or base stage) links to each other with the other end and the negative pole of a voltage-stabiliser tube Z2 and end of resistance R 4 of capacitor C 4, and the other end of resistance R 4 links to each other with the Vcc pin of control chip.
Embodiment
With reference to accompanying drawing 2, be a kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination TL431, the collector electrode of transistor Q1 (drain electrode) connects the Vcc pin of chip.
In the present embodiment, the K pin of described integrated regulator TL431 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination TL431 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination TL431 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
In the present embodiment, the drain electrode of described transistor Q2 (collector electrode) links to each other with the negative terminal of load LED, the source electrode of transistor Q2 (emitter) links to each other with the end of sampling resistor Rs, an end of capacitor C 4 and the positive pole of voltage-stabiliser tube Z2, the grid of transistor Q2 (base stage) links to each other with the other end and the negative pole of a voltage-stabiliser tube Z2 and end of resistance R 4 of capacitor C 4, and the other end of resistance R 4 links to each other with the Vcc pin of control chip.
With reference to accompanying drawing 3, be second kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of R1, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination TL431, the collector electrode of transistor Q1 (drain electrode) connects the Vcc pin of chip.
In the present embodiment, the K pin of described integrated regulator TL431 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination TL431 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination TL431 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 4, for of the present invention the third starts overshoot current suppression circuit.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1, the negative electrode of discharge diode D1 and the end of discharge resistance R6, the other end ground connection of the anode of discharge diode D1 and discharge resistance R6, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination TL431, the collector electrode of transistor Q1 (drain electrode) connects an end that draws resistance R 0, the Vcc pin of another chip termination of pull-up resistor R0.
In the present embodiment, output termination control chip and the switching tube of described operational amplifier U1, the end of integrating capacitor C2 and an end of resistance R 5, one end of another termination capacitor C 3 of one end of resistance R 5, the output of another termination operational amplifier U1 of capacitor C 3, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, an end that suppresses another termination sampling resistor Rs of resistance R 2, the source electrode (emitter) of the emitter of transistor Q1 (source electrode) and transistor Q2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 5, be the 4th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination integrated regulator Z1, the collector electrode of transistor Q1 (drain electrode) connects the Vcc pin of chip.
In the present embodiment, the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, the end, the emitter (source electrode) of transistor Q1 and the source electrode (emitter) of transistor Q2 that suppress another termination sampling resistor Rs of resistance R 2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 6, be the 5th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of R1, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination integrated regulator Z1, the collector electrode of transistor Q1 (drain electrode) connects the Vcc pin of chip.
In the present embodiment, the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, the end, the emitter (source electrode) of transistor Q1 and the source electrode (emitter) of transistor Q2 that suppress another termination sampling resistor Rs of resistance R 2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 7, be the 6th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1, the negative electrode of discharge diode D1 and the end of discharge resistance R6, the other end ground connection of the anode of discharge diode D1 and discharge resistance R6, the emitter (source electrode) of the termination transistor Q1 of pull-up resistor R1, the R pin of another termination TL431, the collector electrode of transistor Q1 (drain electrode) connects an end that draws resistance R 0, the Vcc pin of another chip termination of pull-up resistor R0.
In the present embodiment, the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, the end, the emitter (source electrode) of transistor Q1 and the source electrode (emitter) of transistor Q2 that suppress another termination sampling resistor Rs of resistance R 2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 8, be the 7th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter of transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 9, be the 8th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of discharge resistance R6, the emitter of transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 10, be the 9th kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the end of the termination pull-up resistor R0 of described capacitance C1, the base stage (grid) of another termination transistor Q1, the negative electrode of discharge diode D1 and the end of discharge resistance R6, the Vcc pin of another chip termination of pull-up resistor R0, the emitter of the other end of the anode of discharge diode D1, discharge resistance R6 and transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 11, be the of the present invention ten kind of startup overshoot current suppression circuit.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the negative electrode of discharge diode D1, the plus earth of discharge diode D1, the emitter of transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 12, be the 11 kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the Vcc pin of the termination control chip of described capacitance C1, the base stage (grid) of another termination transistor Q1 and the end of discharge resistance R6, the other end ground connection of discharge resistance R6, the emitter of transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the K pin of described integrated regulator Z1 connects the end of control chip and switching tube and integrating capacitor C2, one end of the R pin of another termination integrated regulator Z1 of integrating capacitor C2 and inhibition resistance R 2, the end and the source electrode (emitter) of transistor Q2, the A pin of another termination integrated regulator Z1 of sampling resistor Rs and the ground that suppress another termination sampling resistor Rs of resistance R 2.
Other structures of present embodiment and aforesaid first embodiment are similar.
With reference to accompanying drawing 13, be the 12 kind of startup overshoot current suppression circuit of the present invention.
In the present embodiment, the end of the termination pull-up resistor R0 of described capacitance C1, the base stage (grid) of another termination transistor Q1, the negative electrode of discharge diode D1 and the end of discharge resistance R6, the Vcc pin of another chip termination of pull-up resistor R0, the emitter of the other end of the anode of discharge diode D1, discharge resistance R6 and transistor Q1 (source electrode) ground connection, the collector electrode of transistor Q1 (drain electrode) connects the R pin of integrated regulator Z1.
In the present embodiment, the end of the output termination control chip of described operational amplifier U1 and switching tube and integrating capacitor C2, one end of the backward end of another termination operational amplifier U1 of integrating capacitor C2 and inhibition resistance R 2, the end, the collector electrode (drain electrode) of transistor Q1 and the source electrode (emitter) of transistor Q2 that suppress another termination sampling resistor Rs of resistance R 2, the other end ground connection of sampling resistor Rs, the positive pole of direct current biasing source S1 connects the end in the same way of operational amplifier U1, minus earth.
Other structures of present embodiment and aforesaid first embodiment are similar.
At last, it is also to be noted that what more than enumerate only is specific embodiments of the invention.Obviously, the invention is not restricted to above embodiment, many distortion can also be arranged.All distortion that those of ordinary skill in the art can directly derive or associate from content disclosed by the invention all should be thought protection scope of the present invention.
What should be understood that is: the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, and any innovation and creation that do not exceed in the connotation scope of the present invention all fall within protection scope of the present invention.