CN112202431A

CN112202431A - Driving and control device for driving and controlling power semiconductor switch

Info

Publication number: CN112202431A
Application number: CN202010644651.XA
Authority: CN
Inventors: 莱茵哈德·赫策; 巴斯蒂安·福格勒
Original assignee: Semikron Electronics Co ltd
Current assignee: Semikron Electronics Co ltd; Semikron Elektronik GmbH and Co KG
Priority date: 2019-07-08
Filing date: 2020-07-07
Publication date: 2021-01-08
Also published as: DE102019118420A1

Abstract

A control device for controlling a power semiconductor switch, having: a control circuit having a drive circuit and a control circuit that are monolithically integrated; an output drive terminal which is electrically conductively connected to the drive circuit, the drive device having precisely this one output drive terminal for driving the power semiconductor switch, the drive circuit being used to generate a drive voltage for switching the power semiconductor switch on and off at the output drive terminal, which has a second voltage value for switching the power semiconductor switch on and a first voltage value which is lower than this for switching the power semiconductor switch off, when the output drive terminal is electrically conductively connected to the control terminal of the power semiconductor switch via a current path, the control circuit, upon receiving a switch-off command, drives the drive circuit such that it reduces the drive voltage from the second voltage value to the first voltage value, wherein the control circuit drives the drive circuit such that the duration until the drive voltage has reduced to the first voltage value depends on the at least one operating state signal.

Description

Driving and control device for driving and controlling power semiconductor switch

Technical Field

The invention relates to a drive control device for driving a power semiconductor switch.

Background

DE 102010018997 a1 discloses a control device for controlling a power semiconductor switch, which has a monolithically integrated control circuit for controlling the power semiconductor switch. It is disadvantageous here that, in the event of a desire to open the power semiconductor switches, the time profile of the opening process of the power semiconductor switches cannot be influenced or controlled by the actuation device and always takes place consistently.

The control device 1' shown in fig. 1 for controlling a power semiconductor switch T, having a control circuit 2 that is monolithically formed in a chip 3, is known as an internal prior art. The chip 3 is arranged in the IC case 4. The drive control circuit 2 has three drive circuits TR1, TR2, and TR3 for driving the power semiconductor switch T, and a control circuit ST that drives the three drive circuits TR1, TR2, and TR 3. The three driver circuits TR1, TR2 and TR3 are each electrically conductively connected to their associated output control terminals AS1, AS2, AS3 for controlling the conduction of the power semiconductor switches T. The three output control terminals AS1, AS2, AS3 are electrically conductively connected to the control terminal G of the power semiconductor switch T via the respectively associated current path SP1, SP2, SP 3. Each current path SP1, SP2 or SP3 has an electrically controlled terminal series resistance RV1, RV2 or RV3 electrically connected into each current path SP1, SP2 or SP 3. The driver circuit TR1 is designed to generate a control voltage Ua1 at the output control terminal AS1, said control voltage Ua having a second voltage value for switching on the power semiconductor switch T. The driver circuit TR2 or TR3 is respectively designed to generate a drive control voltage Ua2 or Ua3 with a uniform first voltage value, which is lower than the second voltage value, at the output drive control terminal AS2 or AS3 for switching off the power semiconductor switch T.

The control device 1' also has a switching signal input terminal SE, which is electrically conductively connected to the control circuit ST, for receiving a switch-on command EB for switching on the power semiconductor switch T and for receiving a switch-off command AB for switching off the power semiconductor switch T. Furthermore, the control device 1' has at least one operating state input terminal BS, which is electrically conductively connected to the control circuit ST, for receiving at least one operating state signal, for example a power semiconductor switch load voltage Uce, which is applied between the load current terminals C and E of the power semiconductor switch T, an intermediate circuit voltage Udc of a converter half bridge, in which the power semiconductor switch T (not shown in fig. 1) is electrically connected, a load current I flowing through the power semiconductor switch T and/or a temperature TS of the power semiconductor switch T. When the output control terminals AS2 and AS3 are conductively connected to the control terminal G of the power semiconductor switch T via the current paths SP2 and SP3, the control circuit ST is configured for controlling the drive circuits TR1, TR2 and TR3 upon receipt of the switch-off command AB, such that the control voltage Ua1 is no longer generated from the drive circuit TR1, and, depending on the at least one operating state signal Uce, Udc, I, TS ground, either the control voltage Ua2 is generated by the drive circuit TR2 or the control voltage Ua3 is generated by the drive circuit TR 3. The resistance value of the control terminal series resistance Rv3 is greater than the resistance value of the control terminal series resistance Rv2, so that, for example, when the current I flowing through the power semiconductor switch T exceeds a boundary value, the drive control voltage Ua3 is generated by the drive circuit TR3, so that the power semiconductor switch T is turned off slowly, in order to reduce the voltage peaks occurring in the power semiconductor switch load voltage Uce due to the parasitic inductance of the electrical line when the power semiconductor switch T is turned off, and thus to reduce the voltage load of the power semiconductor switch T. When the current I flowing through the power semiconductor switch T does not exceed a limit value, a drive control voltage Ua2 is generated by the drive circuit TR2, so that the power semiconductor switch T is switched off quickly, in order to minimize the switching losses occurring when the power semiconductor switch T is switched off. This enables the power semiconductor switch T to be switched off in an optimized manner as a function of the at least one operating state signal. The time profile of the switching-off process of the power semiconductor switch T can thus be influenced or controlled by the control device 1'. The disadvantage here is that the actuation device 1' requires three output actuation terminals AS1, AS2, AS3 for actuating the power semiconductor switch T, which requires a relatively large IC housing 4 from which the three pins forming the output actuation terminals AS1, AS2, AS3 project. Furthermore, three control terminal series resistances Rv1, Rv2, Rv3 are required for the implementation of the power semiconductor switching device 6', which places high demands on the space of the power semiconductor switching device 6' with the control device 1', the three control terminal series resistances Rv1, Rv2, Rv3 and the power semiconductor switch T.

Disclosure of Invention

The object of the present invention is to provide a space-saving control device for controlling a power semiconductor switch, by means of which the duration of the switching-off process of the power semiconductor switch can be controlled.

This object is achieved by a control device for controlling a power semiconductor switch, having: a drive control circuit having a drive circuit of a monolithically integrated construction and a control circuit of a monolithically integrated construction, the control circuit driving the drive circuit; an output drive terminal for driving the power semiconductor switch, which is electrically conductively connected to the drive circuit, wherein the output drive terminal is provided for electrically conductive connection to a control terminal of the power semiconductor switch via a current path, wherein the drive device has precisely this one output drive terminal for driving the power semiconductor switch, wherein the drive circuit is designed to generate a drive voltage for switching the power semiconductor switch on and off at the output drive terminal, wherein the drive voltage has a second voltage value for switching the power semiconductor switch on and a first voltage value, which is lower relative to the second voltage value, for switching the power semiconductor switch off; a switching signal input terminal which is conductively connected to the control circuit for receiving an on-command for switching on the power semiconductor switch and for receiving an off-command for switching off the power semiconductor switch; and at least one operating state input terminal which is connected in an electrically conductive manner to the control circuit for receiving the at least one operating state signal, wherein, when the output control terminal is connected in an electrically conductive manner to the control terminal of the power semiconductor switch via the current path, the control circuit is designed to control the drive circuit upon receiving a switch-off command, such that the drive circuit reduces the control voltage from the second voltage value to the first voltage value, wherein the control circuit controls the drive circuit such that the duration until the control voltage is reduced to the first voltage value depends on the at least one operating state signal.

It has proven advantageous if, in order to reduce the drive voltage from the second voltage value to the first voltage value, the drive circuit has a first voltage source, a first and a second semiconductor switch, and an off-resistance, wherein the first voltage source is electrically conductively connected to a first load connection of the first semiconductor switch and a second load connection of the first semiconductor switch is electrically conductively connected to the output drive connection via the off-resistance, wherein the second semiconductor switch is electrically connected in parallel to the off-resistance, wherein the control circuit is designed to switch the second semiconductor switch on or off in dependence on at least one operating state signal during the switching off of the power semiconductor switch. Thereby, a reliable reduction of the drive control voltage from the second voltage value to the first voltage value is enabled by the drive circuit.

It has furthermore proven to be advantageous if, in order to reduce the control voltage from the second voltage value to the first voltage value, the drive circuit has a first and a second current source which are electrically parallel to one another and are electrically conductively connected to the output control terminal, wherein the control circuit is designed to switch the first and/or the second current source on or off during the switching-off operation of the power semiconductor switch as a function of the at least one operating state signal. Thereby, a reliable reduction of the drive control voltage from the second voltage value to the first voltage value is enabled by the drive circuit.

In this respect it has proven advantageous if the first current source is designed to generate a higher current than the second current source. In this way, very different durations of time until the actuation voltage has decreased to the first voltage value can be achieved in a simple manner.

It has furthermore proven advantageous if, in order to reduce the drive control voltage from the second voltage value to the first voltage value, the drive circuit has a first voltage source and a first and a second MOSFET, wherein a first load current terminal of the first and second MOSFET is electrically conductively connected to the first voltage source and a second load current terminal of the first and second MOSFET is electrically conductively connected to the output drive control terminal, wherein the control circuit is designed to switch the first and/or second MOSFET on or off during the switching-off operation of the power semiconductor switch in dependence on at least one operating state signal. This provides a driver circuit whose monolithically integrated design can be realized particularly simply and reliably.

It has proven advantageous in this respect that the transconductance of the second MOSFET is smaller than the transconductance of the first MOSFET. Therefore, the current capacity of the second MOSFET for charge reversal of the input capacitance of the power semiconductor switch is lower than the current capacity of the first MOSFET for charge reversal of the input capacitance of the power semiconductor switch, with the same drive and control voltage. This can be achieved, for example, by making the transistor width of the second MOSFET shorter than the transistor width of the first MOSFET. In this way, very different durations until the actuation voltage has decreased to the first voltage value can be achieved in a simple manner.

It has furthermore proven advantageous if the control circuit is designed to control the drive circuit upon receipt of a switch-on command, when the output control terminal is connected in an electrically conductive manner to the control terminal of the power semiconductor switch via the current path, such that the drive circuit increases the control voltage from a first voltage value to a second voltage value, wherein the control circuit controls the drive circuit such that the duration until the control voltage increases to the second voltage value is dependent on the at least one operating state signal. In addition, the duration of the switching-on process of the power semiconductor switches and thus the switching-on speed of the power semiconductor switches can thereby be adapted to the current operating state in a targeted manner.

It has furthermore proven advantageous if, in order to increase the drive voltage from the first voltage value to the second voltage value, the drive circuit has a second voltage source, a third and a fourth semiconductor switch, and an on-resistance, wherein the second voltage source is electrically conductively connected to a first load terminal of the third semiconductor switch, and a second load terminal of the third semiconductor switch is electrically conductively connected to the output drive terminal via the on-resistance, wherein the fourth semiconductor switch is electrically connected in parallel to the on-resistance, wherein the control circuit is designed to switch the fourth semiconductor switch on or off during the switching-on operation of the power semiconductor switch in dependence on at least one operating state signal. Thereby, a reliable increase of the drive control voltage from the first voltage value to the first voltage value is enabled by the drive circuit.

It has furthermore proven to be advantageous if, in order to increase the control voltage from the first voltage value to the second voltage value, the drive circuit has a third and a fourth current source which are electrically connected in parallel with one another and are electrically conductively connected to the output control terminal, wherein the control circuit is designed to switch the third and/or the fourth current source on or off during the switching-on operation of the power semiconductor switch as a function of the at least one operating state signal. Thereby, a reliable increase of the drive control voltage from the first voltage value to the first voltage value is enabled by the drive circuit.

In this respect, it has proven advantageous if the third current source is designed to generate a higher current than the fourth current source. In this way, very different durations of time until the actuation voltage has increased to the second voltage value can be achieved in a simple manner.

It has furthermore proven advantageous if, in order to increase the drive voltage from the first voltage value to the second voltage value, the drive circuit has a second voltage source and third and fourth MOSFETs, wherein first load current terminals of the third and fourth MOSFETs are electrically conductively connected to the second voltage source and second load current terminals of the third and fourth MOSFETs are electrically conductively connected to the output drive terminal, wherein the control circuit is designed to switch the third and/or fourth MOSFETs on or off in dependence on at least one operating state signal during the switching-on operation of the power semiconductor switch. This provides a driver circuit whose monolithically integrated design can be realized particularly simply and reliably.

It has proven advantageous in this respect that the transconductance of the fourth MOSFET is smaller than the transconductance of the third MOSFET. Therefore, the current capacity of the fourth MOSFET for charge reversal of the input capacitance of the power semiconductor switch is lower than the current capacity of the third MOSFET for charge reversal of the input capacitance of the power semiconductor switch, with the same drive control voltage. This can be achieved, for example, by making the transistor width of the fourth MOSFET shorter than the transistor width of the third MOSFET. In this way, very different durations until the actuation voltage has decreased to the first voltage value can be achieved in a simple manner.

It has furthermore proven advantageous if the control circuit and the driver circuit are monolithically integrated in a common chip. In this way, a particularly space-saving control device for controlling a power semiconductor switch is provided.

It has furthermore proven advantageous if the control circuit and the driver circuit are arranged in a common IC housing, and the output driver terminal, the at least one operating state input terminal and the switching signal input terminal are in the form of electrically conductive pins or bumps protruding from the IC housing. In this way, a particularly space-saving control device for controlling a power semiconductor switch is provided.

In addition, a power semiconductor switching device having a control device according to the invention, a current path and a power semiconductor switch has proven to be advantageous, wherein precisely one output control terminal of the control device for controlling the power semiconductor switch is electrically conductively connected to a control terminal of the power semiconductor switch via the current path. In this way, a particularly space-saving power semiconductor switching device is provided, which has a drive device for driving the power semiconductor switch, by means of which the duration of the switching-off process of the power semiconductor switch can be controlled.

Drawings

Embodiments of the present invention are explained below with reference to the following drawings. Wherein:

fig. 1 shows a known power semiconductor switching device as described above, having a known control device, three electrical control terminal series resistances and a power semiconductor switch, wherein the control device is electrically conductively connected to the control terminals of the power semiconductor switch via the three control terminal series resistances;

fig. 2 shows a power semiconductor switching device having a control device configuration according to the invention, an electrical control terminal series resistance and a power semiconductor switch, wherein the control device is electrically conductively connected to the control terminal of the power semiconductor switch via the control terminal series resistance;

fig. 3 shows a power semiconductor switching device having a further configuration variant of the control device according to the invention, an electrical control terminal series resistance and a power semiconductor switch, wherein the control device is connected in an electrically conductive manner to the control terminal of the power semiconductor switch via the control terminal series resistance;

fig. 4 shows a power semiconductor switching device having a further configuration variant of the control device according to the invention, an electrical control terminal series resistance and a power semiconductor switch, wherein the control device is connected in an electrically conductive manner to the control terminal of the power semiconductor switch via the control terminal series resistance; and is

Fig. 5 shows two time curves of the control voltage during the switching off of the power semiconductor switch.

Detailed Description

Fig. 2 to 4 show a power semiconductor switching device 6, which has a control device 1 according to the invention, an electrical control terminal series resistor Rv and a power semiconductor switch T. The power Semiconductor switches T are preferably in the form of transistors, for example IGBTs (Insulated Gate Bipolar transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect transistors). Within the scope of this embodiment, the power semiconductor switch T is in the form of an IGBT, wherein the first load current terminal C of the power semiconductor switch T is in the form of a collector terminal of the IGBT, and the second load current terminal E of the power semiconductor switch T is in the form of an emitter terminal of the IGBT, and the control terminal G of the power semiconductor switch T is in the form of a gate terminal of the IGBT.

The control device 1 is used for controlling the power semiconductor switches T and has a control circuit 2 with a drive circuit TR of monolithically integrated design and a control circuit ST of monolithically integrated design, which controls the drive circuit TR. The control circuit ST and the driver circuit TR are preferably monolithically formed in a common chip 3.

The control device 1 further has an output control terminal AS, which is conductively connected to the drive circuit TR for controlling the power semiconductor switch T, wherein the output control terminal AS is provided for conductive connection to a control terminal G of the power semiconductor switch T via a current path SP. The control device 1 has precisely this one output control terminal AS for controlling the power semiconductor switch T. In contrast to the known actuation device 1' according to fig. 1, the actuation device 1 according to the invention therefore has no further output actuation terminal for actuating the power semiconductor switch T, which is provided for electrically conductive connection to the control terminal G of the power semiconductor switch T via a further current path, in addition to the output actuation terminal AS. The current path SP preferably has a control terminal series resistance Rv which is electrically connected between the output drive control terminal AS and the control terminal G of the power semiconductor switch T. The current path SP may also be present only in the form of an electrical line which connects the output drive terminal AS with the control terminal G of the power semiconductor switch T in a directly electrically conductive manner.

The drive circuit TR is designed to generate a drive voltage Ua for switching the power semiconductor switch T on and off at the output drive terminal AS, wherein, AS shown by way of example in fig. 5, the drive voltage Ua has a second voltage value Uv2, here 15V, for switching the power semiconductor switch T on and a first voltage value Uv1, here-8V, for switching the power semiconductor switch T off, which is lower with respect to the second voltage value Uv 2.

The control device 1 also has a switching signal input connection SE, which is electrically conductively connected to the control circuit ST for receiving an on command EB for switching the power semiconductor switch T on and for receiving an off command AB for switching the power semiconductor switch T off. The switch-on instruction EB may be present, for example, in the form of a logic "1", while the switch-off instruction AB may be present, for example, in the form of a logic "0".

The control device 1 also has at least one operating state input terminal BS, which is electrically conductively connected to the control circuit ST, for receiving at least one operating state signal Uce, Udc, I, TS, such as a power semiconductor switch load voltage Uce, which is applied between the first and second load current terminals C and E of the power semiconductor switch T, an intermediate circuit voltage Udc of a converter half-bridge, in which the power semiconductor switch T (not shown in the figures) is electrically connected, a load current I flowing through the power semiconductor switch T and/or a temperature TS of the power semiconductor switch T. In the exemplary embodiment, control device 1 receives four operating state signals Uce, Udc, I, TS, each of which is assigned an operating state input terminal BS. Furthermore, for potential connection of the drive control circuit 2, the drive control device 1 also has a ground terminal MS which is electrically conductively connected to the drive control circuit 2. The ground terminal MS is provided for electrically conductive connection with a second load current terminal E of the power semiconductor switch T. The operating state signals Udc, I and TS are generated by corresponding sensors which are not shown in the figure for the sake of clarity.

Preferably, the control circuit ST and the driver circuit TR are arranged in a common IC housing 4, and the output control terminal AS, the at least one operating state input terminal BS and the switching signal input terminal SE are preferably present in the form of electrically conductive pins or bumps projecting from the IC housing 4. Furthermore, the ground terminal MS is also preferably in the form of a conductive pin or bump protruding from the IC housing 4.

The control circuit ST is designed, when the output control terminal AS is electrically conductively connected to the control terminal G of the power semiconductor switch T via the current path SP, to control the drive circuit TR upon receipt of a switch-off command AB in such a way that it reduces the control voltage Ua from the second voltage value Uv2 to the first voltage value Uv1, wherein the control circuit ST controls the drive circuit TR with the control signal S in such a way that the duration until the control voltage Ua is reduced to the first voltage value Uv1 depends on the at least one operating state signal Uce, Udc, I, TS. The control circuit ST can drive the drive circuit TR, for example, in such a way that the time period until the drive-on voltage Ua is reduced to the first voltage value Uv1 is longer (for example, the time period T2 in fig. 5) and shorter (for example, the time period T1 in fig. 5) if the power semiconductor switch load voltage Uce exceeds a limit value in the on state of the power semiconductor switch T and/or if the intermediate circuit voltage Udc exceeds a limit value and/or if the load current I flowing through the power semiconductor switch T exceeds a limit value and/or if the temperature TS of the power semiconductor switch T exceeds a limit value. The duration of the switching-off process of the power semiconductor switch T can therefore be controlled by the control device 1 in dependence on the operating state.

In critical operating states of the high-voltage load of the power semiconductor switch T which occur or are expected to occur when the power semiconductor switch T is switched off, the duration of the switching-off process of the power semiconductor switch T is preferably selected to be relatively long (for example, the duration T2) in order to reduce the voltage peaks of the power semiconductor switch load voltage Uce due to the parasitic inductance of the electrical line during the switching-off process of the power semiconductor switch T and thus to reduce the voltage load of the power semiconductor switch T. In normal operating states in which a high-voltage load of the power semiconductor switch T is not present or is not expected to occur when the power semiconductor switch T is switched off, the duration of the switching-off process of the power semiconductor switch T is preferably selected to be relatively short (for example, the duration T1) in order to reduce the electrical switching losses of the power semiconductor switch T.

Since the control device 1 has only one output control terminal AS for controlling the power semiconductor switch T, and not three output control terminals AS1, AS2, and AS3, AS in the prior art according to fig. 1, the control device 1 is very space-saving. The IC housing 4 can be constructed significantly smaller than in the prior art because the two pins or bumps required to form the output drive terminals are eliminated.

Preferably, when the output drive terminal AS is conductively connected to the control terminal G of the power semiconductor switch T via the current path SP, the control circuit ST is designed to drive the drive circuit TR by means of the control signal S upon reception of a switch-on command EB in such a way that it increases the drive voltage Ua from a first voltage value Uv1 to a second voltage value Uv2, wherein the control circuit ST drives the drive circuit TR in such a way that the duration until the drive voltage Ua increases to the second voltage value Uv2 is dependent on the at least one operating state signal Uce, Udc, I, TS. In a similar manner to that described above for the switching-off operation of the power semiconductor switch T, the duration of the switching-on operation of the power semiconductor switch T can thus also be controlled by the control device 1 as a function of the operating state. In critical operating states of the high electrical load of the power semiconductor switch T, in which the power semiconductor switch T is switched on or is expected to occur, the duration of the switching-on process of the power semiconductor switch T is preferably selected to be relatively long, while in normal operating states, in which the high electrical load is not present or is not expected to occur when the power semiconductor switch T is switched on, the duration of the switching-on process of the power semiconductor switch T is preferably selected to be relatively short in order to reduce the electrical switching losses of the power semiconductor switch T.

In the exemplary embodiment according to fig. 2, the drive circuit TR has a first voltage source Q1, a first and a second semiconductor switch T1 and T2 and an off-resistor Ra in order to reduce the drive voltage Ua from the second voltage value Uv2 to the first voltage value Uv 1. The first voltage source Q1 is conductively connected to a first load terminal of the first semiconductor switch T1, while a second load terminal of the first semiconductor switch T1 is conductively connected to the output drive terminal AS via an off-resistor Ra. The second semiconductor switch T2 is electrically connected in parallel with the off-resistance Ra. The control circuit ST is configured to: when the power semiconductor switch T is switched off, the second semiconductor switch T2 is switched on or off as a function of the at least one operating state signal Uce, Udc, I, TS. Further, the control circuit ST is configured to turn off the third semiconductor switch T3 and turn on the first semiconductor switch T1 upon receiving the turn-off instruction AB.

In the exemplary embodiment according to fig. 2, the driver circuit TR has a second voltage source Q2, third and fourth semiconductor switches T3 and T4 and an on-resistance Re in order to increase the control voltage Ua from the first voltage value Uv1 to the second voltage value Uv 2. The second voltage source Q2 is conductively connected to a first load terminal of the third semiconductor switch T3, while a second load terminal of the third semiconductor switch T3 is conductively connected to the output drive terminal AS via an on-resistance Re. The fourth semiconductor switch T4 is electrically connected in parallel with the on-resistance Re. The control circuit ST is designed to switch the fourth semiconductor switch T4 on and off as a function of the at least one operating state signal Uce, Udc, I, TS when the power semiconductor switch T is switched on. Furthermore, the control circuit ST is configured to turn off the first semiconductor switch T1 and turn on the third semiconductor switch T3 upon receiving the turn-on command EB.

Here, the semiconductor switches T1, T2, T3, and T4 are turned on and off by the control circuit ST by means of the control signal S.

Fig. 5 shows two time profiles of the control voltage Ua during the switching off of the power semiconductor switch T in the case of the exemplary embodiment according to fig. 2. Up to the time T1, the control voltage Ua has a second voltage value Uv2, here 15V, so that the power semiconductor switch T is switched on. For this reason, the first semiconductor switch T1 is turned off, and the third and fourth semiconductor switches T3 and T4 are turned on. At a time T1, the control circuit ST receives a turn-off command AB for turning off the power semiconductor switch T. As a result, the third semiconductor switch T3 is switched off at time T1 by the control circuit ST, and in the case of a normal operating state, the first and second semiconductor switches T1 and T2 are switched on, so that the gate-emitter capacitance of the power semiconductor switch T is discharged quickly, since substantially only the on-resistances of the first and second semiconductor switches T1 and T2 act as internal resistances of the drive circuit TR. A solid-line curve of the actuation voltage Ua shown in fig. 5 is obtained. At time t2, the control voltage Ua has a first voltage value Uv1, here-8V. A duration T1 is obtained until the actuation voltage Ua decreases to the first voltage value Uv 1. In contrast, in the case of a critical operating state, the first and second semiconductor switches T1 and T2 are not both switched on, but rather only the first semiconductor switch T1 is switched on, so that the gate-emitter capacitance of the power semiconductor switch T discharges more slowly, since, in addition to the on-resistance of the first semiconductor switch T1, the off-resistance Ra, which is significantly higher than the on-resistance of the second semiconductor switch T2, also acts as an internal resistance of the drive circuit TR. A curve of the actuation voltage Ua shown by a dashed line in fig. 5 is obtained. At time t3, the control voltage Ua has a first voltage value Uv1, here-8V. A significantly longer time duration T2 is obtained than time duration T1 until the actuation voltage Ua decreases to the first voltage value Uv 1. The switching-off speed at which the power semiconductor switch T is switched off is therefore lower in the critical operating state than in the normal operating state.

In the case of a switching-on process of the power semiconductor switch T, the fourth semiconductor switch T4 is switched on in a similar manner as a function of the operating state, i.e. as a function of at least one operating state signal Uce, Udc, I, TS.

It should be noted that the drive circuit TR of the power semiconductor switching device 6 according to fig. 2 may of course also have more off-resistances electrically connected in parallel with the semiconductor switches, respectively, for lowering the drive voltage Ua, or it may also have more on-resistances electrically connected in parallel with the semiconductor switches, respectively, for raising the drive voltage Ua.

In the exemplary embodiment according to fig. 3, the drive circuit TR has a first and a second voltage source S1 and S2, which are electrically connected in parallel with one another and are electrically conductively connected to the output drive terminal AS, in order to reduce the drive control voltage Ua from the second voltage value Uv2 to the first voltage value Uv 1. The control circuit ST is designed to switch the first and/or second current source S1, S2 on or off in dependence on at least one operating state signal Uce, Udc, I, TS during the switching-off of the power semiconductor switch T. The first current source S1 is preferably configured to generate a higher current than the second current source S2. Within the scope of this embodiment, the first current I1 generated by the first current source S1 is higher than the second current I2 generated by the second current source S2. The first and second current sources S1 and S2 are conductively connected to a first voltage source Q1 for supplying energy thereto. In the case of critical operating states, for example, only the second current source S2 can be switched on by the control circuit ST in order to switch off the power semiconductor switch T, so that the duration until the actuation voltage Ua decreases to the first voltage value Uv1 is relatively long. In the case of a normal operating state, for example, only the first current source S1 or the first and second current sources S1 and S2 are switched on for switching off the power semiconductor switch T by the control circuit ST, so that the time duration until the actuation voltage Ua is reduced to the first voltage value is short and the power semiconductor switch T is therefore switched off at a high switching speed. The control circuit ST is designed to reduce the actuation voltage Ua from the second voltage value Uv2 to the first voltage value Uv1 during the switching-off of the power semiconductor switch T.

In the exemplary embodiment according to fig. 3, the drive circuit TR has a third and a fourth current source S3 and S4, which are electrically connected in parallel with one another and conductively connected to the output drive terminal AS, in order to increase the drive control voltage Ua from the first voltage value Uv1 to the second voltage value Uv 2. The control circuit ST is designed to switch the third and/or fourth current source S3, S4 on or off in dependence on at least one operating state signal Uce, Udc, I, TS during the switching-on of the power semiconductor switch T. The third current source S3 is preferably configured to generate a higher current than the fourth current source S4.

In the scope of this exemplary embodiment, the third current I3 generated by the third current source S3 is higher than the fourth current I4 generated by the fourth current source S4. The third and fourth current sources S3 and S4 are conductively connected to a second voltage source Q2 for supplying energy thereto. In the case of a critical operating state, for example, only the fourth current source S4 can be switched on by the control circuit ST in order to switch on the power semiconductor switch T, so that the time duration until the actuation voltage Ua increases to the second voltage value Uv2 is relatively long. In the case of a normal operating state, for example, only the third current source S3 or the third and fourth current sources S3 and S4 can be switched on by the control circuit ST in order to switch on the power semiconductor switch T, so that the duration until the control voltage Ua increases to the second voltage value Uv2 is short and the power semiconductor switch T is therefore switched on at a high switching speed.

Further, the control circuit ST is configured to turn off the third and fourth current sources S3 and S4 upon receiving the turn-off instruction AB. Further, the control circuit ST is configured to turn off the first and second current sources S1 and S2 upon receiving the on command EB.

The switching on and off of the current sources S1, S2, S3 and S4 is controlled here by the control circuit ST by means of the control signal S.

It should be noted that the driver circuit TR of the power semiconductor switching device 6 according to fig. 3 may of course also have more current sources in order to reduce or increase the drive control voltage Ua.

It should be noted that the power semiconductor switching device 6 according to fig. 3 and the power semiconductor switching device 6 according to fig. 2 correspond to one another with the exception of the modified drive circuit TR, including advantageous embodiments and embodiment variants.

In the exemplary embodiment according to fig. 4, the driver circuit TR has a first voltage source Q1 and first and second MOSFETs M1 and M2 for reducing the control voltage Ua from the second voltage value Uv2 to the first voltage value Uv 1. The first load current terminal of the first and second MOSFETs M1 and M2 is conductively connected to the first voltage source Q1, while the second load current terminal of the first and second MOSFETs M1 and M2 is conductively connected to the output drive terminal AS. The control circuit ST is designed to switch the first and/or second MOSFET M1, M2 on or off in dependence on at least one operating state signal Uce, Udc, I, TS during the switching-off of the power semiconductor switch T. Within the scope of this embodiment, the transconductance of the second MOSFET M2 (Δ drain current/Δ gate-source voltage of the MOSFET) is smaller than the transconductance of the first MOSFET M1. In the case of a critical operating state, for example, only the second MOSFET M2 can be switched on by the control circuit ST in order to switch off the power semiconductor switch T, so that the duration until the actuation voltage Ua decreases to the first voltage value Uv1 is relatively long. In the case of a normal operating state, for example, only the first MOSFET M1 or the first and second MOSFETs M1 and M2 can be switched on by the control circuit ST in order to switch off the power semiconductor switch T, so that the duration until the drive control voltage Ua decreases to the first voltage value Uv1 is short and the power semiconductor switch T is therefore switched off at a high switching speed.

In the exemplary embodiment according to fig. 4, the driver circuit TR has a second voltage source Q2 and third and fourth MOSFETs M3 and M4 for increasing the control voltage Ua from the first voltage value Uv1 to the second voltage value Uv 2. The first load current terminals of the third and fourth MOSFETs M3 and M4 are conductively connected to a second voltage source Q2. The second load current terminals of the third and fourth MOSFETs M3 and M4 are conductively connected to the output drive control terminal AS. The control circuit TR is designed to switch the third and/or fourth MOSFET M3, M4 on or off in dependence on at least one operating state signal Uce, Udc, I, TS during the switching-on process of the power semiconductor switch T. Within the scope of this embodiment, the transconductance of the fourth MOSFET M4 is smaller than the transconductance of the third MOSFET M3. In the critical operating state, for example, only the fourth MOSFET M4 can be switched on by the control circuit ST in order to switch on the power semiconductor switch T, so that the duration until the actuation voltage Ua increases to the second voltage value Uv2 is relatively long. In the case of a normal operating state, for example, only the third MOSFET M3 or the third and fourth MOSFETs M3 and M4 can be switched on for switching on the power semiconductor switch T by the control circuit ST, so that the duration until the drive control voltage Ua is increased to the second voltage value Uv2 is short and the power semiconductor switch T is therefore switched on at a high switching speed.

Further, the control circuit ST is configured to turn off the third and fourth MOSFETs M3 and M4 upon receiving the turn-off command AB. Further, the control circuit ST is configured to turn off the first and second MOSFETs M1 and M2 upon receiving the turn-on command EB.

The switching on and off of the MOSFETs M1, M2, M3 and M4 is controlled by a control circuit ST by means of a control signal S.

It should be noted that the driver current TR of the power semiconductor switching device 6 according to fig. 4 may of course also have more MOSFETs in order to reduce or increase the drive control voltage Ua.

It should be noted that, apart from the modified drive circuit TR, the power semiconductor switching device 6 according to fig. 4 and the power semiconductor switching device 6 according to fig. 2 correspond to one another, including advantageous embodiments and embodiment variants.

In all exemplary embodiments, the power semiconductor switching device 6 has a drive device 1 according to the invention, a current path SP and a power semiconductor switch T, wherein exactly one output drive terminal AS of the drive device 1 for driving the power semiconductor switch T is electrically conductively connected to the control terminal G of the power semiconductor switch T via the current path SP. In addition to the output control terminal AS, the control device 1 does not have a further output control terminal for controlling the power semiconductor switch T, which is connected to the control terminal G of the power semiconductor switch T via a further current path.

It should also be noted that output control terminals which are conductively connected to one another and therefore have the same potential are considered AS one output control terminal AS within the meaning of the present invention.

It should also be noted that, of course, the features of the different embodiments of the invention may be arbitrarily combined with each other without departing from the scope of the invention, as long as they are not mutually exclusive.

Claims

1. Actuation device for actuating a power semiconductor switch (T), comprising:

a control circuit (2) having a monolithically integrated drive circuit (TR) and a monolithically integrated control circuit (ST), which controls the drive circuit (TR);

an output control terminal (AS) for controlling the power semiconductor switch (T) and connected in an electrically conductive manner to the drive circuit (TR), wherein the output drive-in terminal (AS) is provided for electrically conductive connection with a control terminal (G) of the power semiconductor switch (T) via a current path (SP), wherein the actuation device (1) has precisely one output actuation terminal (AS) for actuating the power semiconductor switch (T), wherein the drive circuit (TR) is configured for generating a drive control voltage (Ua) at the output drive control terminal (AS) for switching the power semiconductor switch (T) on and off, wherein the actuation voltage (Ua) has a second voltage value (Uv2) for switching on the power semiconductor switch (T) and a first voltage value (Uv1) which is lower relative to the second voltage value (Uv2) for switching off the power semiconductor switch (T);

a switching signal input terminal (SE) which is electrically conductively connected to the control circuit (ST) for receiving a switch-on command (EB) for switching the power semiconductor switch (T) on and for receiving a switch-off command (AB) for switching the power semiconductor switch (T) off; and

at least one operating state input terminal (BS) which is conductively connected to the control circuit (ST) for receiving at least one operating state signal (Uce, Udc, I, TS);

wherein, when the output drive terminal (AS) is conductively connected to a control terminal (G) of the power semiconductor switch (T) via the current path (SP), the control circuit (ST) is designed to drive the drive circuit (TR) upon receipt of a switch-off command (AB) such that the drive circuit reduces the drive voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1), wherein the control circuit (ST) drives the drive circuit (TR) such that the time duration (T1, T2) until the drive voltage (Ua) has reduced to the first voltage value (Uv1) is dependent on the at least one operating state signal (Uce, Udc, I, TS).

2. Drive device according to claim 1, characterized in that, for reducing the drive voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1), the drive circuit (TR) has a first voltage source (Q1), a first semiconductor switch (T1), a second semiconductor switch (T2) and an off-resistance (Ra), wherein the first voltage source (Q1) is conductively connected to a first load terminal of the first semiconductor switch (T1) and a second load terminal of the first semiconductor switch (T1) is conductively connected to the output drive terminal (AS) via the off-resistance (Ra), wherein the second semiconductor switch (T2) is electrically connected in parallel to the off-resistance (Ra), wherein the control circuit (ST) is configured to be dependent on the at least one operating state signal (Uce) during the switching-off of the power semiconductor switch (T), Udc, I, TS) turns the second semiconductor switch (T2) on or off.

3. Drive device according to claim 1, characterized in that, for reducing the drive voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1), the drive circuit (TR) has a first current source (S1) and a second current source (S2) which are electrically parallel to one another and are conductively connected to the output drive terminal (AS), wherein the control circuit (ST) is designed to switch the first current source (S1) and/or the second current source (S2) on or off in dependence on the at least one operating state signal (Uce, Udc, I, TS) during the switching-off of the power semiconductor switch (T).

4. The control device according to claim 3, characterized in that the first current source (S1) is configured to generate a higher current than the second current source (S2).

5. The actuation device according to claim 1, characterized in that, for lowering the actuation voltage (Ua) from the second voltage value (Uv2) to the first voltage value (Uv1), the driver circuit (TR) has a first voltage source (Q1) and a first MOSFET (M1) and a second MOSFET (M2), wherein the first load current terminal of the first MOSFET (M1) and the second MOSFET (M2) is conductively connected with the first voltage source (Q1), and the second load current terminal of the first MOSFET (M1) and the second MOSFET (M2) is conductively connected with the output control terminal (AS), wherein the control circuit (ST) is designed to switch the first MOSFET (M1) and/or the second MOSFET (M2) on or off in dependence on the at least one operating state signal (Uce, Udc, I, TS) during the switching-off of the power semiconductor switch (T).

6. The control device according to claim 5, wherein the transconductance of the second MOSFET (M2) is smaller than the transconductance of the first MOSFET (M1).

7. The drive control device according to one of claims 1 to 6, characterized in that, when the output drive terminal (AS) is conductively connected via the current path (SP) to a control terminal (G) of the power semiconductor switch (T), the control circuit (ST) is configured for driving the drive circuit (TR) upon receipt of a switch-on command (EB) such that the drive circuit increases the drive voltage (Ua) from the first voltage value (Uv1) to the second voltage value (Uv2), wherein the control circuit (ST) drives the drive circuit (TR) such that the duration until the drive voltage (Ua) increases to the second voltage value (Uv2) is dependent on the at least one operating state signal (Udc, I, TS).

8. The control device according to claim 7, characterized in that, in order to increase the control voltage (Ua) from the first voltage value (Uv1) to the second voltage value (Uv2), the drive circuit (TR) has a second voltage source (Q2), a third semiconductor switch (T3) and a fourth semiconductor switch (T4) and an on-resistance (Re), wherein the second voltage source (Q2) is electrically conductively connected to a first load terminal of the third semiconductor switch (T3) and a second load terminal of the third semiconductor switch (T3) is electrically conductively connected to the output control terminal (AS) via the on-resistance (Re), wherein the fourth semiconductor switch (T4) is electrically connected in parallel to the on-resistance (Re), wherein the control circuit (ST) is designed to be dependent on the at least one operating state signal (Uce) during the switching-on of the power semiconductor switch (T), Udc, I, TS) turns the fourth semiconductor switch (T4) on or off.

9. Drive device according to claim 7, characterized in that, for increasing the drive voltage (Ua) from the first voltage value (Uv1) to the second voltage value (Uv2), the drive circuit (TR) has a third current source (S3) and a fourth current source (S4) which are electrically parallel to one another and are electrically conductively connected to the output drive terminal (AS), wherein the control circuit (ST) is designed to switch the third current source (S3) and/or the fourth current source (S4) on or off in dependence on the at least one operating state signal (Uce, Udc, I, TS) during the switching-on of the power semiconductor switch (T).

10. The control device according to claim 9, characterized in that the third current source (S3) is configured to generate a higher current than the fourth current source (S4).

11. The control device according to claim 7, characterized in that, in order to increase the control voltage (Ua) from the first voltage value (Uv1) to the second voltage value (Uv2), the driver circuit (TR) has a second voltage source (Q2) and a third MOSFET (M3) and a fourth MOSFET (M4), wherein the first load current terminals of the third MOSFET (M3) and the fourth MOSFET (M4) are conductively connected with the second voltage source (Q2), and the second load current terminal of the third MOSFET (M3) and the fourth MOSFET (M4) is conductively connected to the output control terminal (AS), wherein the control circuit (ST) is designed to switch the third MOSFET (M3) and/or the fourth MOSFET (M4) on or off in dependence on the at least one operating state signal (Uce, Udc, I, TS) during the switching-on of the power semiconductor switch (T).

12. The actuation device according to claim 11, characterized in that the transconductance of the fourth MOSFET (M4) is smaller than the transconductance of the third MOSFET (M3).

13. The control device according to one of claims 1 to 6, characterized in that the control circuit (ST) and the drive circuit (TR) are monolithically integrated in a common chip (3).

14. The control device according to one of claims 1 to 6, characterized in that the control circuit (ST) and the drive circuit (TR) are arranged in a common IC housing (4), and the output control terminal (AS), the at least one operating state input terminal (BS) and the switching signal input terminal (SE) are present in the form of electrically conductive pins or bumps protruding from the IC housing (4).

15. Power semiconductor switching device with a drive control apparatus (1) according to one of claims 1 to 14, a current path (SP) and a power semiconductor switch (T), wherein exactly one of the drive control apparatuses serves for driving an output drive control terminal (AS) of the power semiconductor switch (T) is conductively connected via the current path (SP) to a control terminal (G) of the power semiconductor switch (T).