CN112198392A - Real-time detection device for power grid voltage harmonic waves - Google Patents
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Abstract
The invention discloses a real-time detection device for voltage harmonics of a power grid, which relates to the technical field of voltage harmonic detection, and comprises a Fast Fourier Transform (FFT) module and a dual spectral line interpolation algorithm, wherein the Fast Fourier Transform (FFT) module is used for carrying out time domain signal change to frequency domain processing on a detected signal, then the frequency and amplitude of each frequency point are analyzed in a mode of searching a frequency peak value by three points, a Katherin window with beta being 4 pi is used for carrying out windowing processing on the signal, and the dual spectral line interpolation algorithm is used for correcting the frequency precision generated due to frequency domain dispersion.
Description
Technical Field
The invention discloses a real-time detection device for voltage harmonics of a power grid, which analyzes frequency components and the percentage of voltage in the power grid by utilizing Fourier transform, provides data for the management of the voltage harmonics in the power grid by detecting the frequency components and the amplitude of the voltage harmonics in the power grid, and relates to the technical field of voltage harmonic detection.
Background
The method of the analog filter is the earliest occurring electric energy harmonic detection method, and the principle of carrying out harmonic detection is to use the filter to filter other frequency components except the harmonic to be detected, so as to obtain the frequency components of the harmonic to be detected; the analog filter detection method is better in that the method is easy to implement and simple in structure, but has many non-negligible defects, such as large error of detection result, poor real-time performance, variable frequency of grid fundamental wave, and possibility of filtering out harmonic waves to be measured if a filter with fixed frequency is used, thereby resulting in obtaining wrong measurement result.
With the development of science and technology, a great number of techniques have been developed, wherein the artificial neural network is superior; the artificial neural network can improve the weight of the neural network according to the collected samples, so that the artificial neural network can continuously learn according to actual conditions to adapt to the change of current or voltage in a power grid, but the artificial neural network has many defects, such as the requirement of a large number of samples to ensure the accuracy of results, huge calculation amount, non-preponderance of data processing speed and the like.
Disclosure of Invention
The invention aims to: the real-time detection device for the voltage harmonic waves of the power grid is provided, the voltage harmonic wave data are detected in real time, and the actual voltage frequency change of the power grid can be adapted; the invention can complete the update of a group of voltage harmonic data within 0.25 second, and when the frequency components of the power grid voltage are within 0 to 2000HZ and the frequency interval between the frequency components is more than 25HZ, each harmonic component can be distinguished.
The technical scheme adopted by the invention is as follows: the utility model provides a real-time detection device of grid voltage harmonic, includes Fast Fourier Transform (FFT) module and doublet line interpolation algorithm, changes to the frequency domain to the signal of being surveyed, then through the mode of three points seeking frequency peak, analyzes out the size of the frequency and the range of each frequency point, adopts the keleiner window of beta 4 pi to carry out the windowing to the signal, uses doublet line interpolation algorithm to revise the frequency precision that produces because of the frequency domain is discrete.
The working principle of the invention is as follows: the method comprises the steps of firstly converting a strong current signal into an alternating current weak current signal with a peak value of 2V and filtering and compensating the signal by using a sensor, then acquiring the weak current signal and transmitting the weak current signal into an FPGA (field programmable gate array), finally processing and analyzing the signal in the FPGA and a single chip microcomputer and transmitting an analysis result into a computer for display, specifically, firstly converting 220V voltage of a power grid into the alternating current signal with the peak value of 2V by using a voltage acquisition module, then converting an analog signal into a digital signal by using an ad converter, then performing windowing and FFT (fast Fourier transform) conversion by using an FPGA chip, and finally performing a double-spectral line interpolation algorithm on the single chip microcomputer for display. (FFT transformation includes signal transformation from time domain to frequency domain, windowing is to suppress the problem of spectral leakage generated during FFT transformation, and dual-spectral-line interpolation algorithm is to suppress the fence effect caused by FFT transformation and the frequency precision problem caused by asynchronous sampling caused by signal acquisition)
Optionally, the frequency peak is searched for by three points, and when the three consecutive frequency points satisfy that the first frequency point and the third frequency point are smaller than the second frequency point and the value of the second frequency point is greater than a critical value, the peak of one frequency is found.
Optionally, the windowing process includes a kaiser window generating unit and a multiplying unit, where the kaiser window generating unit mainly includes an address generator and a ROM storing a kaiser window function, and in this module, when clk _ en1 is high, the address generator generates an address to enable the ROM to perform a multiplication operation using a value of an output window function and an input value to complete a windowing operation, where doutb is input data, clk _ en1 is an address generator enable signal, addra is an address generated by the address generator, douta is a window function amplitude value generated according to the address signal, and win _ ad is input data after windowing.
Optionally, the Fast Fourier Transform (FFT) module transforms the time domain signal to the frequency domain for processing, and extracts useful frequency components therein, and the Fast Fourier Transform (FFT) module, the complex format transform (tfc) module and the peak finding module mainly comprise three parts, when the start is high, the FFT module performs FFT transform output on input data (win _ ad ═ xn _ re), the complex format transform module transforms the complex representation format with real number and imaginary number into the representation format with amplitude and phase, and the peak finding module finds out each peak in the frequency domain, where the start is the start signal of the Fast Fourier Transform (FFT) module, xn _ re is the win _ ad signal whose data input is equal to the previous module, xk _ im and xk _ re are respectively the imaginary part and real part of the number corresponding to the frequency domain, and dv is the output valid indication signal, blk _ exp is the output data reduction value, xk _ index is the channel value corresponding to the frequency of the output data, cirvvv is the representation of converting the complex number into amplitude and phase, x _ out _ out and x _ out _ out1 are the maximum and sub-maximum respectively, xk _ index1_ out is the discrete value corresponding to the peak; the Fast Fourier Transform (FFT) has two problems, namely, spectral leakage and the barrier effect, and is firstly performed in a windowing manner in terms of the spectral leakage, wherein a ketelin window of β ═ 4 pi is used as a window function to be added before the Fast Fourier Transform (FFT) is performed; then, in the aspect of the barrier effect, a double-spectral-line interpolation algorithm is used for processing the frequency precision problem caused by frequency domain dispersion.
Optionally, the dual-spectral-line interpolation algorithm mainly solves the problem of frequency accuracy caused by FFT transformation, and performs calculation according to the four values of the maximum value, the sub-maximum value, the frequency channel value, and the amplitude attenuation, and a calculation formula can be obtained through MATLAB simulation as follows:
be＝(y2_out-y1_out)/(y2_out+y1_out) (1)
y_n＝0.3109*be3+2.7468*be (2)
f＝(index_out-0.5+y_n)*fs/N (3)
y_m＝0.0187*be6+0.154*be4+0.9484*be2+3.1292 (4)
q＝(y1_out+y2_out)*y_m*2blk_exp/(16646017*N) (5)
in the above formula, y2_ out and y1_ out are respectively a maximum value and a sub-maximum value, fs and N are respectively a sampling frequency and a sampling point number, index _ out and blk _ exp are respectively a frequency channel value and an amplitude failure value, f is a calculated ground frequency value, and q is a corresponding calculated amplitude value; the dual-spectral line interpolation algorithm mainly solves the problem of frequency progress generated by frequency domain discretization, wherein y2_ out and y1_ out are respectively equal to x _ out _ out and x _ out _ out1, xk _ index1_ out is equal to index _ out, N is a sampling point number equal to 1024, fs is a sampling frequency equal to 5kHZ, f is a calculated ground frequency value, and q is a corresponding calculated amplitude value.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
the invention adopts a windowing interpolation FFT algorithm to analyze harmonic waves, realizes the algorithm through Matlab simulation, and then transplants the algorithm on an FPGA chip, and the chip has the main tasks of AD sampling a mixing signal containing harmonic wave signals of fundamental waves, windowing data after AD conversion to inhibit frequency spectrum leakage caused by FFT, carrying out FFT calculation after windowing the signals, and carrying out error correction on the signals after FFT by using a dual-spectral line interpolation algorithm because the harmonic wave analysis of FFT has larger errors due to asynchronous sampling and non-integer period truncation, so that the accuracy of the detected frequency is higher.
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The invention will now be described, by way of example, with reference to the accompanying drawings, in which:
FIG. 1 is a signal flow diagram of the present invention;
FIG. 2 is a block diagram of signal processing according to the present invention;
FIG. 3 is a block diagram of a windowing module in accordance with the present invention;
FIG. 4 is a block diagram of a Fast Fourier Transform (FFT) module of the present invention;
FIG. 5 is a block diagram of a data analysis cache module according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
As shown in fig. 1-5, a real-time detection device for grid voltage harmonics analyzes and processes a grid strong current signal, first, a signal conditioning module is used to convert the strong current signal into an alternating current weak current signal with a peak value of 2V and filter and compensate the signal, then, an AD acquisition module is used to convert the weak current signal into a digital signal and transmit the digital signal to an FPGA, and finally, the signal is processed and analyzed in the FPGA and a single chip and the analyzed result is transmitted to a computer for display;
the signal conditioning module mainly converts an alternating current signal with an effective value of 220V into an alternating current weak current signal with a peak value of 2V; firstly, a ZMPT101B voltage transformer is used for converting a strong current signal into a weak current signal, and then a high-precision operational amplifier LM358 is used for carrying out operations such as accurate acquisition and appropriate compensation on the weak current signal;
the AD sampling module uses an AD9280 chip, the range of the input voltage which can be collected is-1V to +1V, the maximum sampling frequency is 32MHz, and the output digital digit is 8 bit; when data enters an FPGA from an AD conversion chip, firstly, an on-chip RAM of the FPGA is used for caching the data, the data is cached to 1024 points and then is issued to a windowing module, in a program, firstly, the data acquired by the AD is acquired again, the data flow of the acquisition frequency Fs (10 MHz (AD acquisition signal AD _1, clk _5ken reacquires an enabling signal) is reduced to 5KHz (input data signal dina), then, the acquired data is stored in the RAM (address drda _ rama is a storage address signal of the input data of the RAM, en is a RAM clock enabling signal, rst is a RAM synchronous reset signal), and finally, the data is taken out of the RAM after the data is acquired to 1024 points (address drdd _ rama is a storage address signal of the output data, and output data signal doutb).
The FPGA module comprises a windowing module, a Fast Fourier Transform (FFT) module and a data analysis cache module, the FPGA chip supplies power, a downloading interface of the FPGA program, a crystal oscillator reference clock is provided, a storage chip of the FPGA program and a universal I/O interface are provided, 3.3V is mainly used for supplying power for the FPGA, the FPGA program is downloaded by TMS, TCK, TDO and TDI four-wire modes, 50MHz active crystal oscillator input is used for inputting the FPGA reference clock, the FPGA chip is composed of an RAM, the program can be lost when the power failure occurs, and the FPGA chip needs a FLASH chip to store the program. The FLASH chip mainly uses SPI communication to download a program into the FPGA;
the windowing module is mainly used for windowing collected data and mainly comprises a kaiser window generating unit and a multiplying unit, the kaiser window type is symmetrical, so that the weighting processing of the whole kaiser window can be completed in a program by only using a ROM to store the first half, in the module, douta is a signal to be windowed, douta is a window signal, an address signal addra is an address for storing a window signal ROM storage, win _ ad is an input signal after a windowing function, clk _ en1 is an address generator of the ROM storage, and when clk _ en1 is high, the address generator can generate an address for the ROM storage to use the value of an output window function;
the Fast Fourier Transform (FFT) module adopts a radix-2 mode used by FFT to calculate, and mainly converts a time domain signal into a frequency domain for processing, and extracts useful frequency components in the time domain signal, wherein a signal start is a starting signal for starting FFT, a signal xn _ re is a time domain signal to be subjected to FFT, a signal xk _ re is a frequency domain signal after the time domain signal is subjected to FFT, a real part signal xk _ im is an imaginary part of the frequency domain signal after the time domain signal is subjected to FFT, a signal xk _ index is the number of channels corresponding to frequency values corresponding to output frequency domain signals, a signal blk _ exp is the number of binary bits with data indented to the left in the FFT, dv is an effective data indicating signal output by the FFT module, a signal x _ out is a frequency domain complex amplitude value, a signal rdy _ cirvv is an effective indicating signal of the amplitude value, and x _ out _ out is a maximum frequency peak value, x _ out _ out1 is the frequency peak sub-maximum.
The analysis data caching module is mainly used for caching useful frequency components analyzed by the FFT conversion module, then the stored data is sent to the STM32F103 single chip microcomputer through a serial port to be processed in the next step, the module is processed by a clock which is 5 times faster than that of the previous module, parallel data calculated by FFT are serially stored in a RAM, wherein clk and rst are respectively a clock and a reset signal, rdy _ cirvv is an effective signal for processing FFT conversion data, rdy _ complete _ signal is an indicating signal indicating that one frame of data is transmitted by the serial port, rdy _ win indicates that the acquisition module finishes acquiring 1024 point data, clk _ en indicates that a new round of data acquisition can be carried out, start indicates that the processing of FFT conversion of the data can be carried out, material _ start _ signal indicates that the processing of the serial port data can be carried out, wea and enb are respectively used for inputting an enabling signal and outputting a clock effective signal for the RAM, addra _ w and addra _ r are the address of the write data and the address of the output data of the RAM, respectively, blk _ exp, xout _ out1, and xk _ index1_ out are the input data of the RAM, and serial _ send _ data is the RAM output data.
The single-chip microcomputer module is used for the single-chip microcomputer module and is STM32F103C8T6, the highest working clock of the single-chip microcomputer reaches 72MHz, the access in the 0 waiting period of the storage can reach 1.25DMips/MHz, single-period multiplication and hardware division, a 64K flash program storage, a 20K byte SRAM, 2 hardware SPIs, 2 hardware I2C and three serial transceivers; the singlechip provides an external reference clock; the reference clock uses a passive crystal oscillator to provide a reference clock signal of 8MHz, the single chip microcomputer program is downloaded by using an ST-LINK simulator, the single chip microcomputer mainly comprises a clock line and a data line, and the single chip microcomputer is powered by 3.3V and supplies 5V to the single chip microcomputer module, so that the ME6611 chip is used for converting 5V voltage into 3.3V.
The serial port receiving module of the single chip microcomputer is mainly used for receiving useful data in a data frame into a receiving structure body, placing the data in the receiving structure body into a cache structure body after a group of data is received, and then enabling the double spectral line interpolation module to process the data.
The dual-spectral-line interpolation algorithm mainly solves the problem of frequency accuracy caused by FFT (fast Fourier transform), and is calculated according to four values of the maximum value, the sub-maximum value, the frequency channel value and the amplitude attenuation of a peak, and a calculation formula can be obtained through MATLAB simulation and is shown as follows.
be＝(y2_out-y1_out)/(y2_out+y1_out) (1)
y_n＝0.3109*be3+2.7468*be (2)
f＝(index_out-0.5+y_n)*fs/N (3)
y_m＝0.0187*be6+0.154*be4+0.9484*be2+3.1292 (4)
q＝(y1_out+y2_out)*y_m*2blk_exp/(16646017*N) (5)
In the above equation, y2_ out and y1_ out are respectively the maximum value and the sub-maximum value, fs and N are respectively the sampling frequency and the number of sampling points, and index _ out and blk _ exp are respectively the frequency channel value and the amplitude collapse value.
The method comprises the steps of firstly converting an ACELL code character string in a serial port cache structure into corresponding decimal data, then correcting the data through a double-spectral-line interpolation algorithm, changing the data into the ACELL code character string, finally transmitting the ACELL code character string data to a computer through a serial port, and displaying the ACELL code character string data on the computer by using a serial port assistant.
The above description is only a preferred embodiment of the present invention, and not intended to limit the present invention, the scope of the present invention is defined by the appended claims, and all structural changes that can be made by using the contents of the description and the drawings of the present invention are intended to be embraced therein.
Claims (5)
1. The utility model provides a real-time detection device of grid voltage harmonic, includes Fast Fourier Transform (FFT) module and doublet line interpolation algorithm, its characterized in that, to the signal change of being surveyed the signal and to frequency domain processing, then through the mode of three points seek frequency peak value, the size of the frequency and the range of each frequency point of analysis, adopt beta 4 pi Kaiser window to carry out windowing to the signal, use doublet line interpolation algorithm to revise the frequency precision that produces because of the frequency domain is discrete.
2. The device as claimed in claim 1, wherein the frequency peak is found by three points, and when the three consecutive frequency points satisfy that the first frequency point and the third frequency point are smaller than the second frequency point and the value of the second frequency point is greater than a critical value, the peak of one frequency is found.
3. The apparatus of claim 1, wherein the windowing process comprises a kaiser window generating unit and a multiplying unit, wherein the kaiser window generating unit comprises an address generator and a ROM storing a kaiser window function, and in this module, when clk _ en1 is high, the address generator generates an address for the ROM to perform a windowing operation by multiplying the input value by the value of the output window function, wherein doutb is the input data, clk _ en1 is the address generator enable signal, addra is the address generated by the address generator, douta is the window function amplitude value generated according to the address signal, and win _ ad is the input data after windowing.
4. The device of claim 1, wherein the Fast Fourier Transform (FFT) module transforms the time domain signal into the frequency domain for processing, and extracts useful frequency components from the time domain signal, and comprises three parts, namely, a FFT transform small module, a complex format transform small module and a peak search small module, when the start is high, the FFT transform small module first performs FFT transform on the input data (win _ ad ═ xn _ re) to output, then the complex format transform small module transforms the complex representation with real and imaginary numbers into the representation with amplitude and phase, and finally the peak search module searches for each peak in the frequency domain, wherein the start is the start signal of the Fast Fourier Transform (FFT) module, the xn _ re is the data input equal to the win _ ad signal of the previous module, and xk _ im are the imaginary and real parts of the number corresponding to the frequency domain respectively, dv is an output valid indication signal, blk _ exp is an output data reduction value, xk _ index is a channel value corresponding to the frequency of the output data, cirvvv is a representation of converting a complex number into an amplitude and a phase, x _ out _ out and x _ out _ out1 are respectively a maximum value and a sub-maximum value, and xk _ index1_ out is a discrete value corresponding to a peak value.
5. The device for real-time detection of power grid voltage harmonics according to claim 1, wherein the bilinear interpolation algorithm is to solve the problem of frequency accuracy caused by FFT transformation, and is calculated according to four values of a maximum value, a sub-maximum value, a frequency channel value and an amplitude attenuation of a peak, and a calculation formula can be obtained through MATLAB simulation as follows:
be＝(y2_out-y1_out)/(y2_out+y1_out) (1)
y_n＝0.3109*be3+2.7468*be (2)
f＝(index_out-0.5+y_n)*fs/N (3)
y_m＝0.0187*be6+0.154*be4+0.9484*be2+3.1292 (4)
q＝(y1_out+y2_out)*y_m*2blk_exp/(16646017*N) (5)
in the above equation, y2_ out and y1_ out are the maximum value and the sub-maximum value, fs and N are the sampling frequency and the number of sampling points, index _ out and blk _ exp are the frequency channel value and the amplitude failure value, f is the calculated ground frequency value, and q is the corresponding calculated amplitude value.
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|---|---|---|---|---|
| CN113884761A (en) * | 2021-09-13 | 2022-01-04 | 中国电子科技集团公司第二十九研究所 | Method, device, equipment and medium for improving frequency measurement precision |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101441233A (en) * | 2008-12-02 | 2009-05-27 | 湖南海兴电器有限责任公司 | Base wave and harmonic detecting method based on Kaiser window double-line spectrum insert value FFT |
| CN201352236Y (en) * | 2008-12-02 | 2009-11-25 | 湖南海兴电器有限责任公司 | Harmonic power meter based on Kaiser window double-spectrum-line interpolation FFT |
| CN103575984A (en) * | 2012-08-02 | 2014-02-12 | 西安元朔科技有限公司 | Harmonic analysis method based on Kaiser window double-spectral-line interpolation FFT |
-
2020
- 2020-09-03 CN CN202010917841.4A patent/CN112198392A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101441233A (en) * | 2008-12-02 | 2009-05-27 | 湖南海兴电器有限责任公司 | Base wave and harmonic detecting method based on Kaiser window double-line spectrum insert value FFT |
| CN201352236Y (en) * | 2008-12-02 | 2009-11-25 | 湖南海兴电器有限责任公司 | Harmonic power meter based on Kaiser window double-spectrum-line interpolation FFT |
| CN103575984A (en) * | 2012-08-02 | 2014-02-12 | 西安元朔科技有限公司 | Harmonic analysis method based on Kaiser window double-spectral-line interpolation FFT |
Non-Patent Citations (1)
| Title |
|---|
| 宋知用: "《MATLAB数字信号处理85个实用案例精讲-入门到进阶》", 31 December 2016, 北京航空航天大学出版社, pages: 387 - 412 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113884761A (en) * | 2021-09-13 | 2022-01-04 | 中国电子科技集团公司第二十九研究所 | Method, device, equipment and medium for improving frequency measurement precision |
| CN113884761B (en) * | 2021-09-13 | 2023-04-25 | 中国电子科技集团公司第二十九研究所 | Method, device, equipment and medium for improving frequency measurement precision |
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