CN112181874A - Data acquisition platform and unmanned system - Google Patents
Data acquisition platform and unmanned system Download PDFInfo
- Publication number
- CN112181874A CN112181874A CN202011181307.8A CN202011181307A CN112181874A CN 112181874 A CN112181874 A CN 112181874A CN 202011181307 A CN202011181307 A CN 202011181307A CN 112181874 A CN112181874 A CN 112181874A
- Authority
- CN
- China
- Prior art keywords
- data acquisition
- data
- interface
- acquisition platform
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 230000006835 compression Effects 0.000 claims description 4
- 238000007906 compression Methods 0.000 claims description 4
- 238000002372 labelling Methods 0.000 claims description 4
- 238000012423 maintenance Methods 0.000 claims description 4
- 238000013480 data collection Methods 0.000 claims 2
- 238000000034 method Methods 0.000 abstract description 7
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 11
- 230000002093 peripheral effect Effects 0.000 description 6
- 238000004891 communication Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000007613 environmental effect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000001133 acceleration Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000011144 upstream manufacturing Methods 0.000 description 2
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012549 training Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Traffic Control Systems (AREA)
Abstract
The application discloses data acquisition platform, this data acquisition platform include the VPX backplate, are equipped with bus device on the VPX backplate, and this data acquisition platform still includes IO interface arrangement and the computing device all is connected with bus device, wherein: the IO interface device comprises a plurality of GPIO interfaces and a first FPGA, wherein the first FPGA is used for configuring the GPIO interfaces into target protocol interfaces, and is also used for converting data received by the target protocol interfaces into target data; and the computing device is used for computing the target data and sending a control instruction to the IO interface device according to the preset control logic. The method and the device can ensure that the upgrading speed of the data acquisition platform can be balanced with the iteration speed of the algorithm model, and improve the upgrading flexibility. The application also discloses an unmanned system which has the beneficial effects.
Description
Technical Field
The application relates to the field of data acquisition, in particular to a data acquisition platform and an unmanned system.
Background
The unmanned system is a complex system formed by an automobile body, a cloud computing platform and an algorithm, most algorithm models need to acquire a large amount of historical data as a data base of the models, the historical data comprises a route and a sensing data set of the surrounding environment of the route, and on the other hand, the algorithm models of the unmanned system need to be fused with various sensor data. At present, sensors applied in intelligent automobiles mainly comprise millimeter wave radars, ultrasonic radars, laser radars, cameras, integrated navigation systems and the like. The interfaces of these sensors are different, for example, the millimeter wave radar needs a CAN (Controller Area Network) bus interface, the ultrasonic radar needs an I2C (Inter-Integrated Circuit) interface or a serial port, the laser radar needs an ethernet interface, the camera needs an MIPI interface, and the Integrated navigation system needs an ethernet interface.
Due to the difference and evolution of the algorithm model, the data acquisition platform also needs to be updated and followed or adjusted, meanwhile, the diversity requirements of the access interfaces of the sensors are considered, different acquisition schemes are customized according to different sensors, the conventional data acquisition platform often needs to be adjusted when the updating and following or adjustment are carried out, the operation is troublesome, and the algorithm model cannot be applied to the actual multi-IO-interface hardware platform if the iteration speed of the algorithm model is not adjusted to be unbalanced with the updating speed of the multi-IO-interface hardware platform.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The application aims to provide a data acquisition platform and an unmanned system, which can ensure that the upgrading speed of the data acquisition platform can be balanced with the iteration speed of an algorithm model, and improve the upgrading flexibility.
In order to solve the technical problem, the present application provides a data acquisition platform, and this data acquisition platform includes the VPX backplate, be equipped with bus device on the VPX backplate, this data acquisition platform still include all with IO interface arrangement and the computing device that bus device connects, wherein:
the IO interface device comprises a plurality of GPIO interfaces and a first FPGA, wherein the first FPGA is used for configuring the GPIO interfaces into target protocol interfaces, and is also used for converting data received by the target protocol interfaces into target data;
and the computing device is used for computing the target data and sending a control instruction to the IO interface device according to a preset control logic.
Preferably, the data acquisition platform further comprises a data flow tray device, and the data flow tray device comprises:
a PCIE crossbar coupled to the bus device;
and the solid-state storage disk module is connected with the PCIE cross switch and is used for storing the data stream of the backboard.
Preferably, the solid-state storage disk module includes multiple m.2 PCIE interface solid-state disks.
Preferably, the data acquisition platform further comprises a camera data acquisition device, the camera data acquisition device comprising:
the FMC module capable of carrying 4-6 paths of 4lane MIPI interfaces is used for acquiring image data and carrying out MIPI signal conversion on the image data;
the second FPGA is connected with the FMC module and the bus device and is used for performing compression operation and/or labeling operation on the image data;
correspondingly, the computing device is further used for computing the image data.
Preferably, the data acquisition platform further comprises a switch device, the switch device comprising:
an RJ45 connector;
the third FPGA is used for instantiating a PCIE IP core and is connected with the bus device through a PCIE link; the third FPGA is also used to instantiate a gigabit network MAC to the RJ45 connector externally connected to an ethernet via an RGMII interface or an SGMII interface.
Preferably, the bus device includes a trigger IO bus, a maintenance bus, a low-speed bus, a high-speed bus, and a PCIE switch.
Preferably, the target protocol interface includes any one of a UART serial port, an I2C interface, and an SPI interface.
Preferably, the computing device comprises a CPU computing node and an AI accelerated computing node, and the CPU computing node comprises a CPU, a memory, a PCH, a BMC, and a CPLD.
In order to solve the technical problem, the present application further provides an unmanned system, including the data acquisition platform as described in any one of the above.
The application provides a data acquisition platform, construct on-vehicle road environment data acquisition platform through the VPX backplate, this kind of platform framework is based on industry field standard's platform, reliability and environmental suitability are stronger, be applicable to actual on-vehicle environment and gather target road data, IO interface arrangement in this application, computing device and VPX backplate are realized with the form of combination, each functional module can upgrade respectively in the data acquisition platform, the flexibility is improved, thereby the speed of upgrading of having guaranteed the data acquisition platform can be balanced with algorithm model iteration speed. In addition, the IO interface device realizes data conversion of multiple protocol interfaces through the FPGA, a processor is not required to be specially arranged for a certain protocol interface, the hardware design difficulty of a data acquisition platform is reduced, and the size is reduced. The application also provides an unmanned system which has the same beneficial effect as the data acquisition platform.
Drawings
In order to more clearly illustrate the embodiments of the present application, the drawings needed for the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a schematic structural diagram of a data acquisition platform provided in the present application;
fig. 2 is a schematic structural diagram of an IO interface device provided in the present application;
fig. 3 is a schematic structural diagram of a CPU compute node provided in the present application;
fig. 4 is a schematic structural diagram of a data flow disk apparatus provided in the present application;
fig. 5 is a schematic structural diagram of a camera data acquisition device provided in the present application;
fig. 6 is a schematic structural diagram of a switch device provided in the present application;
fig. 7 is a schematic structural diagram of another switch device provided in the present application.
Detailed Description
The core of the application is to provide a data acquisition platform and an unmanned system, which can ensure that the upgrading speed of the data acquisition platform can be balanced with the iteration speed of an algorithm model, and improve the upgrading flexibility.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a data acquisition platform provided in the present application, where the data acquisition platform includes a VPX (high speed serial bus standard) backplane 1, a bus device is disposed on the VPX backplane 1, and the data acquisition platform further includes an IO interface device 2 and a computing device both connected to the bus device, where:
the IO interface device 2, the IO interface device 2 includes a plurality of GPIO (General Purpose input/output) interfaces and a first FPGA (Field Programmable Gate Array), the first FPGA is configured to configure the GPIO interfaces as target protocol interfaces, and the first FPGA is further configured to convert data received by the target protocol interfaces into target data;
and the computing device is used for computing the target data and sending a control instruction to the IO interface device 2 according to a preset control logic.
Specifically, the data acquisition platform that this application provided is the on-vehicle road environment data acquisition platform of being built by VPX backplate 1, and VPX platform framework is the platform based on industry on-the-spot standard, and its reliability and environmental suitability are stronger, are applicable to actual on-vehicle environment and gather target road data. Referring to fig. 1, a VPX platform is provided with bus devices, which include but are not limited to a trigger IO bus, a maintenance bus, a low speed bus, a high speed bus, a PCIE switch, and the like. The data acquisition platform further comprises an IO interface device 2 and a computing device, wherein the IO interface device 2, the computing device and a bus device can be detachably connected, and the IO interface device 2 and the computing device can be conveniently and independently upgraded.
Specifically, the IO interface device 2 may be regarded as a plurality of vehicle-mounted sensors/IO access HUBs (multi-port repeaters), and the rich IO interface resources of the FPGA are utilized to match with a peripheral interface circuit, so as to implement a low-speed multifunctional IO interface module, as shown in fig. 2, fig. 2 is a schematic structural diagram of the IO interface device 2 provided by the present application, which includes an FMC module, a plurality of configurable GPIOs, a first FPGA and a DIMM (dual inline Memory module), it CAN be understood that a CAN bus is one of the most commonly used buses in the automotive field, and includes a plurality of peripherals, and in this scenario, a main target device is a millimeter wave radar, and CAN also be accessed to other CAN bus peripherals; the GPIO interfaces can be configured into a UART (Universal asynchronous receiver/Transmitter ) serial port, an I2C Interface, an SPI (serial peripheral Interface) Interface and the like by adjusting the IP of the FPGA according to requirements so as to meet different requirements of low-speed bus peripherals. In addition, in the circuit module, the power module level of the matched IO interface is configurable, and can be configured to 1.8V, 2.5V, 3.3V and the like, so as to meet the level requirements of various bus interfaces.
Specifically, the computing device includes a CPU computing node 31 and an AI acceleration computing node 32, where the CPU computing node 31 is a core of an operation and control of the data acquisition platform, as shown in fig. 3, fig. 3 is a structural view of the computing device provided in the present application, and the CPU computing node 31 mainly includes functional modules such as a CPU, a main memory (internal memory), a PCH, a BMC, and a CPLD. The CPU computation node 31 is connected to a PCIE switch upstream of the backplane bus through a PCIE bus, which is a main communication bus from the CPU computation node 31 to the peripheral, and supports transparent data transmission of the PCIE switch downstream End point node, and the PCIE switch of the backplane supports DMA of the downstream End point, for example: road images and laser point cloud data are collected and stored to a data flow disk and used as historical data of AI training, and more calculation nodes are not needed in the scene. The front panel of the computing node comprises interfaces for display, maintenance and the like required by control.
As a preferred embodiment, the data acquisition platform further comprises a data flow tray device 4, the data flow tray device 4 comprises:
a PCIE crossbar connected to the bus device;
and the solid-state storage disk module is connected with the PCIE cross switch and is used for storing the data stream of the backboard.
Specifically, as shown in fig. 4, the data stream disk apparatus 4 mainly includes two portions, namely a PCIE crossbar switch and a solid-state storage disk of a PCIE interface, where an upstream interface of the PCIE switch is a backplane PCIE bus, and a plurality of PCIE interface solid-state disks of m.2 are connected downstream, and the solid-state storage scheme using the PCIE interface may be that a backplane data stream is directly dropped through DMA, which is suitable for an application scenario with a large amount of collection.
As a preferred embodiment, the data acquisition platform further comprises a camera data acquisition device 5, the camera data acquisition device 5 comprising:
the FMC module capable of carrying 4-6 paths of 4lane MIPI interfaces is used for acquiring image data and carrying out MIPI signal conversion on the image data;
the second FPGA is connected with the FMC module and the bus device and is used for performing compression operation and/or labeling operation on the image data;
correspondingly, the computing device is also used for computing the image data.
Specifically, the camera data acquisition device 5 is arranged to convert the camera front-end data to the PCIE link through the MIPI interface, and the interface scheme is uniform. However, considering that the implementation scheme of the front end of the camera is personalized, and includes the types and number of cameras required by the user algorithm and the topology of the links of the number of cameras at the front end of the user, the camera data acquisition device 5 provided in this embodiment is intended to use an FPGA chip as a core, and by using the features of abundant, flexible and configurable IO interfaces, a modular (FMC) camera link board is onboard, the structure diagram of which is shown in fig. 5, and includes a FMC module capable of carrying 4-6 paths of 4lane MIPI interfaces, a second FPGA and a DIMM, the FMC module supports two typically configured ISP (image signal processor) front and rear modules, the ISP front is a module in which the ISP is placed, the FMC is a path for serial link data conversion of MIPI signals, and the ISP rear connection processor (FPGA) is a main application of unmanned at present, and is intended to better utilize image data of the camera. The image data link can be processed in local data through the FPGA, for example, compression, labeling and the like can be performed through the FPGA, the image data can be stored and downloaded through a PCIE bus DMA and used as historical data of an AI model, the image data can be transmitted to a CPU (central processing unit) computing node 31 unit or an AI acceleration processing node through the PCIE bus to be operated, and the camera data acquisition module provided by the embodiment supports a plurality of camera data IO (input/output) acquisition modules and can be flexibly cut and expanded according to algorithm requirements.
As a preferred embodiment, the data acquisition platform further comprises a switch device 6, the switch device 6 comprising:
an RJ45 connector;
the third FPGA is used for instantiating a PCIE IP core and is connected with the bus device through a PCIE link; the third FPGA is also used to instantiate a gigabit network MAC that interfaces ethernet to RJ45 connectors via RGMII or SGMII interfaces.
Specifically, the switch device 6 in this embodiment is mainly used to implement the following functions as an interface IO module for system and external large data volume exchange, and support an interface of a laser radar (Lidar) for vehicles, where the currently mainstream laser radar includes a gigabit network and a gigabit ethernet interface, and supports access to Integrated Navigation System (INS) data via an ethernet network.
The implementation of the switch module may include the following:
firstly, an IO protocol conversion scheme based on an FPGA, as shown in fig. 6, the switch module is based on an FPGA instantiated PCIE IP core, and is connected to a system backplane through a PCIE link, the front panel includes a high-speed Serdes, a gigabit network interface is connected to a front panel connector, and an instantiated gigabit network MAC in the FPGA is externally connected to 10/100/1000M adaptive Ethernet through an RGMII interface or an SGMII interface, and reaches an RJ45 connector. The scheme can support the laser radar of a gigabit network interface or a gigabit network interface and can be used as a high-speed IO data channel for system and external communication.
The second is a switching chip scheme based on a PCIE interface, and a schematic structural diagram thereof is shown in fig. 7.
It can be seen that, in this embodiment, a vehicle-mounted road environment data acquisition platform is constructed through the VPX backplane 1, the platform architecture is a platform based on an industrial field standard, the reliability and the environmental adaptability are stronger, and the system is suitable for acquiring target road data in an actual vehicle-mounted environment. In addition, in IO interface arrangement 2 in this application, realize the data conversion of multiple protocol interface through FPGA, need not set up the treater for a certain protocol interface is special, reduce the hardware design degree of difficulty of data acquisition platform, reduce the volume.
Furthermore, the data acquisition platform in this embodiment can realize gathering, storing historical data to multisensor data, and as the data basis of AI model, this framework extension communication interface can realize the data communication and the interaction of terminal, high in the clouds, unmanned computing platform domain controller promptly.
In another aspect, the present application further provides an unmanned system comprising a data acquisition platform as in any of the above.
Please refer to the above embodiments for the introduction of the unmanned system provided in the present application, which is not described herein again.
The application provides an unmanned system, has the same beneficial effect with above-mentioned data acquisition platform.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. The utility model provides a data acquisition platform, its characterized in that, this data acquisition platform includes the VPX backplate, be equipped with bus device on the VPX backplate, this data acquisition platform still include all with IO interface arrangement and the computing device that bus device is connected, wherein:
the IO interface device comprises a plurality of GPIO interfaces and a first FPGA, wherein the first FPGA is used for configuring the GPIO interfaces into target protocol interfaces, and is also used for converting data received by the target protocol interfaces into target data;
and the computing device is used for computing the target data and sending a control instruction to the IO interface device according to a preset control logic.
2. The data collection platform of claim 1, further comprising a data flow tray device, the data flow tray device comprising:
a PCIE crossbar coupled to the bus device;
and the solid-state storage disk module is connected with the PCIE cross switch and is used for storing the data stream of the backboard.
3. The data acquisition platform of claim 2, wherein the solid-state storage disk module comprises multiple m.2 PCIE interface solid-state disks.
4. The data acquisition platform of claim 1, further comprising a camera data acquisition device, the camera data acquisition device comprising:
the FMC module capable of carrying 4-6 paths of 4lane MIPI interfaces is used for acquiring image data and carrying out MIPI signal conversion on the image data;
the second FPGA is connected with the FMC module and the bus device and is used for performing compression operation and/or labeling operation on the image data;
correspondingly, the computing device is further used for computing the image data.
5. The data collection platform of claim 1, further comprising a switch device, the switch device comprising:
an RJ45 connector;
the third FPGA is used for instantiating a PCIE IP core and is connected with the bus device through a PCIE link; the third FPGA is also used to instantiate a gigabit network MAC to the RJ45 connector externally connected to an ethernet via an RGMII interface or an SGMII interface.
6. The data acquisition platform according to claim 1, wherein the bus device comprises a trigger IO bus, a maintenance bus, a low speed bus, a high speed bus, and a PCIE switch.
7. The data acquisition platform of claim 1, wherein the target protocol interface comprises any one of a UART serial port, an I2C interface, and an SPI interface.
8. The data acquisition platform according to any one of claims 1 to 7, wherein the computing device comprises a CPU computing node and an AI accelerated computing node, the CPU computing node comprising a CPU, a memory, a PCH, a BMC, and a CPLD.
9. An unmanned system comprising a data acquisition platform according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011181307.8A CN112181874A (en) | 2020-10-29 | 2020-10-29 | Data acquisition platform and unmanned system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011181307.8A CN112181874A (en) | 2020-10-29 | 2020-10-29 | Data acquisition platform and unmanned system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112181874A true CN112181874A (en) | 2021-01-05 |
Family
ID=73917591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011181307.8A Withdrawn CN112181874A (en) | 2020-10-29 | 2020-10-29 | Data acquisition platform and unmanned system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112181874A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116506524A (en) * | 2023-06-27 | 2023-07-28 | 南京楚航科技有限公司 | Millimeter wave radar data acquisition card and data acquisition control method thereof |
-
2020
- 2020-10-29 CN CN202011181307.8A patent/CN112181874A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116506524A (en) * | 2023-06-27 | 2023-07-28 | 南京楚航科技有限公司 | Millimeter wave radar data acquisition card and data acquisition control method thereof |
| CN116506524B (en) * | 2023-06-27 | 2023-08-25 | 南京楚航科技有限公司 | Millimeter wave radar data acquisition card and data acquisition control method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6571305B1 (en) | System for extending length of a connection to a USB peripheral | |
| US20060149863A1 (en) | System for extending length of a connection to a USB device | |
| CN110865958B (en) | LRM-based integrated switching management module design method | |
| US20090271557A1 (en) | Non-volatile memory storage device with high transmission rate | |
| US11714776B2 (en) | Enabling a multi-chip daisy chain topology using peripheral component interconnect express (PCIe) | |
| CN113347273B (en) | Vehicle-mounted Ethernet data conversion method, device, equipment and medium | |
| CN112181874A (en) | Data acquisition platform and unmanned system | |
| CN114179824B (en) | Unmanned computing system | |
| WO2023124354A1 (en) | Vehicle controller, vehicle, and vehicle control method | |
| CN114401501A (en) | Time service device and time service method for vehicle-mounted unit of V2X, vehicle V2X device and vehicle | |
| CN117640283B (en) | Vehicle-mounted Ethernet analysis system | |
| CN117812104A (en) | Electronic and electric communication device based on intelligent driving domain controller | |
| WO2004093351A3 (en) | Optical network interface systems and devices | |
| Vipin | CANNoC: An open-source NoC architecture for ECU consolidation | |
| CN217048605U (en) | Vehicle controller and vehicle | |
| CN103617145A (en) | User-defined bus and achievement method thereof | |
| CN216565611U (en) | Multi-domain control vehicle networking terminal | |
| US12093089B2 (en) | Generic in-vehicle compute system | |
| CN205692167U (en) | General purpose core core based on PowerPC framework central processing unit | |
| CN110287142B (en) | Multifunctional satellite-borne super-computing device and satellite | |
| CN102902647B (en) | Be arranged on I2C from the asic chip of machine printed circuit board (PCB) and printed circuit board (PCB) | |
| US8447892B1 (en) | PCI-E extended reach with receive detect circuitry | |
| CN221177783U (en) | High-definition image system based on vehicle-mounted Ethernet transmission | |
| CN116279208B (en) | Data processing subsystem, domain controller and vehicle | |
| CN111382100A (en) | Data acquisition method and system of I2C bus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20210105 |