CN112164690A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN112164690A
CN112164690A CN202011048946.7A CN202011048946A CN112164690A CN 112164690 A CN112164690 A CN 112164690A CN 202011048946 A CN202011048946 A CN 202011048946A CN 112164690 A CN112164690 A CN 112164690A
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China
Prior art keywords
layer
substrate
display panel
electrostatic discharge
area
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CN202011048946.7A
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Chinese (zh)
Inventor
陈敏
刘昕昭
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Wuhan Tianma Microelectronics Co Ltd
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Shanghai Tianma AM OLED Co Ltd
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Priority to CN202011048946.7A priority Critical patent/CN112164690A/en
Publication of CN112164690A publication Critical patent/CN112164690A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60Protection against electrostatic charges or discharges, e.g. Faraday shields
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention provides a display panel and a display device, comprising: the first substrate and the second substrate are oppositely arranged; the display area and the binding area are positioned on the periphery of the display area; the display panel comprises a first substrate, a second substrate, a display area, a static electricity release layer and a plurality of notches, wherein the static electricity release layer is arranged between the first substrate and the second substrate and surrounds the display area, the static electricity release layer corresponds to the binding area, an opening is formed in the binding area, the static electricity release layer comprises a plurality of notches which are sequentially arranged along the surrounding direction of the static electricity release layer, and the notches are used for dividing the static electricity release layer into a plurality of static electricity release blocks. According to the technical scheme provided by the invention, the electrostatic discharge layer is divided into the plurality of electrostatic discharge blocks in a slotting mode, so that the accumulation condition of charges in the corner area at the opening of the electrostatic discharge layer can be improved when the ESD ring test is carried out on the display panel. Therefore, the antistatic capacity of the electrostatic discharge layer is improved on the premise of ensuring that the area of the electrostatic discharge layer is basically consistent with that of the electrostatic discharge layer in the prior art.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the continuous development of display technologies, the requirements of consumers on display screens are continuously raised, and various displays are developed endlessly and rapidly, such as liquid crystal displays, organic light emitting displays and the like. On the basis, display technologies such as 3D display, touch display, curved surface display, ultrahigh resolution display and anti-peeping display are emerging continuously to meet the demands of consumers. In a conventional display device, an electrostatic discharge layer is disposed around a display region of the display device, and is applied to an ESD (Electro-Static discharge) loop test process. Wherein the electrostatic discharge layer is often damaged during the ESD ring test.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, which effectively solve the technical problems in the prior art and improve the antistatic capability of an electrostatic discharge layer.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
a display panel, comprising:
the first substrate and the second substrate are oppositely arranged;
the display area and the binding area are positioned on the periphery of the display area;
the display panel comprises a first substrate, a second substrate, a display area, a static electricity release layer and a plurality of notches, wherein the static electricity release layer is arranged between the first substrate and the second substrate and surrounds the display area, the static electricity release layer corresponds to the binding area, an opening is formed in the binding area, the static electricity release layer comprises a plurality of notches which are sequentially arranged along the surrounding direction of the static electricity release layer, and the notches are used for dividing the static electricity release layer into a plurality of static electricity release blocks.
Optionally, the display panel includes a cathode layer, a cathode connection line and/or a ground line;
at least one of the static electricity discharging blocks is electrically connected with the cathode layer, the cathode connecting wire or the grounding wire.
Optionally, the electrostatic discharge block is electrically connected to the cathode layer, the cathode connection line, the common electrode line or the ground line through a plurality of connection lines.
Optionally, the display panel includes a transistor array layer and a light emitting structure layer;
the transistor array layer includes: the first metal layer is positioned on one side of the first substrate, which faces the second substrate, and comprises the electrostatic discharge layer; the interlayer insulating layer is positioned on one side, away from the first substrate, of the first metal layer; the second metal layer is positioned on one side, away from the first substrate, of the interlayer insulating layer and comprises a signal line, and the signal line comprises the cathode connecting line and/or the grounding line; the passivation layer is positioned on one side, away from the first substrate, of the second metal layer;
and, the light emitting structure layer includes: the planarization layer is positioned on one side, away from the first substrate, of the passivation layer; the pixel definition layer is positioned on one side, away from the first substrate, of the planarization layer and comprises a plurality of light emitting openings, anodes, light emitting layers and cathodes are sequentially superposed in the light emitting openings, and all the cathodes are connected to form the cathode layer.
Optionally, the interlayer insulating layer includes a plurality of first via holes; and/or the stack of the passivation layer, the planarization layer and the pixel defining layer comprises a plurality of second vias;
the static electricity discharging block is electrically connected with the cathode connecting wire or the grounding wire through the first through hole, or the static electricity discharging block is connected with the cathode layer through the second through hole.
Optionally, the display panel further includes:
the packaging layer is positioned on one side of the passivation layer, which is far away from the first substrate, and is arranged opposite to the electrostatic discharge layer; the surface of one side of the static electricity releasing layer, which is far away from the first substrate, is a reflecting surface.
Optionally, the transistor array layer includes a connection hole penetrating through the electrostatic discharge block from the passivation layer, and the encapsulation layer extends into the connection hole toward the first substrate.
Optionally, the electrostatic discharge layer includes a first extension portion extending along a first direction and a second extension portion extending along a second direction, and the first direction and the second direction intersect;
the notch is included at the intersection of the first extension and the second extension.
Optionally, the areas of any two electrostatic discharge blocks are defined as a first area and a second area;
wherein the ratio of the difference between the first area and the second area to the second area is not more than 50%, and the first area is greater than or equal to the second area.
Optionally, the width of the kerf ranges from 10 μm to 20 μm, inclusive.
Correspondingly, the invention further provides a display device which comprises the display panel.
Compared with the prior art, the technical scheme provided by the invention at least has the following advantages:
the invention provides a display panel and a display device, comprising: the first substrate and the second substrate are oppositely arranged; the display area and the binding area are positioned on the periphery of the display area; the display panel comprises a first substrate, a second substrate, a display area, a static electricity release layer and a plurality of notches, wherein the static electricity release layer is arranged between the first substrate and the second substrate and surrounds the display area, the static electricity release layer corresponds to the binding area, an opening is formed in the binding area, the static electricity release layer comprises a plurality of notches which are sequentially arranged along the surrounding direction of the static electricity release layer, and the notches are used for dividing the static electricity release layer into a plurality of static electricity release blocks.
As can be seen from the above, according to the technical solution provided by the present invention, the ESD layer is divided into a plurality of ESD blocks by a slit method, so that when the ESD ring test is performed on the display panel, the accumulation of charges in the corner region at the opening of the ESD layer can be improved. Therefore, the antistatic capacity of the electrostatic discharge layer is improved on the premise of ensuring that the area of the electrostatic discharge layer is basically consistent with that of the electrostatic discharge layer in the prior art.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background, in the conventional display device, an electrostatic discharge layer is disposed around a display region of the display device, and is applied to an ESD loop test process. Wherein the electrostatic discharge layer is often damaged during the ESD ring test. Specifically, the display device comprises an electrostatic discharge layer surrounding a display area of the display device and a binding area positioned on one side of the display area, wherein the electrostatic discharge layer is provided with a disconnected opening at the binding area; in the ESD ring test process, when the electrostatic gun discharges the edge of the display panel, the electrostatic discharge layer can dissipate static electricity; however, since the electrostatic discharge layer is provided with an opening at the bonding region, the electrostatic discharge path is blocked at this point, and charges are accumulated at the corner region at this point, so that the electrostatic discharge layer is easily damaged.
Accordingly, the embodiment of the invention provides a display panel and a display device, which effectively solve the technical problems in the prior art and improve the antistatic capability of an electrostatic discharge layer. To achieve the above object, the technical solutions provided by the embodiments of the present invention are described in detail below, specifically with reference to fig. 1 to 12.
Referring to fig. 1, a schematic structural diagram of a display panel according to an embodiment of the present invention is shown, where the display panel includes:
a first substrate (not shown) and a second substrate (not shown) disposed opposite to each other.
A display area AA and a binding area BN positioned at the periphery of the display area AA.
The electrostatic discharge layer is located between the first substrate and the second substrate and arranged around the display area AA, an opening 101 is formed in the position, corresponding to the binding area BN, of the electrostatic discharge layer, the electrostatic discharge layer includes a plurality of notches 101 sequentially arranged along the surrounding direction of the electrostatic discharge layer, and the plurality of notches 102 are used for dividing the electrostatic discharge layer into a plurality of electrostatic discharge blocks 103.
It can be understood that the display panel provided in the embodiment of the present invention includes a display area AA and a frame area NA located at a periphery of the display area, where the frame area NA may be disposed around the display area AA. The electrostatic discharge layer and the binding region BN are disposed in the frame region NA, and the electrostatic discharge layer is broken at the position corresponding to the binding region BN and is provided with an opening 101.
The electrostatic discharge block provided by the embodiment of the invention is obtained by dividing the electrostatic discharge layer through slotting treatment, so that the area of all the electrostatic discharge blocks provided by the invention is basically consistent with that of the electrostatic discharge layer, and the antistatic capability of the electrostatic discharge block is improved under the condition of ensuring that the area of the electrostatic discharge layer is basically unchanged. In one embodiment of the present invention, the width of the slit provided by the present invention is in a range of 10 μm to 20 μm, inclusive.
According to the technical scheme provided by the embodiment of the invention, the electrostatic discharge layer is divided into the plurality of electrostatic discharge blocks in a slotting mode, and each electrostatic discharge block can independently discharge the static electricity when an ESD ring test is carried out on the display panel, so that the problem that the static electricity flows to the opening of the electrostatic discharge layer and is blocked to cause the accumulation of the charges in the corner area of the opening in the prior art is solved, and the purpose of improving the accumulation condition of the charges in the corner area of the opening of the electrostatic discharge layer is achieved. Therefore, the electrostatic discharge layer provided by the embodiment of the invention improves the antistatic capability of the electrostatic discharge layer on the premise of ensuring that the area of the electrostatic discharge layer is basically consistent with that of the electrostatic discharge layer in the prior art.
In an embodiment of the invention, in order to further improve the electrostatic discharge capability of the electrostatic discharge block, the electrostatic discharge block provided by the invention can be further connected with a low voltage signal line in the display panel to accelerate the electrostatic discharge speed in the electrostatic discharge block. The display panel provided by the embodiment of the invention can be a liquid crystal display panel, an organic light emitting display panel and the like, the display panel comprises a cathode layer, a cathode connecting wire, a grounding wire and other low-voltage circuits, and further, the static electricity releasing block is connected with the low-voltage circuits, when static electricity is input on the static electricity releasing block, the static electricity can be released to the low-voltage circuits through the static electricity releasing block, and the static electricity releasing speed of the static electricity releasing block is improved.
Specifically, as shown in fig. 2, a schematic structural diagram of another display panel provided in the embodiment of the present invention is shown, wherein the display panel provided in the embodiment of the present invention includes a cathode layer 104, a cathode connection line PVEE, and/or a ground line GND. At least one of the electrostatic discharge blocks 103 is electrically connected to the cathode layer 104, the cathode connection line PVEE, or the ground line GND.
It can be understood that the low voltage lines such as the cathode layer, the cathode connection line, and the ground line provided in the embodiment of the present invention may be disposed in the surrounding region of the electrostatic discharge layer, wherein the cathode layer may be a whole electrode structure covering the display region, the cathode connection line and/or the ground line may be disposed in a surrounding display region-like line and connected to the bonding region, and the cathode connection line is connected to the cathode layer.
When the electrostatic discharge block provided by the embodiment of the invention is arranged on the same layer as the low-voltage lines such as the cathode layer, the cathode connecting line, the grounding line and the like, the electrostatic discharge block and/or the low-voltage lines can be provided with the extension part so that the electrostatic discharge block is connected with the low-voltage lines; or when the electrostatic discharge block is arranged in different layers with the low-voltage lines such as the cathode layer, the cathode connecting wire and the grounding wire, the electrostatic discharge block and the low-voltage lines can be connected through the through holes.
In addition, all the electrostatic discharge blocks provided by the embodiment of the invention can be connected with the same low-voltage circuit, for example, all the electrostatic discharge blocks are connected with the cathode layer, all the electrostatic discharge blocks are connected with the cathode connecting wire or all the electrostatic discharge blocks are connected with the ground wire; or, all the electrostatic discharge blocks are grouped, the electrostatic discharge blocks of each group are connected with the same low-voltage line, and the types of the low-voltage lines connected with the electrostatic discharge blocks of different groups are different, so that the invention is not particularly limited, and a specific connection design is required according to practical application.
Fig. 3 is a schematic structural diagram of another display panel according to an embodiment of the present invention, wherein the electrostatic discharge block 103 and the cathode layer 104, the cathode connection line PVEE or the ground line GND according to the embodiment of the present invention are electrically connected by a plurality of connection lines 105.
It can be understood that the electrostatic discharge block provided by the embodiment of the present invention is connected to the cathode layer, the cathode connection line, the ground line and other low voltage lines through the plurality of connection lines, so as to expand a transmission path from the electrostatic discharge block to the low voltage lines, further increase an electrostatic discharge speed of the electrostatic discharge block, and further improve an antistatic capability of the electrostatic discharge layer. Optionally, the width of the connection line between the electrostatic discharge block and the low-voltage lines such as the cathode layer, the cathode connection line, and the ground line provided in the embodiment of the present invention may be optimally designed to reduce the impedance of the connection line, further improve the charge transfer capability, and achieve the purpose of improving the electrostatic discharge speed.
As shown in fig. 4, which is a schematic structural diagram of another display panel provided in an embodiment of the present invention, wherein the display panel provided in the embodiment of the present invention may be an organic light emitting display panel, and the display panel includes a transistor array layer and a light emitting structure layer;
the transistor array layer includes: the first metal layer 31 is located on a side of the first substrate 10 facing the second substrate 20, the first metal layer 31 includes the electrostatic discharge layer, wherein the first metal layer 31 further includes a Gate constituting a thin film transistor TFT, and the electrostatic discharge block 103 and the Gate are on the same layer provided in the embodiment of the present invention. An interlayer insulating layer 32 positioned on one side of the first metal layer 31, which is far away from the first substrate 10; and a second metal layer 33 disposed on a side of the interlayer insulating layer 32 facing away from the first substrate 10, wherein the second metal layer 33 includes a signal line, and the signal line includes the cathode connection line PVEE and/or the ground line GND, and the second metal layer 33 includes a Source and a Drain constituting the TFT, and the cathode connection line PVEE and/or the ground line GND are disposed on the same layer as the Source and the Drain. A passivation layer 34 on a side of the second metal layer 33 facing away from the first substrate 10.
And, the light emitting structure layer includes: a planarization layer 41 on a side of the passivation layer 34 facing away from the first substrate 10; and a pixel defining layer 42 on a side of the planarization layer 41 away from the first substrate 10, wherein the pixel defining layer 42 includes a plurality of light emitting openings, and an anode 43, a light emitting layer 44 and a cathode 45 are sequentially stacked in the light emitting openings, and all the cathodes 45 are connected to form the cathode layer 104.
In an embodiment of the present invention, the thin film transistor TFT provided in the embodiment of the present invention may be a top gate thin film transistor TFT, wherein the transistor array layer further includes a semiconductor layer 35 located between the first metal layer 31 and the first substrate 10, and the semiconductor layer 35 includes an active region constituting the transistor TFT; and a gate insulating layer 36 between the semiconductor layer 35 and the first metal layer 31. In addition, the thin film transistor provided in the embodiment of the present invention may also be a bottom gate thin film transistor, that is, the semiconductor layer of the transistor array layer is disposed between the first metal layer and the interlayer insulating layer, and the gate insulating layer is disposed between the first metal layer and the semiconductor layer, which is not described in detail herein.
As shown in fig. 4, the display panel according to the embodiment of the present invention further includes a buffer layer 51 located between the first substrate 10 and the semiconductor layer 35, and the buffer layer can block impurities from entering the semiconductor layer, so as to ensure high quality of the semiconductor layer. The display panel provided by the embodiment of the invention further includes a light shielding layer 52 located between the first substrate 10 and the buffer layer 51, and the light shielding layer includes a plurality of shielding blocks corresponding to the active region and used for preventing the light source from entering the active region, so as to avoid the situation that the performance of the transistor is affected by the light source entering the active region.
The display panel further includes an encapsulation film 60 located on a side of the cathode layer 104 away from the first substrate 10, and the encapsulation film 60 is used for covering and encapsulating the light emitting device composed of the planarization layer 41, the pixel defining layer 42, the anode 43, the light emitting layer 44 and the cathode 45, which is not described in detail herein.
It should be noted that the organic light emitting display panel structure shown in fig. 4 is only one of all organic light emitting display panel structures to which the present invention is applicable, and the present invention is not limited in particular.
Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention, wherein the interlayer insulating layer 32 includes a plurality of first vias 321; the electrostatic discharge block 103 is electrically connected to the cathode connection line PVEE or the ground line GND through the first via 321.
And/or, as shown in fig. 6, a structural schematic view of another display panel provided in the embodiment of the present invention is provided, wherein the stack of the passivation layer 34, the planarization layer 51 and the pixel definition layer 52 provided in the embodiment of the present invention includes a plurality of second via holes 322, and the electrostatic discharge block 103 and the cathode layer 104 are connected through the second via holes 322.
It can be understood that, when the electrostatic discharge block provided by the embodiment of the present invention is disposed in different layers with respect to the low voltage lines such as the cathode layer, the cathode connection line, and the ground line, the via hole is disposed in the layer structure between the electrostatic discharge block and the low voltage line, and the electrostatic discharge block can be connected to the low voltage lines such as the cathode layer, the cathode connection line, and the ground line through the via hole. The connecting line between the electrostatic discharge block and the low voltage line may be the same layer as the electrostatic discharge block, or the connecting line may be the same layer as the low voltage line, which is not limited in the present invention.
In an embodiment of the present invention, an encapsulation layer may be further disposed between the first substrate and the second substrate of the display panel provided by the present invention. As shown in fig. 7, which is a schematic structural diagram of another display panel provided in an embodiment of the present invention, in a frame region, the display panel provided in the embodiment of the present invention further includes:
the packaging layer 70 is positioned on the side of the passivation layer 34, which faces away from the first substrate 10, and is arranged opposite to the electrostatic discharge layer, namely the packaging layer 70 is positioned between the electrostatic discharge block 103 and the second substrate 20; the surface of the electrostatic discharge layer on the side away from the first substrate 10 is a reflection surface. Optionally, the encapsulation layer 70 provided by the embodiment of the present invention is located at the edge of the frame region and outside the edge of the encapsulation film 60.
It can be understood that, in the organic light emitting display panel provided in the embodiment of the present invention, the two opposite side plates may be bonded and sealed by an encapsulation layer, where the encapsulation layer is generally a frit, and in the manufacturing process, the frit is irradiated by laser to heat and melt the frit, so as to bond the upper substrate and the lower substrate together. Furthermore, the surface of the electrostatic discharge block on the side away from the first substrate is a reflection surface, so that when laser is irradiated into the organic light-emitting display panel from the side of the second substrate, the laser can be reflected to the encapsulation layer again through the electrostatic discharge block, and a better laser irradiation effect on the encapsulation layer is achieved.
Further referring to fig. 8 and 9, fig. 8 and 9 are schematic structural diagrams of another display panel according to an embodiment of the present invention, respectively, wherein the transistor array layer includes a connection hole 1031 penetrating through the electrostatic discharge block 103 from the passivation layer 34, and the encapsulation layer 70 extends into the connection hole 1031 toward the first substrate 10 side.
It can be understood that, in the technical scheme provided by the embodiment of the invention, the connection hole is formed in the region of the electrostatic discharge block corresponding to the packaging layer, and the packaging layer is filled and extended into the connection hole, so that the bonding strength of the packaging layer can be improved, and the packaging effect can be improved. The connecting hole provided by the embodiment of the invention can be in any shape such as a strip-shaped hole, a round hole and the like, and the invention is not particularly limited; in addition, the number of the connection holes corresponding to each electrostatic discharge block is not particularly limited in the embodiments of the present invention.
As shown in fig. 10, which is a schematic structural diagram of another display panel provided in an embodiment of the present invention, wherein the electrostatic discharge layer provided in the embodiment of the present invention includes a first extending portion extending along a first direction X and a second extending portion extending along a second direction Y, and the first direction X intersects with the second direction Y.
The notch 1021 is included at the intersection of the first extension and the second extension.
It can be understood that, when the electrostatic discharge layer is slotted, the slotted position includes a corner position of the electrostatic discharge layer, so that the number of corners on the obtained electrostatic discharge block can be reduced, and the occurrence of a damage condition caused by the fact that the corners are easy to accumulate charges can be reduced.
In any of the above embodiments of the present invention, the areas of any two of the electrostatic discharge blocks provided by the present invention are defined as a first area and a second area. Wherein the ratio of the difference between the first area and the second area to the second area is not more than 50%, and the first area is greater than or equal to the second area. And then through optimizing the area of the static electricity discharge block, guarantee that the static bearing capacity of each static electricity discharge block tends to unanimous, improve the antistatic ability of static electricity discharge layer. Optionally, the area of each electrostatic discharge block provided by the embodiment of the present invention tends to be the same.
In any of the above embodiments of the present invention, the border of the notch provided by the present invention may be linear, such as the border of the notch 102 shown in fig. 1. Alternatively, as shown in fig. 11, the edge of the notch 102 provided in the embodiment of the present invention may also be wavy, and the present invention is not limited thereto. In addition, the invention also does not specifically limit the direction of the notch, and all the notches can extend along the same direction; or different notches extend in different directions; or the directions of partial notches are the same, but the directions of partial notches are different, and the specific design is carried out according to the actual application.
Correspondingly, the embodiment of the invention also provides a display device, and the display device comprises the display panel provided by any one of the above embodiments.
Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention, where the display device 100 according to the embodiment of the present invention may be a mobile terminal.
In other embodiments of the present invention, the display device provided by the present invention may also be a computer, a wearable device, and the like, and the present invention is not limited thereto.
The embodiment of the invention provides a display panel and a display device, comprising: the first substrate and the second substrate are oppositely arranged; the display area and the binding area are positioned on the periphery of the display area; the display panel comprises a first substrate, a second substrate, a display area, a static electricity release layer and a plurality of notches, wherein the static electricity release layer is arranged between the first substrate and the second substrate and surrounds the display area, the static electricity release layer corresponds to the binding area, an opening is formed in the binding area, the static electricity release layer comprises a plurality of notches which are sequentially arranged along the surrounding direction of the static electricity release layer, and the notches are used for dividing the static electricity release layer into a plurality of static electricity release blocks.
As can be seen from the above, in the technical solution provided in the embodiments of the present invention, the ESD layer is divided into a plurality of ESD blocks by a slit method, so that when the ESD ring test is performed on the display panel, the accumulation of charges in the corner region at the opening of the ESD layer can be improved. Therefore, the electrostatic discharge layer provided by the embodiment of the invention improves the antistatic capability of the electrostatic discharge layer on the premise of ensuring that the area of the electrostatic discharge layer is basically consistent with that of the electrostatic discharge layer in the prior art.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (11)

1. A display panel, comprising:
the first substrate and the second substrate are oppositely arranged;
the display area and the binding area are positioned on the periphery of the display area;
the display panel comprises a first substrate, a second substrate, a display area, a static electricity release layer and a plurality of notches, wherein the static electricity release layer is arranged between the first substrate and the second substrate and surrounds the display area, the static electricity release layer corresponds to the binding area, an opening is formed in the binding area, the static electricity release layer comprises a plurality of notches which are sequentially arranged along the surrounding direction of the static electricity release layer, and the notches are used for dividing the static electricity release layer into a plurality of static electricity release blocks.
2. The display panel according to claim 1, wherein the display panel comprises a cathode layer, a cathode connection line, and/or a ground line;
at least one of the static electricity discharging blocks is electrically connected with the cathode layer, the cathode connecting wire or the grounding wire.
3. The display panel according to claim 2, wherein the electrostatic discharge block is electrically connected to the cathode layer, a cathode connection line, or a ground line via a plurality of connection lines.
4. The display panel according to claim 2, wherein the display panel comprises a transistor array layer and a light emitting structure layer;
the transistor array layer includes: the first metal layer is positioned on one side of the first substrate, which faces the second substrate, and comprises the electrostatic discharge layer; the interlayer insulating layer is positioned on one side, away from the first substrate, of the first metal layer; the second metal layer is positioned on one side, away from the first substrate, of the interlayer insulating layer and comprises a signal line, and the signal line comprises the cathode connecting line and/or the grounding line; the passivation layer is positioned on one side, away from the first substrate, of the second metal layer;
and, the light emitting structure layer includes: the planarization layer is positioned on one side, away from the first substrate, of the passivation layer; the pixel definition layer is positioned on one side, away from the first substrate, of the planarization layer and comprises a plurality of light emitting openings, anodes, light emitting layers and cathodes are sequentially superposed in the light emitting openings, and all the cathodes are connected to form the cathode layer.
5. The display panel according to claim 4, wherein the interlayer insulating layer includes a plurality of first via holes; and/or the stack of the passivation layer, the planarization layer and the pixel defining layer comprises a plurality of second vias;
the static electricity discharging block is electrically connected with the cathode connecting wire or the grounding wire through the first through hole, or the static electricity discharging block is connected with the cathode layer through the second through hole.
6. The display panel according to claim 4, characterized in that the display panel further comprises:
the packaging layer is positioned on one side of the passivation layer, which is far away from the first substrate, and is arranged opposite to the electrostatic discharge layer; the surface of one side of the static electricity releasing layer, which is far away from the first substrate, is a reflecting surface.
7. The display panel according to claim 6, wherein the transistor array layer includes a connection hole penetrating through the electrostatic discharge block from the passivation layer, and the encapsulation layer extends into the connection hole toward the first substrate side.
8. The display panel according to claim 1, wherein the electrostatic discharge layer includes a first extending portion extending in a first direction and a second extending portion extending in a second direction, the first direction and the second direction intersecting;
the notch is included at the intersection of the first extension and the second extension.
9. The display panel according to claim 1, wherein the areas of any two of the electrostatic discharge blocks are defined as a first area and a second area;
wherein the ratio of the difference between the first area and the second area to the second area is not more than 50%, and the first area is greater than or equal to the second area.
10. The display panel of claim 1, wherein the width of the slits is in the range of 10 μ ι η to 20 μ ι η, inclusive.
11. A display device characterized in that it comprises a display panel according to any one of claims 1 to 10.
CN202011048946.7A 2020-09-29 2020-09-29 Display panel and display device Pending CN112164690A (en)

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