CN112162618A - Adaptive memory compatible overclocking application method - Google Patents
Adaptive memory compatible overclocking application method Download PDFInfo
- Publication number
- CN112162618A CN112162618A CN202010843199.XA CN202010843199A CN112162618A CN 112162618 A CN112162618 A CN 112162618A CN 202010843199 A CN202010843199 A CN 202010843199A CN 112162618 A CN112162618 A CN 112162618A
- Authority
- CN
- China
- Prior art keywords
- ddr3l
- ddr4
- power supply
- memory
- application method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Sources (AREA)
Abstract
The invention discloses a self-adaptive memory compatible overclocking application method, which comprises the following steps: setting a power supply switching device, and selecting a corresponding power supply circuit according to the voltage requirements of different memory banks; modifying the SPD value of the DDR3L, and re-burning to obtain DDR3L with the same frequency as the DDR 4; and inserting the re-burned DDR3L into the mainboard with the DDR4 slot through an adapter platelet. The method can realize the flexible replacement of the memory bank of the same platform, can achieve higher configuration application at lower cost, and improves economic benefit.
Description
Technical Field
The invention relates to a self-adaptive memory compatible overclocking application method.
Background
With the continuous progress and development of society and the continuous forward progress of the requirements of science and technology products, the requirements on the functions and the performances of computers are higher and higher. Computer performance is enhanced by various configuration updates, and memory banks are essential major components in computer configurations. However, with the updating of the memory banks, different memory banks have respective power supply requirements and frequency differences, and for most notebook computers, only one memory bank can be supported, for example, a current common DDR3L memory bank with 1.35V power supply or a current DDR4 memory bank with 1.2V power supply cannot be compatible with the use of other memory banks, and cannot be flexibly replaced.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide an adaptive memory compatible overclocking application method, which can realize flexible replacement of memory banks of the same platform, and can achieve higher configuration application at lower cost, thereby improving economic benefits.
The invention is realized by the following steps: a self-adaptive memory compatible overclocking application method comprises the following steps:
setting a power supply switching device, and selecting a corresponding power supply circuit according to the voltage requirements of different memory banks;
modifying the SPD value of the DDR3L, and re-burning to obtain DDR3L with the same frequency as the DDR 4;
and inserting the re-burned DDR3L into the mainboard with the DDR4 slot through an adapter platelet.
Further, the power supply switching device specifically includes: a3 PIN seat jump cap is arranged on the mainboard memory power supply module, when the mainboard is plugged with the DDR4, the jump cap is selectively connected with the PIN1 and the PIN2, and when the mainboard is plugged with the DDR3L, the jump cap is selectively connected with the PIN2 and the PIN 3.
Furthermore, a DDR4 structure golden finger and a DDR3L slot which are connected with each other are arranged on the adapter platelet, a useful signal pin of the DDR3L in the DDR4 structure golden finger is correspondingly connected with the DDR3L slot, and a useless signal pin is subjected to idle processing.
Further, the "modifying the SPD value of the DDR 3L" is specifically that if the frequency of the DDR4 is 2133, the SPD information of the DDR3L memory bank is read, the bit 12 content of the SPD value is modified to 08, the bit 34 content of the Byte is modified to C2, if the frequency of the DDR4 is 1866, the SPD information of the DDR3L memory bank is read, the bit 12 content of the SPD value is modified to 09, and the bit 34 content of the Byte is modified to CA.
The invention has the advantages that: through structure compatible design and memory overclocking application, the DDR3L structure is unchanged, the performance is improved to the performance of DDR4, the DDR4 is replaced to be inserted into a mainboard for use, the flexibility of selecting the memory bank of the same platform is good, high configuration can be achieved with low cost, and economic benefits are improved.
Drawings
The invention will be further described with reference to the following examples with reference to the accompanying drawings.
Fig. 1 is a flowchart illustrating an implementation of an adaptive memory compatible turbo application method according to the present invention.
Fig. 2 is a schematic structural diagram of a power supply switching device according to an embodiment of the invention.
Fig. 3 is a schematic structural diagram of an adaptor board according to an embodiment of the invention.
Detailed Description
Referring to fig. 1, an adaptive memory compatible turbo application method of the present invention can be applied to a motherboard (such as a notebook computer) with a DDR4 socket, and the method specifically includes:
setting a power supply switching device, and selecting a corresponding power supply circuit according to the voltage requirements of different memory banks;
modifying the SPD value of the DDR3L, and re-burning to obtain DDR3L with the same frequency as the DDR 4;
and inserting the re-burned DDR3L into the mainboard with the DDR4 slot through a small adapter plate 1.
In an embodiment, the power supply switching device specifically includes: the main board memory power supply module is provided with a 3PIN seat jump cap, as shown in fig. 2, voltage switching is realized through the 3PIN seat jump cap, when the main board is plugged with DDR4, the jump cap is selectively connected with PIN1 and PIN2, 1.2V voltage is output to be used by DDR4, when the main board is plugged with DDR3L, the jump cap is selectively connected with PIN2 and PIN3, and 1.35V voltage is output to be used by DDR3L, so that power supply requirements of memory banks of two different specifications are met.
In a specific embodiment, as shown in fig. 3, the patch panel 1 is provided with a DDR4 structure gold finger 11 and a DDR3L slot 12 that are connected to each other, a useful signal pin of the DDR3L in the DDR4 structure gold finger is connected to the DDR3L slot correspondingly, and a useless signal pin is idle. The DDR4 structure golden finger of the structural design of the patch panel is plugged with a DDR4 slot which is inherent on a mainboard, a DDR3L slot 12 is correspondingly connected with a DDR3L memory bank 13, because DDR4 signals in signals coming out of a CPU from DDR3L and DDR4 comprise DDR3L signals, most of the signals connected with DDR4 and DDR3L are the same, the internal signal connection mode of the patch panel is connected according to signals used by DDR3L, specifically, as shown in the signal corresponding relation between DDR3L and DDR4 shown in table 1, according to the difference of the signal pins of the DDR3L, the useful signal pin of the DDR L is connected with the signal pin corresponding to the DDR4, and idle processing is performed on signals which are not needed by the DDR 3L.
TABLE 1
In a specific embodiment, the "modifying the SPD value of the DDR 3L" is specifically that if the frequency of the DDR4 is 2133, the SPD information of the DDR3L memory bank is read, the bit content of the Byte12 of the SPD value is modified to 08, the bit content of the Byte34 is modified to C2, if the frequency of the DDR4 is 1866, the SPD information of the DDR3L memory bank is read, the bit content of the Byte12 of the SPD value is modified to 09, and the bit content of the Byte34 is modified to CA. In general, the DDR4 memory bank frequency is 2133-: reading the SPD information of a DDR3L memory bank, modifying bit 12 content 0A of the read SPD value into 08 according to JEDEC specifications, modifying bit 34 content 00 of the read SPD value into C2, and then burning the SPD again, wherein the frequency of DDR3L rises to 2133 after burning. If the frequency of the used DDR4 is 1866, and the frequency of the DDR3L memory bank is 1600, similarly, the SPD information of the DDR3L memory bank is read, the bit content 0A of the Byte12 is modified into 09, the bit content 00 of the Byte34 is modified into CA, and the DDR3L with the same frequency as that of the DDR4 can be obtained through re-burning. In summary, the overclocking process needs to satisfy the condition that the final DDR3L frequency is the same as the DDR4 frequency.
TABLE 2
The design of the invention is divided into three parts, the first part provides DDR4 and DDR3L power supply voltage at the end of a main board to realize the power supply compatibility of the memory bank, the second part provides a switching small board to realize the structural compatibility of the memory bank, the third part realizes the DDR3L memory overclocking application, and the DDR3L frequency reaches the DDR4 frequency so as to be self-adapted to the main board, the method of the invention realizes that the same main board is compatible with the memory bank made of two different particles, the self-adaptation is met through the structural compatibility design and the memory overclocking application, so that the main board which originally only supports DDR4 can use both DDR4 and DDR3L, and the replacement is flexible; the DDR3L memory can achieve the performance of DDR4 after being applied with overclocking, the low-cost and high-configuration effects are achieved, and the economic benefit of products is improved.
Although specific embodiments of the invention have been described above, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the appended claims.
Claims (4)
1. A self-adaptive memory compatible overclocking application method is characterized in that: the method comprises the following steps:
setting a power supply switching device, and selecting a corresponding power supply circuit according to the voltage requirements of different memory banks;
modifying the SPD value of the DDR3L, and re-burning to obtain DDR3L with the same frequency as the DDR 4;
and inserting the re-burned DDR3L into the mainboard with the DDR4 slot through an adapter platelet.
2. The adaptive memory compatible turbo application method of claim 1, wherein: the power supply switching device specifically comprises: a3 PIN seat jump cap is arranged on the mainboard memory power supply module, when the mainboard is plugged with the DDR4, the jump cap is selectively connected with the PIN1 and the PIN2, and when the mainboard is plugged with the DDR3L, the jump cap is selectively connected with the PIN2 and the PIN 3.
3. The adaptive memory compatible turbo application method of claim 1, wherein: the small switch board is provided with a DDR4 structure golden finger and a DDR3L slot which are mutually connected, a useful signal pin of the DDR3L in the DDR4 structure golden finger is correspondingly connected with the DDR3L slot, and a useless signal pin is subjected to idle processing.
4. The adaptive memory compatible turbo application method of claim 1, wherein: the "modifying the SPD value of the DDR 3L" is specifically that, if the frequency of the DDR4 is 2133, the SPD information of the DDR3L memory bank is read, the bit 12 content of the SPD value is modified to 08, the bit 34 content of the Byte is modified to C2, if the frequency of the DDR4 is 1866, the SPD information of the DDR3L memory bank is read, the bit 12 content of the SPD value is modified to 09, and the bit 34 content of the Byte is modified to CA.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010843199.XA CN112162618A (en) | 2020-08-20 | 2020-08-20 | Adaptive memory compatible overclocking application method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010843199.XA CN112162618A (en) | 2020-08-20 | 2020-08-20 | Adaptive memory compatible overclocking application method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN112162618A true CN112162618A (en) | 2021-01-01 |
Family
ID=73859642
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010843199.XA Pending CN112162618A (en) | 2020-08-20 | 2020-08-20 | Adaptive memory compatible overclocking application method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112162618A (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200713267A (en) * | 2005-09-06 | 2007-04-01 | Giga Byte Tech Co Ltd | A memory card signal transforming card and the mother board using the same |
CN207946737U (en) * | 2017-12-29 | 2018-10-09 | 深圳微步信息股份有限公司 | Mainboard, mainboard assembly and electronic equipment |
CN208588979U (en) * | 2018-06-18 | 2019-03-08 | 平庆路 | A kind of memory that stability is high |
CN211207228U (en) * | 2019-11-05 | 2020-08-07 | 福建升腾资讯有限公司 | Device for adaptively matching L PDDR4 memory bank and DDR4 memory bank |
-
2020
- 2020-08-20 CN CN202010843199.XA patent/CN112162618A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW200713267A (en) * | 2005-09-06 | 2007-04-01 | Giga Byte Tech Co Ltd | A memory card signal transforming card and the mother board using the same |
CN207946737U (en) * | 2017-12-29 | 2018-10-09 | 深圳微步信息股份有限公司 | Mainboard, mainboard assembly and electronic equipment |
CN208588979U (en) * | 2018-06-18 | 2019-03-08 | 平庆路 | A kind of memory that stability is high |
CN211207228U (en) * | 2019-11-05 | 2020-08-07 | 福建升腾资讯有限公司 | Device for adaptively matching L PDDR4 memory bank and DDR4 memory bank |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7762818B2 (en) | Multi-function module | |
US6301104B1 (en) | Interface card-type motherboard for a computer | |
US20090257184A1 (en) | Dram module with solid state disk | |
US20120320538A1 (en) | Serial advanced technology attachment dimm | |
CN101470584A (en) | Hard disk expansion apparatus | |
US20130164952A1 (en) | Display card assembly | |
US20070139898A1 (en) | System motherboard having expansibility and variability | |
US20140126138A1 (en) | Serial advanced technology attachment dual in-line memory module device and motherboard for supporting the same | |
US7623355B2 (en) | Extended universal serial bus connectivity | |
CN101211649A (en) | Dynamic RAM module possessing solid magnetic disc | |
TW201011549A (en) | Computer system having RAM slots with different specification | |
TW502197B (en) | Device and method for automatically detecting USB and PS/2 dual-purposed computer keyboard | |
US8514603B2 (en) | Serial advanced technology attachment dual in-line memory module | |
CN112162618A (en) | Adaptive memory compatible overclocking application method | |
US20130170128A1 (en) | Motherboard | |
US6827589B2 (en) | Motherboard with a 4-pin ATX power male connector | |
US20110258492A1 (en) | Device for testing serial interface | |
CN104679172A (en) | Motherboard for supporting hybrid-type storage device | |
CN109062385B (en) | Motherboard and computer based on Feiteng processor | |
US7159104B2 (en) | Simplified memory detection | |
CN218213950U (en) | Mainboard based on godson LS7A2000 controller | |
CN216286533U (en) | High-performance computing mainboard and equipment | |
CN220305792U (en) | Switching structure and verification system | |
CN220305791U (en) | Switching structure and verification system | |
CN220933447U (en) | Multifunctional expansion board based on COM-Express |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210101 |
|
RJ01 | Rejection of invention patent application after publication |