CN112151481A - Surface-enhanced boiling heat dissipation structure - Google Patents

Surface-enhanced boiling heat dissipation structure Download PDF

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Publication number
CN112151481A
CN112151481A CN202010872202.0A CN202010872202A CN112151481A CN 112151481 A CN112151481 A CN 112151481A CN 202010872202 A CN202010872202 A CN 202010872202A CN 112151481 A CN112151481 A CN 112151481A
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chip
boiling
cover plate
microstructure
layer
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CN112151481B (en
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默蓬勃
沈卫东
伊波力
郭双江
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Sugon Energy Saving Technology Beijing Co ltd
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Sugon Energy Saving Technology Beijing Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/44Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements the complete device being wholly immersed in a fluid other than air
    • H01L23/445Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements the complete device being wholly immersed in a fluid other than air the fluid being a liquefied gas, e.g. in a cryogenic vessel

Abstract

The application discloses boiling heat radiation structure is reinforceed on surface, heat radiation structure is applicable to the chip in the submergence formula liquid cooling server, and heat radiation structure sets up in the chip upper surface, and heat radiation structure includes the boiling microstructure, and wherein, the boiling microstructure is the evaporation core quantity of arch in order to increase the chip upper surface. Through the technical scheme in this application, set up the boiling microstructure at the smooth surface of chip silicon substrate to increase the vaporization core quantity in the liquid refrigerant boiling process, make the liquid refrigerant boiling process in can produce more bubbles, improve evaporation cooling's radiating effect.

Description

Surface-enhanced boiling heat dissipation structure
Technical Field
The application relates to the technical field of chips, in particular to a surface-enhanced boiling heat dissipation structure.
Background
With the increasing requirements on data and graphic processing efficiency, the heat dissipation problem of data processing chips such as CPU and GPU is more and more severe, and the heat flow density of the GPU of the supercomputer reaches 80W/cm2The conventional air-cooled heat dissipation method cannot solve the heat dissipation problem caused by such high heat flux density.
Therefore, liquid-cooled heat dissipation is gradually introduced. The heat dissipation method using the latent heat of liquid boiling and vaporization of a refrigerant in liquid cooling heat dissipation is called as evaporative cooling, and the principle of the method is that the latent heat of vaporization when a fluid boils takes away heat.
In the prior art, the exposed surface of the silicon wafer is usually a smooth surface due to the production process of the chip, and at the moment, when evaporation cooling is adopted, the surface of the silicon wafer is smooth and is not easy to generate bubbles, so that the number of vaporization cores is small when a refrigerant boils, the evaporation cooling heat dissipation effect is poor, and the potential advantages of the evaporation cooling heat dissipation effect cannot be exerted.
Disclosure of Invention
The purpose of this application lies in: the surface enhanced boiling heat dissipation structure and the mounting and preparation method of the chip heat dissipation structure are provided to improve the liquid cooling heat dissipation effect of the chip.
The technical scheme of the first aspect of the application is as follows: the utility model provides a surface reinforcing boiling heat radiation structure, heat radiation structure is applicable to the chip in the submergence formula liquid cooling server, and heat radiation structure sets up in the chip upper surface, and heat radiation structure includes the boiling microstructure, and wherein, the boiling microstructure is the arch in order to increase the vaporization core quantity of chip upper surface.
In any one of the above technical solutions, further, the heat dissipation structure includes: a cover plate, a metal welding layer; the metal welding layer is welded on the upper surface of the chip and the lower surface of the cover plate so as to connect the chip and the cover plate; the upper surface of the cover plate is provided with a boiling microstructure.
In any of the above technical solutions, further, the boiling microstructure includes a copper mesh bonding layer, and the copper mesh bonding layer includes at least one copper mesh bonded to the upper surface of the cover plate.
In any one of the above technical solutions, further, the boiling microstructure includes a copper powder sintered layer, and the copper powder sintered layer is formed by sintering copper powder on the upper surface of the cover plate in an environment filled with protective gas.
In any of the above technical solutions, further, the boiling microstructure includes a cutting pillar, and the cutting pillar is engraved on the upper surface of the cover plate.
In any one of the above technical solutions, further, the heat dissipation structure further includes: a first plating layer, a second plating layer; the first coating is arranged on the upper surface of the chip and comprises metal titanium, and the metal titanium is attached to the upper surface of the chip in an evaporation mode; the second plating layer is arranged on the lower surface of the cover plate; the metal welding layer is welded between the first plating layer and the second plating layer so as to weld the chip to the cover plate and transfer heat generated by the chip to the cover plate.
In any one of the above technical solutions, further, the cover plate is groove-shaped, and the edge of the cover plate is bonded to the PCB substrate of the chip by a sealant.
In any one of the above technical solutions, further, the boiling microstructure is etched on the upper surface of the chip by a mask etching method, the boiling microstructure is further provided with a pit, and the pit is etched on the surface of the boiling microstructure by an ultraviolet exposure method, wherein when the boiling microstructure is etched on the upper surface of the chip, a photoresist is coated on a chip wafer, and a mask plate is covered on the upper surface of the chip wafer; and carrying out exposure and development treatment on the chip wafer covered with the mask plate, and etching the exposed chip wafer to form a boiling microstructure.
The technical scheme of the second aspect of the application is as follows: there is provided a method for mounting a chip heat dissipation structure, the method being suitable for mounting a surface enhanced boiling heat dissipation structure according to any one of the first aspect solutions on a chip, the method comprising:
101, bonding one of a blue film or a silicon wafer to the edge of the circuit side of a chip wafer, placing the bonded chip wafer in a vacuum evaporation furnace for evaporation on the non-circuit side of the chip wafer, and marking a plating layer as a first plating layer;
step 102, cutting the evaporated chip wafer into a plurality of chips according to a preset size, and welding the cut chips on a PCB substrate;
103, arranging a boiling microstructure on the upper surface of the cover plate, wherein the boiling microstructure is one of a copper mesh bonding layer, a copper powder sintering layer and a cutting column;
104, electroplating a layer of nickel metal on the lower surface of the cover plate in an electroplating mode, and plating gold on the nickel layer generated by electroplating to be marked as a second plating layer;
and 105, welding the second plating layer on the lower surface of the cover plate on the first plating layer on the upper surface of the chip by using the metal indium as a welding flux.
The third aspect of the present application is the following technical solution: there is provided a method for manufacturing a chip heat dissipation structure, the method being suitable for manufacturing the surface enhanced boiling heat dissipation structure as in the first aspect on a chip, the method comprising:
step 201, cleaning a chip wafer, and covering and adhering a silicon wafer on a circuit layer of the chip wafer;
step 202, cleaning the bonded chip wafer, coating photoresist, and covering a mask plate on the upper surface of the chip wafer;
step 203, carrying out exposure and development treatment on the chip wafer covered with the mask plate, and etching the exposed chip wafer to form a boiling microstructure, wherein the boiling microstructure is a silicon bulge;
step 204, cleaning the etched chip wafer and carrying out ultraviolet exposure so as to form pits on the boiling microstructure and increase the number of vaporization cores on the surface of the boiling microstructure;
and step 205, cutting the chip wafer exposed by the ultraviolet light according to a preset size to manufacture a chip.
The beneficial effect of this application is:
according to the technical scheme, the boiling microstructure is arranged on the smooth surface of the chip silicon substrate, so that the number of vaporization cores in the boiling process of the liquid refrigerant is increased, more bubbles can be generated in the boiling process of the liquid refrigerant, the heat dissipation effect of evaporative cooling is improved, and the nucleate boiling heat exchange performance and the critical heat flux density are obviously improved. Meanwhile, the boiling microstructure is arranged, so that the heat exchange area of the chip can be increased, and the liquid cooling heat dissipation effect of the chip is further improved.
According to the technical scheme, traditional auxiliary heat transfer components such as the heat dissipation fins and the temperature equalization plate are not needed, the occupied space size of the heat dissipation components is reduced to the maximum extent, dense arrangement is facilitated, and the calculation speed is increased.
In the preferred implementation mode in the application, on the premise of not changing the existing chip production process, a material increase mode is adopted, a cover plate is welded on the upper surface (smooth silicon substrate) of the chip, and through processing treatment on the cover plate, a boiling microstructure such as a copper mesh bonding layer, a copper powder sintering layer and a cutting column is arranged on the cover plate, so that the number of vaporization cores is increased, the boiling performance of the silicon substrate is enhanced, and the problem that the evaporation cooling boiling performance of the polished surface of the chip is not good is effectively solved.
Meanwhile, the cover plate is arranged, so that the heat exchange area between the chip and the liquid refrigerant is increased, and the heat exchange area on the surface of the chip is increased by 3-20 times.
Through the technical scheme in the application, the heat flux density of the bare chip is improved by one order of magnitude, and the heat flux density is 10W/cm2Increased to 80W/cm2The critical heat flux density is improved, the immersion type liquid cooling heat dissipation effect is optimized, the thermal resistance of the phase-change liquid refrigerant and the chip is reduced to the maximum extent, the superheat degree of the phase change of the refrigerant is increased, and the heat exchange coefficient is improved.
In the preferred implementation in this application, through changing current chip production technology, adopt the mode that subtracts the material, carry out the mask sculpture to the chip upper surface, adjust the ultraviolet exposure parameter among the mask sculpture in-process, form the silicon arch on the chip upper surface, as boiling microstructure, realize the promotion of vaporization core quantity among the liquid refrigerant evaporation cooling process to effectively solve the difficult problem that chip polishing surface evaporation cooling boiling performance is not good.
And through mask etching, the heat exchange area between the upper surface of the chip and the liquid refrigerant can be increased, and the heat dissipation effect of the immersion type liquid cooling heat dissipation is further improved.
Drawings
The advantages of the above and/or additional aspects of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic block diagram of a surface enhanced boiling heat dissipation structure according to one embodiment of the present application;
FIG. 2 is a partial schematic view of a cutting post cover plate according to one embodiment of the present application;
FIG. 3 is a schematic view of a boiling microstructure according to one embodiment of the present application;
fig. 4 is a schematic illustration of a boiling microstructure with pits according to an embodiment of the present application.
Detailed Description
In order that the above objects, features and advantages of the present application can be more clearly understood, the present application will be described in further detail with reference to the accompanying drawings and detailed description. It should be noted that the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, however, the present application may be practiced in other ways than those described herein, and therefore the scope of the present application is not limited by the specific embodiments disclosed below.
Compared with the traditional air-cooling heat dissipation mode, the heat dissipation effect of the immersion liquid-cooling heat dissipation is better and outstanding, particularly, the evaporation cooling heat dissipation makes full use of the heat dissipation capacity of the liquid refrigerant.
In order to improve the heat dissipation effect of the evaporation cooling of the liquid refrigerant, the upper surface of the chip is provided with the protrusions which serve as a boiling heat dissipation structure, so that on one hand, the heat exchange area of the chip can be increased, on the other hand, the number of vaporization cores of bubbles generated in the evaporation process of the liquid refrigerant can be increased, and the nuclear boiling heat exchange performance and the critical heat flux density are obviously improved.
The first embodiment is as follows:
as shown in fig. 1, the present embodiment provides a surface enhanced boiling heat dissipation structure, which is suitable for a chip 3, the chip 3 is formed by cutting a chip wafer, and the lower surface of the chip is soldered on a PCB substrate 4. Conventionally, the lower surface of the chip 3 is a circuit layer, and the upper surface is a smooth silicon substrate.
In this embodiment, under the condition that the chip production process is fixed, the cover plate 1 is disposed on the chip 3, and the boiling microstructure is disposed on the cover plate 1, so as to achieve the purpose of increasing the number of vaporization cores of bubbles generated in the evaporation cooling process of the liquid refrigerant, wherein the cover plate 1 is made of at least one of copper, aluminum, graphite, and other high thermal conductive materials.
The present embodiment will now be described by taking a cover plate 1 made of pure copper as an example.
When liquid refrigerant carries out evaporative cooling to chip 3, because the upper surface of chip 3 is glossy silicon substrate, is unfavorable for liquid refrigerant and produces the bubble when the boiling, leads to the latent heat of vaporization effect of liquid refrigerant relatively poor, for the vaporization core number that increases liquid refrigerant boiling in-process, sets up the heat radiation structure that strengthens boiling on chip 3, and this heat radiation structure includes: a cover plate 1 and a metal welding layer 2; the metal bonding layer 2 is bonded between the upper surface of the chip 3 and the lower surface of the cap plate 1 to connect the chip 3 and the cap plate 1 and transfer heat generated from the chip 3 to the cap plate 1.
In this embodiment, in order to realize the welding between the chip 3 and the cover plate 1, two metal plating layers are required to be respectively disposed on the upper surface of the chip 3 and the lower surface (welding area) of the cover plate 1, and are respectively referred to as a first plating layer and a second plating layer.
The first plating layer is arranged on the upper surface of the chip 3, the first plating layer comprises a metal titanium layer, the metal titanium is attached to the upper surface of the chip 3 in an evaporation mode and serves as a first layer (metal titanium layer) in the first plating layer, so that the bonding force between the copper cover plate 1 and the silicon substrate of the chip 3 is improved, the metal welding layer 2 is prevented from falling off, and the thickness of titanium is 10-200 nm.
In this embodiment, the first plating layer at least includes a metal titanium layer, a nickel-vanadium alloy layer, and a metal gold layer.
The second layer in the first plating layer is a nickel-vanadium alloy layer as a transition layer, the nickel-vanadium alloy is attached to the metal titanium layer to improve the bonding force between the metal gold layer and the metal titanium layer, wherein the thickness of the nickel-vanadium alloy is 100-1000 nm.
The third layer in the first plating layer is a metal gold layer, the metal gold layer is used as a welding layer with the cover plate 1, and the inertia of gold is utilized to avoid the oxidation of the first plating layer.
Similarly, the lower surface of the cover plate 1 is electroplated with a second plating layer, which sequentially comprises a metal nickel layer and a metal gold layer, wherein the metal gold layer is electroplated on the metal nickel layer of the welding area on the lower surface of the cover plate 1 in a magnetron sputtering manner.
In this embodiment, the material of the metal solder layer is not limited.
In order to weld the metal gold layers in the first and second plating layers together, the metal indium is selected as a welding material of the metal welding layer, and the metal welding layer is used as an interface heat conduction layer, so that connection and heat conduction between the chip 3 and the cover plate 1 are realized, that is, heat generated by the chip 3 is transferred to the cover plate 1.
Through welding, the gold layer of the chip 3 and the gold layer of the cover plate 1 form an alloy with indium metal, and the thickness of the alloy is 100-500 nm.
In this embodiment, the welding conditions of the chip 3 and the lid plate 1 are set as follows: the welding temperature is 160 ℃, the welding time is 4 hours, and the pressure between the cover plate 1 and the chip 3 is 70 LBF.
The lower surface of the cover plate 1 is fixed on the metal welding layer 2, the upper surface of the cover plate 1 is provided with a bulge marked as a boiling microstructure, wherein the cover plate 1 is in a groove shape, and the edge of the cover plate 1 is bonded on the PCB substrate 4 of the chip 3 through the sealant 5.
In this embodiment, the cover plate 1 is configured to be groove-shaped, and the surface area of the lower surface of the cover plate 1 is slightly larger than the surface area of the silicon substrate on the upper surface of the chip 3, so that on one hand, the heat dissipation area of the cover plate 1 can be increased, and on the other hand, the short circuit phenomenon caused by the contact between the cover plate 1 and the chip 3 can be avoided. Bond the edge of 1 recess of apron on chip 3's PCB base plate 4 through sealed 5, simultaneously, sealed 5 can also give the effect that plays increase structural strength of gluing.
In this embodiment, the boiling microstructure on the upper surface of the cover plate 1 has various implementations, which may be one or more of the following implementations.
In one implementation of the boiling microstructure, the boiling microstructure comprises a copper mesh bonding layer, the copper mesh bonding layer comprises at least one layer of copper mesh bonded to the upper surface of the cover plate 1, and at this time, copper wires in the copper mesh serve as the boiling microstructure protrusions.
Specifically, copper meshes with different meshes and different layers can be bonded on the upper surface of the cover plate 1 to form a reinforced boiling structure. The number of the layers of the copper mesh is preferably 3-5, the mesh number of the copper mesh is preferably 50-200, and the bonding of the copper mesh is realized by adopting pressure diffusion welding.
In another implementation manner of the boiling microstructure, the boiling microstructure comprises a copper powder sintering layer, the copper powder sintering layer is formed by sintering copper powder on the upper surface of the cover plate in an environment filled with protective gas, and at the moment, the copper powder is used as a bulge of the boiling microstructure.
Specifically, copper powder with different meshes and thicknesses can be sintered on the upper surface of the cover plate 1 to serve as a reinforced boiling structure. When copper powder is sintered, the cover plate 1 is placed in an environment filled with protective gas for high-temperature sintering, the sintering temperature is 900-.
In the present embodiment, the above process is described by taking a 12-inch GPU chip wafer as an example.
Firstly, protecting the circuit side of a 12-inch GPU chip wafer, wherein a specific protection layer is 12-inch silicon wafer bonding protection, and bonding the edge of the circuit side of the GPU chip wafer with the edge of a pure silicon wafer by using epoxy sealant.
And then, putting the GPU chip wafer into a vacuum evaporation furnace, exposing the electroplating side of the GPU chip wafer in an evaporation atmosphere, and sequentially evaporating and plating titanium, nickel-vanadium alloy and gold, wherein the thickness of the titanium layer is 100nm, the thickness of the nickel-vanadium alloy is 1000nm, and the thickness of the gold layer is 200 nm.
And secondly, cutting the evaporated GPU chip wafer into single chips 3, welding the chips 3 on the corresponding PCB substrate 4, and setting the welding temperature to be 250 ℃ and the welding time to be 30 min.
In this embodiment, the cover plate 1 is made of pure copper, an adhesive is coated on the upper surface of the copper cover plate, 200-mesh copper powder is coated on the upper surface of the cover plate 1, the thickness of the copper powder is 1000um, the cover plate 1 is placed in a sintering furnace, nitrogen is used as a protective gas, the cover plate 1 is sintered in a nitrogen atmosphere, the sintering temperature is set to be 1020 ℃, the sintering time is set to be 30min, the cover plate 1 is cleaned after sintering is completed, and the sintered copper powder can be used as a reinforced boiling structure on the cover plate 1.
And finally, welding the cover plate 1 and the chip 3 by using metal indium as a welding flux at the welding temperature of 160 ℃ for 4 hours under the pressure of 70LBF of the cover plate 1 and the chip 3.
In yet another implementation of the boiling microstructure, as shown in fig. 2, the boiling microstructure includes a plurality of cutting pillars engraved on the upper surface of the cover plate, wherein an array of cutting pillars is distributed on the upper surface of the cover plate. At this point, the cutting pillars act as boiling microstructure protrusions.
Specifically, the engraving mode adopts a machining process, a linear cutting process or a laser mode, and a plurality of cutting columns distributed in an array are engraved above the cover plate 1 according to a preset size.
Firstly, protecting the circuit side of a 12-inch GPU chip wafer, wherein a protection layer is a 12-inch silicon wafer bonding protection layer, and bonding the edge of the circuit side of the GPU chip wafer with the edge of a pure silicon wafer by adopting epoxy sealing.
And then, putting the GPU chip wafer into a vacuum evaporation furnace, exposing the electroplating side of the GPU chip wafer in an evaporation atmosphere, and sequentially evaporating and plating titanium, nickel-vanadium alloy and gold, wherein the thickness of the titanium layer is 100nm, the thickness of the nickel-vanadium alloy is 1000nm, and the thickness of the gold layer is 200 nm.
And secondly, cutting the evaporated GPU chip wafer into single chips 3, welding the chips 3 on the corresponding PCB substrate 4, and setting the welding temperature to be 250 ℃ and the welding time to be 30 min.
In this embodiment, the cover plate 1 is made of pure copper, and the laser etching process is performed on the upper surface of the pure copper cover plate to etch the enhanced boiling cutting column with the length of 100um, the width of 100um and the height of 500 um.
It should be noted that, a reinforced boiling cutting column may be formed on the cover plate 1 made of pure copper, and at this time, a fin shoveling process is performed on the copper cover plate 1 to form fins with a thickness of 100um and a height of 500um, and the fin pitch is 100 um. Then, a linear cutting process is carried out on the fin to form a reinforced boiling cutting column with the length of 100um, the width of 100um and the height of 500 um.
And finally, welding the cover plate 1 and the chip 3 by using metal indium as a welding flux at the welding temperature of 160 ℃ for 4 hours under the pressure of 70LBF of the cover plate 1 and the chip 3.
The present embodiment is not limited to the size of the cut pillars.
In this embodiment, a cover plate made of pure copper is selected, the implementation modes of the three boiling microstructures are tested, a comparison test is performed with a bare chip under the conditions that the highest surface temperature is 85 ℃ and the refrigerant is non-conductive liquid with a boiling point of 47 ℃ in the operation process of the chip, and the test data are shown in table 1.
TABLE 1
Figure BDA0002651474810000101
Compared with a bare chip, the chip with the surface-enhanced boiling heat dissipation structure is provided, the heat flow density is improved by several times, the boiling heat dissipation structure has a good heat dissipation effect, the effective heat dissipation surface area is improved through additive processing, the micro-nano structure is processed, and the number of vaporization cores in the evaporative cooling process is increased.
Example two:
the present embodiment provides a method for mounting a chip heat dissipation structure, which is suitable for mounting the surface enhanced boiling heat dissipation structure in the above embodiments on a chip, and the heat dissipation structure includes: the chip comprises a cover plate 1, a metal welding layer 2 and a chip 3, wherein a boiling microstructure is arranged on the cover plate 1.
In this embodiment, the cover plate 1 made of pure copper will be described as an example.
The method comprises the following steps:
101, bonding one of a blue film or a silicon wafer to the edge of the circuit side of a chip wafer, placing the bonded chip wafer in a vacuum evaporation furnace for metal evaporation on the non-circuit side of the chip wafer, and marking a plating layer as a first plating layer;
in this embodiment, the first plating layer at least includes a metal titanium layer, a nickel-vanadium alloy layer, and a metal gold layer.
The first layer of the first coating is a metal titanium layer, the metal titanium layer is attached to the upper surface of the chip 3 in an evaporation mode, so that the bonding force between the copper cover plate 1 and the silicon substrate of the chip 3 is improved, the metal welding layer 2 is prevented from falling off, and the thickness of titanium is 10-200 nm.
The second layer in the first plating layer is a nickel-vanadium alloy layer as a transition layer, the nickel-vanadium alloy is attached to the metal titanium layer to improve the bonding force between the metal gold layer and the metal titanium layer, wherein the thickness of the nickel-vanadium alloy is 100-1000 nm.
The third layer in the first plating layer is a metal gold layer, the metal gold layer is used as a welding layer with the cover plate 1, and the inertia of gold is utilized to avoid the oxidation of the first plating layer.
And 102, cutting the evaporated chip wafer into a plurality of chips according to a preset size, and welding the cut chips on the PCB substrate.
103, arranging a boiling microstructure on the upper surface of the cover plate, wherein the boiling microstructure is one of a copper mesh bonding layer, a copper powder sintering layer and a cutting column.
In one implementation of the boiling microstructure, the boiling microstructure comprises a copper mesh bonding layer comprising at least one layer of copper mesh bonded to the upper surface of the cover plate 1.
In another implementation of the boiling microstructure, the boiling microstructure comprises a copper powder sintered layer, and the copper powder sintered layer is formed by sintering copper powder on the upper surface of the cover plate in an environment filled with protective gas.
In yet another implementation of the boiling microstructure, the boiling microstructure includes cutting posts engraved on an upper surface of the cover plate.
The form of the boiling microstructure is not limited in this embodiment. The boiling microstructure is arranged on the upper surface of the cover plate, so that the number of vaporization cores in the boiling process of the liquid refrigerant is increased, and the evaporation cooling effect of the liquid refrigerant is optimized.
And 104, electroplating a layer of nickel metal on the lower surface of the cover plate in an electroplating mode, arranging a welding area on the nickel layer generated by electroplating, plating gold on the welding area, and marking the welding area after the gold plating as a second plating layer, namely the second plating layer sequentially comprises a metal nickel layer and a metal gold layer, wherein the metal gold layer is electroplated on the metal nickel layer of the welding area on the lower surface of the cover plate 1 in a magnetron sputtering mode.
Step 105, using metal indium as a solder, and soldering the second plating layer on the lower surface of the cover plate to the first plating layer on the upper surface of the chip, that is, soldering metal gold layers in the first and second plating layers together, and simultaneously realizing heat conduction between the chip 3 and the cover plate 1, wherein the soldering conditions are set as: the welding temperature is 160 ℃, the welding time is 4 hours, and the pressure of the cover plate 1 and the chip 3 is 70 LBF.
Through welding, the gold layer of the chip 3 and the gold layer of the cover plate 1 form an alloy with indium metal, and the thickness of the alloy is 100-500 nm.
And 106, adopting epoxy sealant to bond the edge of the cover plate on the PCB substrate at the edge of the cover plate.
In this embodiment, set up the apron into the recess shape, and the surface area of the lower surface of apron slightly is greater than the surface area of chip upper surface silicon substrate, can increase the heat radiating area of apron on the one hand, on the other hand can also avoid apron and chip to contact and take place the short circuit phenomenon, and then bond the edge of apron on the PCB base plate of chip through sealed glue, simultaneously, sealed glue can also give the effect that plays increase structural strength.
Example three:
as shown in fig. 3 and 4, the present embodiment provides another surface enhanced boiling heat dissipation structure, the structure is suitable for a chip, the lower surface of the chip is set as a circuit layer, and the upper surface of the chip is a smooth silicon substrate, during the chip production process, a boiling microstructure, i.e., a silicon bump, is etched on the upper surface of the chip by adjusting the chip production process and using a mask etching manner, so as to increase the number of vaporization cores on the upper surface of the chip.
In this embodiment, the mask etching method is not limited.
In this embodiment, the boiling microstructure may be a rectangular column, a rhombic column, a cylinder, a cone, a draft rectangular column, or a draft rhombic column.
In this embodiment, the boiling microstructure has a length range L (L)1) 100um to 5000um, width range K (K)1) The structure has a height range H of 50-2000 um, a structure interval D of 0-1000 um.
In this embodiment, the shape and size of the boiling microstructure are determined by the shape of the pattern of the mask and the etching time, wherein the etching time is 80-200 min.
In this embodiment, the boiling microstructure is exposed to ultraviolet light and etched on the upper surface of the chip in a mask etching manner, and the surface of the boiling microstructure is further provided with a pit etched on the surface of the boiling microstructure in an ultraviolet exposure manner.
Example four:
the present embodiment provides another method for manufacturing a heat dissipation structure of a chip, which is suitable for manufacturing the surface enhanced boiling heat dissipation structure of the above embodiments on a chip.
Taking a GPU chip as an example, setting the shape of a boiling microstructure as a pattern drawing rectangular column, etching the boiling microstructure on the upper surface of the chip in a mask etching mode, and forming pits on the surface of the boiling microstructure, wherein the method comprises the following steps:
step 201, cleaning a chip wafer, and covering and adhering a silicon wafer on a circuit layer of the chip wafer.
Specifically, a 12-inch GPU chip wafer with circuits is cleaned, surface impurities on two sides of the chip are removed, pure silicon wafers with the same size are covered on the circuit side, the GPU chip wafer and the pure silicon wafers are bonded through an adhesive, and the bonding part is the non-circuit part on the edge of the wafer.
Step 202, cleaning the bonded chip wafer, coating photoresist, enabling the photoresist to be leveled and cured in a rotating mode, and covering the manufactured mask plate on the upper surface of the chip wafer.
Step 203, performing exposure and development treatment on the chip wafer covered with the mask plate, wherein ultraviolet light is adopted for exposure during the exposure and development treatment, and the exposed chip wafer is etched by adopting a dry etching technology to form a boiling microstructure, and the specific etching time, temperature and pressure are determined by the size of the drawing rectangular column.
And 204, cleaning the etched chip wafer, exposing the upper surface of the whole wafer to ultraviolet light again, and performing ultraviolet light exposure in a short time so as to form an etching pit on the boiling microstructure and further increase the number of gasification cores.
Step 205, according to the preset size, the chip wafer after ultraviolet exposure is cut, the edge without a circuit is removed, and a chip is manufactured, wherein the upper surface of the chip is provided with a smooth silicon substrate and becomes an enhanced boiling heat dissipation structure with a boiling microstructure.
In order to test the heat dissipation performance of the chip with the boiling microstructure enhanced boiling heat dissipation structure in this embodiment, the GPU chip is used with a size of 14.5 × 23 × 1mm, and the refrigerant is a non-conductive liquid with a boiling point of 47 ℃.
Setting the etching conditions in the process of etching the boiling microstructure and the surface pits as follows: using CF4Gas, under the vacuum condition, the etching temperature is 40 ℃, and the etching time is 90min, 110min, 130min, 150min, 170min and 190min in sequence.
The surface temperature of the boiling microstructure was set to 85 ℃, and a comparative test was performed with the bare chip at the same temperature, and the test data are shown in table 2.
TABLE 2
Figure BDA0002651474810000141
Compared with a bare chip, the chip with the drawing rectangular column boiling microstructure on the surface is greatly improved in heat flux density, and particularly under the condition that the etching time is set to 150min, the heat flux density reaches 82W/cm2And the heat flow density of the bare chip is about 6.3 times that of the bare chip, so that the immersed liquid cooling heat dissipation effect of the GPU chip is obviously improved.
In the technical scheme of the embodiment, the heat flux density of the bare chip is improved by one order of magnitude, and the heat flux density is 10W/cm2Increased to 80W/cm2The critical heat flux density is improved, the immersion type liquid cooling heat dissipation effect is optimized, the thermal resistance of the phase-change liquid refrigerant and the chip is reduced to the maximum extent, the superheat degree of the phase change of the refrigerant is increased, and the heat exchange coefficient is improved.
The technical scheme of the application is explained in detail with the aid of the attached drawings, and the application provides a surface-enhanced boiling heat dissipation structure which is suitable for a chip in an immersed liquid cooling server and arranged on the upper surface of the chip. Through the technical scheme in this application, set up the boiling microstructure at the smooth surface of chip silicon substrate to increase the vaporization core quantity in the liquid refrigerant boiling process, make the liquid refrigerant boiling process in can produce more bubbles, improve evaporation cooling's radiating effect.
The steps in the present application may be sequentially adjusted, combined, and subtracted according to actual requirements.
The units in the device can be merged, divided and deleted according to actual requirements.
Although the present application has been disclosed in detail with reference to the accompanying drawings, it is to be understood that such description is merely illustrative and not restrictive of the application of the present application. The scope of the present application is defined by the appended claims and may include various modifications, adaptations, and equivalents of the invention without departing from the scope and spirit of the application.

Claims (10)

1. The surface-enhanced boiling heat dissipation structure is suitable for a chip in an immersed liquid cooling server, and is arranged on the upper surface of the chip.
2. The surface enhanced boiling heat dissipation structure of claim 1, wherein the heat dissipation structure comprises: a cover plate, a metal welding layer;
the metal welding layer is welded on the upper surface of the chip and the lower surface of the cover plate so as to connect the chip and the cover plate;
the boiling microstructure is arranged on the upper surface of the cover plate.
3. The surface enhanced boiling heat dissipation structure of claim 2, wherein the boiling microstructure comprises a copper mesh bonding layer comprising at least one copper mesh bonded to the upper surface of the cover plate.
4. The surface enhanced boiling heat dissipation structure of claim 2, wherein the boiling microstructure comprises a copper powder sintered layer, and the copper powder sintered layer is formed by sintering copper powder on the upper surface of the cover plate in an environment filled with protective gas.
5. The surface enhanced boiling heat dissipation structure of claim 2, wherein the boiling microstructure comprises a plurality of cutting pillars engraved on the upper surface of the cover plate.
6. The surface enhanced boiling heat dissipation structure of any one of claims 2 to 5, further comprising: a first plating layer, a second plating layer;
the first plating layer is arranged on the upper surface of the chip and comprises metal titanium, and the metal titanium is attached to the upper surface of the chip in an evaporation mode;
the second plating layer is arranged on the lower surface of the cover plate;
the metal welding layer is welded between the first plating layer and the second plating layer so as to weld the chip to the cover plate and transfer heat generated by the chip to the cover plate.
7. The surface enhanced boiling heat dissipation structure of any one of claims 2 to 5, wherein the cover plate is in a groove shape, and an edge of the cover plate is bonded to the PCB substrate of the chip by a sealant.
8. The surface enhanced boiling heat dissipation structure of claim 1, wherein the boiling microstructure is etched on the upper surface of the chip by a mask etching method, and the boiling microstructure is further provided with pits etched on the surface of the boiling microstructure by an ultraviolet exposure method.
9. A method for mounting a chip heat dissipation structure, the method being adapted to mount a surface enhanced boiling heat dissipation structure as recited in any one of claims 1 to 7 on a chip, the method comprising:
101, bonding one of a blue film or a silicon wafer to the edge of the circuit side of a chip wafer, placing the bonded chip wafer in a vacuum evaporation furnace, and carrying out evaporation on the non-circuit side of the chip wafer, wherein a plating layer is marked as a first plating layer;
step 102, cutting the evaporated chip wafer into a plurality of chips according to a preset size, and welding the cut chips on a PCB substrate;
103, arranging a boiling microstructure on the upper surface of the cover plate, wherein the boiling microstructure is one of a copper mesh bonding layer, a copper powder sintering layer and a cutting column;
104, electroplating a layer of nickel metal on the lower surface of the cover plate in an electroplating mode, and plating gold on the nickel layer generated by electroplating to be marked as a second plating layer;
and 105, welding the second plating layer on the lower surface of the cover plate on the first plating layer on the upper surface of the chip by using metal indium as a welding flux.
10. A method for preparing a heat dissipation structure of a chip, wherein the method is suitable for preparing the surface enhanced boiling heat dissipation structure of claim 8 on the chip, and the method comprises:
step 201, cleaning a chip wafer, and covering and adhering a silicon wafer on a circuit layer of the chip wafer;
step 202, cleaning the bonded chip wafer, coating photoresist, and covering a mask plate on the upper surface of the chip wafer;
step 203, carrying out exposure and development treatment on the chip wafer covered with the mask plate, and etching the exposed chip wafer to form the boiling microstructure, wherein the boiling microstructure is a silicon bump;
step 204, cleaning the etched chip wafer and carrying out ultraviolet exposure so as to form pits on the boiling microstructure and increase the number of vaporization cores on the surface of the boiling microstructure;
and step 205, cutting the chip wafer exposed by the ultraviolet light according to a preset size to manufacture a chip.
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