CN112150970A - Display assembly, preparation method thereof, display module and electronic equipment - Google Patents
Display assembly, preparation method thereof, display module and electronic equipment Download PDFInfo
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- G—PHYSICS
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The embodiment of the application relates to a display assembly, a preparation method thereof, a display module and electronic equipment, wherein the display assembly comprises: a first light emitting unit; a second light emitting unit; the driving circuit layer is internally provided with a driving module which is respectively and electrically connected with the first light-emitting unit and the second light-emitting unit and is used for respectively controlling the first light-emitting unit and the second light-emitting unit to emit light; the first light-emitting unit and the second light-emitting unit are respectively arranged on two surfaces of the driving circuit layer, which are opposite to each other. According to the display module, the first light-emitting unit and the second light-emitting unit are respectively arranged on the two surfaces, back to back, of the driving circuit layer, so that a double-sided display function is achieved.
Description
Technical Field
The embodiment of the application relates to the technical field of display, in particular to a display assembly, a preparation method of the display assembly, a display module and electronic equipment.
Background
With the gradual diversification of the forms of electronic products, the double-sided display function becomes the main feature of the new generation of electronic products, especially the display articles in some office places.
However, at present, two independent display devices are usually assembled back to realize the function of double-sided display. The double-sided display device constructed in the above manner is relatively thick and heavy, and therefore does not meet the requirements of users for lightness and thinness.
Disclosure of Invention
Accordingly, it is desirable to provide a display module, a method for manufacturing the same, a display module and an electronic device, which are directed to the problem of the relatively thick and heavy double-sided display device.
A display assembly, comprising:
a first light emitting unit;
a second light emitting unit;
the driving circuit layer is internally provided with a driving module which is respectively and electrically connected with the first light-emitting unit and the second light-emitting unit and is used for respectively controlling the first light-emitting unit and the second light-emitting unit to emit light;
the first light-emitting unit and the second light-emitting unit are respectively arranged on two surfaces of the driving circuit layer, which are opposite to each other.
A method of making a display assembly, comprising:
providing a substrate;
forming a driving circuit layer on the substrate, wherein a driving module is arranged in the driving circuit layer;
forming a first light emitting unit on the driving circuit layer, wherein the first light emitting unit is electrically connected with the driving module;
peeling off the substrate;
and forming a second light-emitting unit on the surface of the side, far away from the first light-emitting unit, of the driving circuit layer, wherein the second light-emitting unit is electrically connected with the driving module.
A display module comprises a plurality of display assemblies, and the driving circuit layers of the display assemblies are communicated.
An electronic device comprises the display module.
Above-mentioned display module assembly and preparation method, display module assembly and electronic equipment thereof, display module assembly includes: a first light emitting unit; a second light emitting unit; the driving circuit layer is internally provided with a driving module which is respectively and electrically connected with the first light-emitting unit and the second light-emitting unit and is used for respectively controlling the first light-emitting unit and the second light-emitting unit to emit light; the first light-emitting unit and the second light-emitting unit are respectively arranged on two surfaces of the driving circuit layer, which are opposite to each other. In addition, the first light-emitting unit and the second light-emitting unit are respectively controlled through the same driving circuit layer, independent control over double-sided display can be achieved through the light and thin driving circuit layer, and namely the light and thin display assembly is better.
Drawings
Fig. 1 is a schematic view of a device structure of a display module according to an embodiment;
FIG. 2 is a schematic structural diagram of a display module in which a first light-emitting unit and a second light-emitting unit at least partially overlap according to an embodiment;
FIG. 3 is a schematic structural diagram of a display module in which a first light-emitting unit and a second light-emitting unit are staggered according to an embodiment;
FIG. 4 is an equivalent circuit diagram of a display device according to an embodiment;
FIG. 5 is a schematic cross-sectional view of a display module according to an embodiment;
FIG. 6 is a flow chart of a method of fabricating a display assembly according to one embodiment;
FIG. 7 is a schematic diagram of the device structure after step 604 according to one embodiment;
FIG. 8 is a schematic diagram of the device structure after step 606 in one embodiment;
FIG. 9 is a schematic diagram of the device structure after step 608 according to one embodiment;
FIG. 10 is a schematic diagram of a device structure after step 610 according to one embodiment;
FIG. 11 is a sub-flowchart of step 604, according to an embodiment.
Element number description:
a display component: 10; a first light emitting unit: 100, respectively; a first anode: 110; a first cathode: 120 of a solvent; a second light emitting unit: 200 of a carrier; a second anode: 210; a second cathode: 220, 220; a driving circuit layer: 300, respectively; a driving module: 301; a pixel drive circuit: 311; a selection circuit: 312; a flexible layer: 320, a first step of mixing; buffer layer: 330; a gate insulating layer: 340, respectively; interlayer dielectric layer: 350 of (a); a planarization layer: 360; an active layer: 371; a first contact structure: 372; grid electrode: 373; intermediate metal layer: 374; a source contact structure: 375; a drain contact structure: 376; a second contact structure: 377; pixel definition layer: 380 of the raw material; a polarizer layer: 400, respectively; packaging layer: 500, a step of; substrate: 600
Detailed Description
To facilitate an understanding of the embodiments of the present application, the embodiments of the present application will be described more fully below with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. The embodiments of the present application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the embodiments of this application belong. The terminology used herein in the description of the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the embodiments of the present application. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In the description of the embodiments of the present application, it is to be understood that the terms "upper", "lower", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on methods or positional relationships shown in the drawings, and are only used for convenience in describing the embodiments of the present application and simplifying the description, but do not indicate or imply that the devices or elements referred to must have specific orientations, be constructed in specific orientations, and be operated, and thus, should not be construed as limiting the embodiments of the present application.
Fig. 1 is a schematic view of a device structure of a display module according to an embodiment of the present disclosure, in which the display module includes a plurality of display elements 10, and a structure in a dashed line frame in fig. 1 is used as one display element 10. Referring to fig. 1, a display assembly 10 includes a first light emitting cell 100, a second light emitting cell 200, and a driving circuit layer 300. The first light emitting unit 100 and the second light emitting unit 200 are respectively disposed on two opposite surfaces of the driving circuit layer 300.
The first light emitting unit 100 is electrically connected to the driving circuit layer 300, and the electrode of the first light emitting unit 100 is electrically connected to the circuit in the driving circuit layer 300. The first light emitting unit 100 obtains a driving current or a driving voltage from a corresponding circuit through an electrode and emits light under the driving of the driving current or the driving voltage, and the luminance of the emitted light is positively correlated with the driving current or the driving voltage. The light emitting direction of the first light emitting unit 100 is a direction away from the driving circuit layer 300, and the plurality of first light emitting units 100 together form a first display surface, i.e., a front display.
The second light emitting unit 200 is also electrically connected to the driving circuit layer 300, and the electrode of the second light emitting unit 200 is electrically connected to the circuit in the driving circuit layer 300. The second light emitting unit 200 acquires a driving current or a driving voltage from a corresponding circuit through an electrode and emits light under the driving of the driving current or the driving voltage, and the luminance of the emitted light is positively correlated with the driving current or the driving voltage. The light emitting direction of the second light emitting unit 200 is a direction away from the driving circuit layer 300, and the plurality of second light emitting units 200 together form a second display surface, i.e., a back display.
Since the first light emitting unit 100 and the second light emitting unit 200 are disposed on two opposite surfaces of the driving circuit layer 300, and the light emitting directions are both directions departing from the driving circuit layer 300, the light emitting directions of the first light emitting unit 100 and the second light emitting unit 200 are opposite, and the double-sided display function can be realized. It can be understood that, through the dual-side display function, a user can flexibly select one display surface to display, and also can make two display surfaces simultaneously display the same image, so that multiple users can watch from different angles at the same time, thereby dealing with different application scenes and improving the flexibility of the display assembly 10.
A driving circuit layer 300, wherein a driving module is disposed in the driving circuit layer 300, and the driving module is electrically connected to the first light emitting unit 100 and the second light emitting unit 200, and is used for controlling the first light emitting unit 100 and the second light emitting unit 200 to emit light, respectively. In this way, on the basis of dual-sided independent display, the first light emitting unit 100 and the second light emitting unit 200 can share the same driving circuit layer 300, i.e., the driving circuit for dual-sided display is integrated in one driving circuit layer 300, thereby realizing a thinner and lighter display device 10.
It is understood that, since the first and second light emitting units 100 and 200 are disposed on the driving circuit layer 300, the shape of the first display surface and the shape of the second display surface both correspond to the shape of the driving circuit layer 300, that is, the first and second display surfaces may be formed in a planar or arc type by disposing the shape of the driving circuit layer 300, and the shapes of the two display surfaces may be different. Optionally, the driving circuit layer 300 may be a light-tight structure to avoid interference when the light-emitting units on different sides emit light, thereby improving the image accuracy of the dual-sided display.
In the present embodiment, the display module 10 includes: a first light emitting unit 100; a second light emitting unit 200; a driving circuit layer 300 electrically connected to the first light emitting unit 100 and the second light emitting unit 200, respectively, for controlling the first light emitting unit 100 and the second light emitting unit 200 to emit light, respectively; the first light emitting unit 100 and the second light emitting unit 200 are respectively disposed on two opposite surfaces of the driving circuit layer 300. In the embodiment of the present application, the first light emitting unit 100 and the second light emitting unit 200 are respectively disposed on the two opposite surfaces of the driving circuit layer 300, so as to achieve a double-sided display function, and in the embodiment of the present application, the first light emitting unit 100 and the second light emitting unit 200 are respectively controlled by the same driving circuit layer 300, so that the driving circuit layer 300 can be used to achieve independent control of double-sided display, that is, a display assembly 10 with better light weight and thinness is implemented.
In one embodiment, the first Light Emitting unit 100 and the second Light Emitting unit 200 are both active Light Emitting units, such as Organic Light-Emitting diodes (OLEDs), Quantum Dot Light Emitting diodes (QLEDs), and micro led devices. It can be understood that Liquid Crystal Displays (LCDs) and the like require additional backlight modules to achieve the Display function, and are not light and thin, and the wiring between the driving circuit layer 300 and the light emitting unit is not convenient to pass through the backlight modules, so the manufacturing difficulty and the manufacturing cost are high.
Further, the first light emitting unit 100 and/or the second light emitting unit 200 are micro led device light emitting units. It can be understood that the organic light emitting diode and the quantum dot light emitting diode, etc. need a plurality of evaporation process processes to form a complete light emitting device structure, and the evaporation process has a very high requirement on the evaporation environment, and the film layer formed by evaporation is relatively fragile, and if two times of evaporation is performed on the front side and the back side, the film layer formed by previous evaporation may be damaged, thereby affecting the display quality of the display module 10. Furthermore, the first light-emitting unit 100 and the second light-emitting unit 200 can be both micro led device light-emitting units, and no complex film layer structure needs to be arranged in the micro led device, so that the stability and reliability of the preparation are high, and a higher preparation yield can be realized.
Fig. 2 is a schematic structural diagram of a display assembly 10 in which a first light-emitting unit 100 and a second light-emitting unit 200 at least partially overlap, referring to fig. 2, in the present embodiment, the first light-emitting unit 100 and the second light-emitting unit 200 at least partially overlap in a direction perpendicular to a driving circuit layer 300. It can be understood that, by the arrangement of the embodiment, the micro led device has a larger light emitting area, so that the micro led device has higher brightness and a larger aperture ratio, and the transfer difficulty of the large-sized micro led device is lower, so that the preparation yield of the display assembly 10 can be effectively improved.
Fig. 3 is a schematic structural diagram of a display module 10 in which a first light-emitting unit 100 and a second light-emitting unit 200 are staggered according to an embodiment, and referring to fig. 3, in this embodiment, the first light-emitting unit 100 and the second light-emitting unit 200 in the same display module 10 are staggered in a direction perpendicular to the driving circuit layer 300. Here, the staggered means that the first light emitting unit 100 and the second light emitting unit 200 do not overlap in a direction perpendicular to the driving circuit layer 300. The size of the micro led device of the embodiment is small, and the gap between the adjacent micro led devices is large, so the space margin during the transfer is large.
With continued reference to fig. 3, the driving circuit layer 300 includes a driving module 301, and the display assembly 10 further includes a data signal line (not shown), wherein the driving module 301 is connected to the data signal line. Further, the driving module 301 includes a pixel driving circuit 311 and a selection circuit. For example, the first control transistor TFT1 and the second control transistor TFT2 in fig. 3 may be used together as a selection circuit, so as to implement the function of selective display of the display component.
The pixel driving circuit 311 is connected to the data signal line, and is configured to transmit the data signal. That is, the pixel drive circuit 311 acquires a data signal from the data signal line and transmits the acquired data signal to the input terminal of the selection circuit.
The input end of the selection circuit is connected to the pixel driving circuit 311, two output ends of the selection circuit are respectively connected to the first light emitting unit 100 and the second light emitting unit 200 in a one-to-one correspondence, and the selection circuit is configured to select and transmit the data signal to the first light emitting unit 100 and/or the second light emitting unit 200 according to an externally input control signal.
In this embodiment, by providing the selection circuit, it is possible to realize simple and quick selection of the transmission direction of the data signal. For example, the selection circuit may be an alternative selector, that is, the alternative selector may select a signal transmission path between the on signal input terminal and one of the two output terminals according to an externally input control signal, thereby transmitting the data signal to the target light emitting unit, that is, one of the first and second light emitting units 100 and 200. The control signal may include one signal or two signals, and the two signals may be opposite phase signals, so as to realize more flexible and rapid control.
With continued reference to FIG. 3, in one embodiment, the selection circuit 312 includes a first control transistor TFT1 and a second control transistor TFT2, and the display assembly 10 further includes a control signal line (not shown). Wherein the control signal line is used for transmitting a control signal to the first control transistor TFT1 and the second control transistor TFT2 to control the first control transistor TFT1 and the second control transistor TFT2 to be turned on in a time-sharing manner.
Specifically, the gate 373 of the first control transistor TFT1 may be connected to the control signal line, the source of the first control transistor TFT1 is connected to the pixel driving circuit 311, and the drain of the first control transistor TFT1 is connected to the first light emitting cell 100; a second control transistor TFT2, a gate 373 of the second control transistor TFT2 being connected to the control signal line, a source of the second control transistor TFT2 being connected to the pixel driving circuit 311, and a drain of the second control transistor TFT2 being connected to the second light emitting unit 200. In the present embodiment, independent control of the first and second light emitting units 100 and 200 can be achieved by providing two control transistors. Illustratively, the first control transistor TFT1 and the second control transistor TFT2 may be connected to the same control signal line, and the first control transistor TFT1 and the second control transistor TFT2 may have opposite conduction characteristics, so that the first control transistor TFT1 and the second control transistor TFT2 are turned on in a time-sharing manner, and the arrangement of the present embodiment may simplify the number of control signal lines to further improve the lightness and thinness of the display module 10.
With continued reference to fig. 3, the plurality of first control transistors TFT1 and the plurality of second control transistors TFT2 in the display module are arranged in the driving circuit layer 300 in an array manner at intervals, and the driving circuit layers 300 of the plurality of display elements 10 are communicated, that is, the plurality of driving circuit layers 300 are prepared at the same time and share the same thickness, thereby realizing a thinner and lighter display module.
Fig. 4 is an equivalent circuit diagram of the display device 10 according to an embodiment, and referring to fig. 4, in the embodiment, the control signal line includes a first control line and a second control line. A first control line connected to the gate 373 of the first control transistor TFT 1; and a second control line connected to the gate 373 of the second control transistor TFT 2.
In one embodiment, the first control transistor TFT1 and the second control transistor TFT2 have opposite conduction characteristics, and the level states of the control signals transmitted by the first control line and the second control line are the same, and the control logic of this embodiment is simpler, that is, the simultaneous control of the first control transistor TFT1 and the second control transistor TFT2 can be realized based on the same control signal without performing additional processing on the control signal or generating a plurality of control signals.
In another embodiment, the first control transistor TFT1 and the second control transistor TFT2 have the same turn-on characteristics, and the level states of the control signals transmitted by the first control line and the second control line are opposite. It is understood that the first control transistor TFT1 and the second control transistor TFT2 realize their turn-on characteristics through a plurality of functional layers arranged in a stacked manner, that is, if the first control transistor TFT1 and the second control transistor TFT2 with the same turn-on characteristics are arranged, the first control transistor TFT1 and the second control transistor TFT2 can be synchronously manufactured, so that the manufacturing process steps of the control transistors can be simplified, and the manufacturing efficiency can be improved.
Further, with continued reference to fig. 4, in one embodiment, the pixel driving circuit 311 includes a plurality of transistors and at least one storage capacitor, and the embodiment of fig. 4 provides an implementation of 7T1C, it is understood that in other embodiments, the pixel driving circuit 311 may also be 3T1C, 6T1C, and the pixel driving circuit 311 described above may also achieve the objectives of the present application.
As described above, the display module 10 includes the data signal line, the first control line, the second control line, the first light emitting unit 100, and the second light emitting unit 200, and in the present embodiment, the display module 10 further includes the reference voltage line, the light emission control signal line, and the scan signal line to further implement more functions.
Specifically, the pixel driving circuit 311 includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a storage capacitor. Wherein a gate 373 of the first transistor T1 is connected to a drain of the fifth transistor T5, a source of the first transistor T1 is connected to a drain of the third transistor T3, a drain of the first transistor T1 is connected to a source of the sixth transistor T6, a gate 373 of the second transistor T2 is connected to a scan signal line, a source of the second transistor T2 is connected to a gate 373 of the first transistor T1, a gate 373 of the third transistor T3 is connected to a light emission control signal line, a source of the third transistor T3 is connected to a power supply voltage VDD, a gate 373 of the fourth transistor T4 is connected to the scan signal line, a source of the fourth transistor T4 is connected to a source of the first transistor T1, a drain of the fourth transistor T4 is connected to a data signal line, a source of the fifth transistor T5 is connected to the scan signal line, a source of the fifth transistor T5 is connected to a reference voltage line, a gate 373 of the sixth transistor T6 is connected to the light emission, a drain of the sixth transistor T6 is connected to a drain of the first control transistor TFT1, a gate 373 of the seventh transistor T7 is connected to the scanning signal line, a source of the seventh transistor T7 is connected to the reference voltage line, a drain of the seventh transistor T7 is connected to a drain of the first control transistor TFT1, and storage capacitors are connected to the power supply voltage VDD and the gate 373 of the first transistor T1, respectively.
The first anode 110 of the first light emitting cell 100 is connected to the drain of the first control transistor TFT1, the first cathode 120 of the first light emitting cell 100 is connected to the ground voltage VSS, the second anode 210 of the second light emitting cell 200 is connected to the drain of the second control transistor TFT2, and the second cathode 220 of the second light emitting cell 200 is connected to the ground voltage VSS. The power voltage VDD is higher than the ground voltage VSS.
Further, the pixel drive circuit 311 may perform a drive mode or a measurement mode, wherein the drive mode includes a first phase and a second phase, the measurement mode includes a device measurement mode and a pixel measurement mode, and the device measurement mode includes a third phase and a fourth phase.
Specifically, with continued reference to fig. 4, in the driving mode, the first light emitting unit 100 or the second light emitting unit 200 emits light according to the data signal and the control signal. Wherein the first phase of the driving mode comprises: the second transistor T2 is switched to its on state to turn on the drain and gate 373 of the first transistor T1 to turn on the source and data signal line of the first transistor T1 through the fourth transistor T4T 4. Thereby pre-compensating for the influence of the threshold voltage Vth on the source-drain current of the first transistor T1 in the second phase by charging the storage capacitor C and the first gate 373 of the first transistor T1. The second phase of the drive mode comprises: the source of the first transistor T1 and the power supply voltage VDD are turned on by the third transistor T3, and the first gate 373 and the drain of the first transistor T1 are turned off. In the light emitting phase, the first light emitting cell 100 is electrically connected to the power voltage VDD through the first transistor T1, thereby allowing a current to flow to the first light emitting cell 100 or the second light emitting cell 200 according to the voltage Vdata of the data signal line.
In the device measurement mode, a current flowing to the first light emitting cell 100 or the second light emitting cell 200 may be measured to determine a degradation of the relevant device characteristics. The third phase of the device measurement mode includes: the gate 373 of the first transistor T1 and the reference voltage line are turned on to switch the first transistor T1 to the triode mode. The fourth phase of the device measurement mode includes: turning on the source electrode of the first transistor T1 and the data signal line to flow a current between the data signal line and the first or second light emitting cell 100 or 200; the drain of the first transistor T1 and the first light emitting cell 100 are turned on by the sixth transistor T6T6 to connect the data signal line and the first light emitting cell 100 or the second light emitting cell 200, so that a known bias voltage is supplied to the light emitting cell through the data signal line, thereby measuring a current generated in response to the voltage. In the fourth phase of the device measurement mode, the first transistor T1 remains in triode mode, so that the source-drain current is approximately proportional to the source-drain voltage. Also, in the triode mode, the resistance value between the source and drain electrodes of the first transistor T1 is small so that the voltage drop between the data signal line and the first anode 110 of the first light emitting cell 100 can be ignored or corrected.
In the pixel measurement mode, the drive transistor can be programmed with a known data voltage Vdata to measure the current in the pixel in the analog drive mode. In this embodiment, the pixel measurement mode includes a programming phase similar to the first phase of the driving mode described above, and a current measurement phase similar to the fourth phase of the device measurement mode described above. Specifically, the programming phase of the pixel measurement mode includes: the second transistor T2 is turned on to turn on the drain and gate 373 of the first transistor T1, and the source and data signal line of the first transistor T1 are turned on through the third transistor T3, so that the influence of the threshold voltage Vth on the source-drain current of the first transistor T1 in the current measurement phase is pre-compensated by charging the first gate 373 of the first transistor T1. The current measurement phase comprises: the source of the first transistor T1 and the data signal line are turned on to enable a current to flow between the data signal line and the first light emitting cell 100 through the first transistor T1, and the drain of the first transistor T1 and the first light emitting cell 100 are turned on through the sixth transistor T6T6, thereby performing measurement.
Fig. 5 is a cross-sectional view of a display device 10 according to an embodiment, referring to fig. 5, in the embodiment, the first control transistors TFT1 and the second control transistors TFT2 are arranged in an array spaced apart from each other in the driving circuit layer 300. Through the arrangement of the embodiment, the first control transistor TFT1 and the second control transistor TFT2 can be optimally compatible, and are disposed in the same film layer, that is, the thickness of the driving circuit layer 300 is equal to that of one control transistor, thereby realizing the display device 10 with better light weight and thinness.
The first control transistor TFT1 and the second control transistor TFT2 are shown in fig. 5, and the first control transistor TFT1 and the second control transistor TFT2 are identical in structure, and each includes a gate 373, a source electrode connected to a data signal line through a source contact structure 375, and a drain electrode connected to a light emitting cell through a drain contact structure 376, for example, connected to the first anode 110 of the first light emitting cell 100 through the drain contact structure 376. Wherein the first light emitting unit 100 and the second light emitting unit 200 are both disposed in the groove formed by the pixel defining layer 380.
With continued reference to fig. 5, in one embodiment, the driving circuit layer 300 further includes: an intermediate metal layer 374 disposed in a direction parallel to the driving circuit layer 300 and respectively at least partially overlapping with the anode of the second light emitting unit 200 and the drain of the second control transistor TFT2 in a direction perpendicular to the driving circuit layer 300; a first contact structure 372 for connecting the intermediate metal layer 374 and the anode of the second light emitting unit 200; a second contact structure 377 for connecting the intermediate metal layer 374 and the drain of the second control transistor TFT 2; wherein the first contact structure 372 and the second contact structure 377 both extend in a direction perpendicular to the driving circuit layer 300. In the present embodiment, by providing the intermediate metal layer 374, the second light emitting unit 200 and the drain of the second control transistor TFT2 can be electrically connected more flexibly with fewer traces.
Fig. 6 is a flowchart illustrating a method for manufacturing the display module 10 according to an embodiment, and referring to fig. 6, in the embodiment, the method includes steps 602 to 610.
In step 602, a substrate 600 is provided. The substrate 600 may be a rigid substrate 600 or a flexible substrate 600.
At step 608, the substrate 600 is stripped. Wherein the substrate 600 may be peeled by means of laser lift-off. FIG. 9 is a diagram illustrating a device structure after step 608 according to an embodiment.
Further, with continued reference to fig. 6, in one embodiment, the method further comprises:
Still further, before step 612, a polarizer layer 400 and/or a touch module (as shown in fig. 8) is formed on the first light-emitting unit 100, and a polarizer layer 400 and/or a touch module (as shown in fig. 10) is formed on the second light-emitting unit 200. Through forming polarizer layer 400, can prevent ambient light to the influence of display screen to improve display quality, and set up the function that touch-control module can further expand display module 10, thereby provide a more nimble display module 10. It is understood that the display module 10 formed through the above steps can refer to corresponding product embodiments, and the detailed description is omitted here.
FIG. 11 is a sub-flowchart of step 604, referring to FIGS. 7 and 11 in combination, according to an embodiment, wherein step 604 includes steps 1102 through 1116.
specifically, the flexible layer 320 may be further formed between the substrate 600 and the buffer layer 330, the material of the flexible layer 320 may be Polyimide (PI), and the flexible layer 320 is used to ensure the flexibility of the flexible backplane, so as to avoid damage to the device when the substrate 600 is peeled off.
A light-shielding layer may be further formed between the substrate 600 and the buffer layer 330, and the light-shielding layer covers a portion of the substrate 600. The material of the light shielding layer may be a metal or an alloy capable of reflecting light, such as molybdenum, aluminum, copper, chromium, tungsten, titanium, tantalum, and the like. The light shielding material layer may be formed on the surface of the substrate 600 by physical vapor deposition, chemical vapor deposition, or other processes, and then patterned to obtain the light shielding layer, where the patterning mode may be wet etching or dry etching.
The buffer layer 330 is formed on a side of the light-shielding layer away from the substrate 600 and completely covers the substrate 600. The material of the buffer layer 330 may be an insulating material such as silicon oxide or silicon nitride, and the material is not particularly limited. Further, the buffer layer 330 may be formed by means of chemical vapor deposition.
The active layer 371 is formed on the buffer layer 330, and after the active layer 371 is formed, the active layer 371 is ion-doped or provided with a metal conductive layer, etc. to form a corresponding source region and a drain region. The material of the active layer 371 may be a metal oxide, such as Indium Gallium Zinc Oxide (IGZO), but not limited thereto, and may also be one or more of Aluminum Zinc Oxide (AZO), Indium Zinc Oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), boron-doped zinc oxide (BZO), and magnesium-doped zinc oxide (MZO). In addition, the active layer 371 may also be a polysilicon material or other materials. Further, the active layer 371 may be formed by chemical vapor deposition, physical vapor deposition, or other processes. In this step, the active layer 371 is provided for the entire layer.
The gate insulating layer 340 is formed on the active layer 371 and the buffer layer 330. The material of the gate insulating layer 340 may be an insulating material such as silicon oxide or silicon nitride, and the material thereof is not particularly limited. Further, the gate insulating layer 340 may be entirely formed on the active layer 371 by using chemical vapor deposition or other processes, and extend to cover the active layer 371 and the buffer layer 330, i.e., the gate insulating layer 340 is formed on the active layer 371 and the buffer layer 330.
At step 1104, the gate insulating layer 340 and the buffer layer 330 are etched to form a first via hole, and a conductive material is filled in the first via hole to form a first contact structure 372.
Specifically, a photoresist layer may be coated on the gate insulating layer 340, exposed and developed to form a patterned photoresist layer, the gate insulating layer 340 and the buffer layer 330 are etched using the patterned photoresist layer as a mask to form a first via hole, and then the first via hole is filled with a conductive material to form the first contact structure 372.
In step 1106, a first metal layer is formed on the gate insulating layer 340 and patterned to form a gate 373 and an intermediate metal layer 374.
Specifically, the material of the metal layer may be, but not limited to, molybdenum, aluminum, and copper, and may also be, for example, chromium, tungsten, titanium, and tantalum, and an alloy containing these, and the material thereof is not particularly limited. Further, a metal layer may be formed on the gate insulating layer 340 by a physical vapor deposition or other process, and patterned through an etching process to form the gate electrode 373 and the intermediate metal layer 374.
In step 1108, an interlayer dielectric layer 350 is formed on the gate 373, the middle metal layer 374 and the gate insulating layer 340.
Specifically, the interlayer dielectric layer 350 is formed on the gate electrode 373 and the interlayer metal layer 374, and extends to cover the gate insulating layer 340, i.e., the interlayer dielectric layer 350 is formed on the gate electrode 373, the interlayer metal layer 374 and the gate insulating layer 340. The interlayer dielectric layer 350 may be made of an insulating material such as silicon oxide or silicon nitride. Further, the interlayer dielectric layer 350 may be formed by chemical vapor deposition or other processes.
Specifically, the gate insulating layer 340 and the interlayer dielectric layer 350 are etched to form a third via hole corresponding to the source and drain regions of the active layer 371. When the gate insulating layer 340 is etched, the interlayer dielectric layer 350 may be etched by a self-aligned process. In this embodiment, after the gate 373 is formed by wet etching, the gate insulating layer 340 may not be etched, but the interlayer dielectric layer 350 may be deposited first, the etching area may be defined by a photolithography process, and then the interlayer dielectric layer 350 and the gate insulating layer 340 may be etched simultaneously, thereby saving one etching step and improving the productivity. Further, the steps of forming the second via hole and the third via hole may be performed simultaneously, and the steps may be stopped respectively with different films, thereby further improving the productivity.
Optionally, the second via hole may be formed by dry etching, the gas used in the dry etching is a fluorine-based gas, the second via hole may also be formed by wet etching using hydrofluoric acid, the second via hole may also be formed by wet etching and dry etching, and the second via hole is first wet etched by hydrofluoric acid and then dry etched by the fluorine-based gas. It is understood that, since the gate insulating layer 340 is disposed as a whole layer, the active layer 371 is protected by the gate insulating layer 340 when other layers are formed later, and thus, the active layer 371 is not affected by the subsequent processes.
And forming a source drain layer on one side of the interlayer dielectric layer 350 away from the gate insulating layer 340, and forming a source electrode and a drain electrode in a patterning mode, wherein the source electrode and the drain electrode are connected through a second through hole. The source/drain layer may be made of molybdenum, aluminum, or copper, but not limited thereto, and may also be made of chromium, tungsten, titanium, tantalum, or an alloy containing these materials. Further, the source electrode and the drain electrode may be formed on the interlayer dielectric layer 350 by a physical vapor deposition or other processes, and patterned by an etching process, and the source electrode and the drain electrode are connected through the second via hole.
At step 1116, a planarization layer 360 is formed on the interlayer dielectric layer 350, the source and the drain.
Specifically, a passivation layer may be further formed before the planarization layer 360 is formed, and the passivation layer may be made of an inorganic material such as silicon oxide or silicon nitride and is formed on the source and drain layers by chemical vapor deposition or other processes. The material of the planarization layer 360 may be photoresist, and is formed on the passivation layer by coating.
It should be understood that, although the steps in the flowcharts are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in each flowchart may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the sub-steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.
An embodiment of the present application further provides an electronic device, including the display module as described above, this embodiment realizes a double-sided display function by respectively disposing the first light-emitting unit 100 and the second light-emitting unit 200 on two opposite surfaces of the driving circuit layer 300, and furthermore, this embodiment respectively controls the first light-emitting unit 100 and the second light-emitting unit 200 through the same driving circuit layer 300, so that independent control of double-sided display can be realized by the thinner driving circuit layer 300, that is, a thinner and better electronic device is realized.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express a few embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for those skilled in the art, variations and modifications can be made without departing from the concept of the embodiments of the present application, and these embodiments are within the scope of the present application. Therefore, the protection scope of the embodiments of the present application shall be subject to the appended claims.
Claims (11)
1. A display assembly, comprising:
a first light emitting unit;
a second light emitting unit;
the driving circuit layer is internally provided with a driving module which is respectively and electrically connected with the first light-emitting unit and the second light-emitting unit and is used for respectively controlling the first light-emitting unit and the second light-emitting unit to emit light;
the first light-emitting unit and the second light-emitting unit are respectively arranged on two surfaces of the driving circuit layer, which are opposite to each other.
2. The display assembly of claim 1, wherein the first and/or second light emitting units are micro led device light emitting units.
3. The display module of claim 1, wherein the first and second light emitting cells are staggered or at least partially overlapped in a direction perpendicular to the driving circuit layer.
4. The display assembly of claim 3, further comprising a data signal line, the driving module comprising:
the pixel driving circuit is connected with the data signal line and used for transmitting the data signal;
the input end of the selection circuit is connected with the pixel driving circuit, two output ends of the selection circuit are respectively connected with the first light-emitting unit and the second light-emitting unit in a one-to-one correspondence mode, and the selection circuit is used for selectively transmitting the data signals to the first light-emitting unit and/or the second light-emitting unit according to control signals input from the outside.
5. The display assembly of claim 4, further comprising a control signal line, the selection circuit comprising:
a first control transistor, a gate of which is connected to the control signal line, a source of which is connected to the pixel driving circuit, and a drain of which is connected to the first light emitting unit;
a second control transistor, a gate of which is connected to the control signal line, a source of which is connected to the pixel driving circuit, and a drain of which is connected to the second light emitting unit;
the control signal line is used for transmitting a control signal to the first control transistor and the second control transistor so as to control the first control transistor and the second control transistor to be conducted in a time-sharing mode.
6. The display assembly of claim 5, wherein the control signal line comprises:
a first control line connected to a gate of the first control transistor;
a second control line connected to a gate of the second control transistor;
wherein the first control transistor and the second control transistor have the same conduction characteristics, and the level states of control signals transmitted by the first control line and the second control line are opposite; or
The first control transistor and the second control transistor have opposite conduction characteristics, and the level states of control signals transmitted by the first control line and the second control line are the same.
7. The display assembly of claim 5, wherein the driving circuit layer further comprises:
an intermediate metal layer;
a first contact structure for connecting the intermediate metal layer and an anode of the second light emitting unit;
a second contact structure for connecting the intermediate metal layer and a drain of the second control transistor;
wherein the first contact structure and the second contact structure each extend in a direction perpendicular to the driving circuit layer.
8. A method of making a display assembly, comprising:
providing a substrate;
forming a driving circuit layer on the substrate, wherein a driving module is arranged in the driving circuit layer;
forming a first light emitting unit on the driving circuit layer, wherein the first light emitting unit is electrically connected with the driving module;
peeling off the substrate;
and forming a second light-emitting unit on the surface of the side, far away from the first light-emitting unit, of the driving circuit layer, wherein the second light-emitting unit is electrically connected with the driving module.
9. The method according to claim 8, wherein forming a driving circuit layer on the substrate, the driving circuit layer having a driving module disposed therein, comprises:
sequentially forming a buffer layer, an active layer and a gate insulating layer on the substrate;
etching the gate insulating layer and the buffer layer to form a first via hole, and filling a conductive material in the first via hole to form a first contact structure;
forming a first metal layer on the gate insulating layer, and patterning the metal layer to form a gate and an intermediate metal layer;
forming an interlayer dielectric layer on the gate, the intermediate metal layer and the gate insulating layer;
etching the interlayer dielectric layer to form a second via hole, wherein the second via hole exposes part of the intermediate metal layer;
etching the interlayer dielectric layer and the gate insulating layer to form a third via hole, wherein the active layer is exposed by the third via hole;
forming a second metal layer in the second via hole, in the third via hole and on the interlayer dielectric layer, wherein the second metal layer in the second via hole is used as a second contact structure, the second metal layer on the interlayer dielectric layer is used as a source drain layer, and the source drain layer is patterned to form a source electrode and a drain electrode;
and forming a planarization layer on the interlayer dielectric layer, the source electrode and the drain electrode.
10. A display module comprising a plurality of display elements according to any one of claims 1 to 7, wherein the driving circuit layers of the plurality of display elements are connected.
11. An electronic device comprising the display module according to claim 10.
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| CN113516915A (en) * | 2021-04-22 | 2021-10-19 | Oppo广东移动通信有限公司 | Display module, control method thereof and electronic equipment |
| CN115424538A (en) * | 2022-09-09 | 2022-12-02 | 惠科股份有限公司 | Display device and method for manufacturing the same |
| WO2023283996A1 (en) * | 2021-07-15 | 2023-01-19 | Tcl华星光电技术有限公司 | Double-sided display panel and display apparatus |
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