CN112147532A - Passive electronic load circuit - Google Patents

Passive electronic load circuit Download PDF

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Publication number
CN112147532A
CN112147532A CN202010918078.7A CN202010918078A CN112147532A CN 112147532 A CN112147532 A CN 112147532A CN 202010918078 A CN202010918078 A CN 202010918078A CN 112147532 A CN112147532 A CN 112147532A
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power supply
passive electronic
electronic load
controllable load
current sampling
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陈银浩
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Terminus Technology Group Co Ltd
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Terminus Technology Group Co Ltd
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Priority to CN202010918078.7A priority Critical patent/CN112147532A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40Testing power supplies

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  • General Physics & Mathematics (AREA)
  • Testing Electric Properties And Detecting Electric Faults (AREA)

Abstract

The application provides a passive electronic load circuit, which comprises a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit; after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested; the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load; the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested. The passive electronic load circuit provided by the application is used for collecting the current after series connection by connecting a system power supply and a controllable load in parallel in the power consumption of a test power supply/battery, the power consumption of the electronic load system is considered, the whole power supply test error caused by lack of system power consumption is avoided, and the power supply detection precision is improved.

Description

Passive electronic load circuit
Technical Field
The application belongs to the technical field of power supply testing, and particularly relates to a passive electronic load circuit.
Background
With the increasing application of the internet of things technology, the requirement of the intelligent terminal on a battery/power supply is higher and higher. How to quickly and accurately investigate whether a power supply/battery meets the working requirements of the internet of things or an intelligent terminal system becomes important work in the product development process of the internet of things and a factory production line. For example, power supply detection such as rapid testing of battery discharge capacity, rapid testing of power supply transient response, and the like. Therefore, a simple, low-cost and accurate power supply testing device, namely an electronic load, is indispensable in the development of hardware of the internet of things and the development of other electronic products. Especially when the production line faces to the batch of batteries/power supply monomers to be tested simultaneously in batch, the passive high-precision electronic load is very convenient to use, the high precision is ensured, and the trouble of connecting a power line to each load is avoided.
In the prior art, electronic loads for testing power supplies/batteries mostly use independent power supplies to supply power for electronic load systems independently. For the design of passive electronic loads, a power supply for supplying power to a system of the passive electronic loads is omitted from the perspective of environmental protection, but the test precision of the loads is sacrificed for the simplicity of circuits or the convenience of design, but for applications such as the internet of things and the like with high requirements on the power supply/loads, the test precision of the loss is not negligible.
In practice, a desktop electronic load is often used for discharge test, battery capacity measurement and power supply transient characteristic test, but the equipment is high in cost and inconvenient to use; in addition, a passive simple electronic load is often used, an external power supply is not needed, and the device can work by using a power supply to be detected, for example, a patent with the publication number of CN201110101967 named as a passive LCD display constant current electronic load, but the device has the problem of measurement accuracy errors. The power consumption of the electronic load is not calculated in the whole power consumption of the power supply to be measured, and the set value is different from the actual consumption value, so that the measurement error can be generated. But for devices with power consumption sensitive applications this error is not negligible.
Disclosure of Invention
The invention provides a passive electronic load circuit, and aims to solve the problems of large measurement error and poor measurement precision of a passive electronic load in the prior art.
According to a first aspect of embodiments of the present application, there is provided a passive electronic load circuit, including a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter, and a current sampling unit;
after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested;
the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load;
the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested.
In some embodiments of the present application, the input end of the system power supply and the input end of the controllable load are connected to the positive electrode of the power supply to be tested, and the output end of the current sampling unit is connected to the negative electrode of the power supply to be tested; the error amplifier is connected with the negative electrode of the power supply to be detected after being connected with the signal converter in series.
In some embodiments of the present application, an input terminal of the current sampling unit is connected to an anode of the power supply to be tested, a zero reference potential of the system power supply and an output terminal of the controllable load are connected to a cathode of the power supply to be tested, and the error amplifier is connected to the current sampling unit after being connected to the signal converter in series.
In some embodiments of the present application, the power supply system further includes a power domain conversion unit, where the power domain conversion unit is connected to a system power supply, and after performing voltage conversion, supplies power to each component of the passive electronic load circuit.
In some embodiments of the present application, the error amplifier includes a first operational amplifier, the signal converter includes a second operational amplifier, a first feedback resistor, and a second feedback resistor;
the non-inverting input end of the first operational amplifier is connected with the core control unit, the inverting input end of the first operational amplifier is connected with the output end of the second operational amplifier, and the output end of the first operational amplifier is connected with the control end of the controllable load;
the inverting input end and the output end of the second operational amplifier are connected with the first feedback resistor in a bridging mode; the inverting input end of the second operational amplifier is connected with the second feedback resistor and then connected with the output end of the current sampling unit; the non-inverting input end of the second operational amplifier is connected with the zero potential of the system;
the output end of the controllable load is connected with the input end of the current sampling unit.
In some embodiments of the present application, the controllable load is an N-type field effect transistor, a gate of the N-type field effect transistor is connected to the output terminal of the first operational amplifier, a drain of the N-type field effect transistor is used as the input terminal and connected to the positive electrode of the power supply to be detected, and a source of the N-type field effect transistor is used as the output terminal and connected to the input terminal of the current sampling unit.
In some embodiments of the present application, the controllable load is an N-type fet or an NPN bipolar transistor.
In some embodiments of the present application, the controllable load is a plurality of N-type fets and/or NPN bjts connected in parallel.
In some embodiments of the present application, the controllable load is a P-type fet or a PNP bipolar transistor.
In some embodiments of the present application, the controllable load is a plurality of parallel P-type fets or PNP bipolar transistors.
The passive electronic load circuit comprises a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit; after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested; the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load; the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested. The passive electronic load circuit provided by the application is used for collecting the current after series connection by connecting a system power supply and a controllable load in parallel in the power consumption of a test power supply/battery, the power consumption of the electronic load system is considered, the whole battery test error caused by lack of system power consumption is avoided, and the power detection precision is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
a circuit schematic of a prior art passive electronic load circuit is shown in fig. 1;
a circuit schematic of a passive electronic load circuit according to an embodiment of the present application is shown in fig. 2;
an implementation circuit diagram of a passive electronic load circuit according to another embodiment of the present application is shown in fig. 3;
a circuit schematic of a passive electronic load circuit according to another embodiment of the present application is shown in fig. 4.
Detailed Description
In the process of implementing the present application, the inventor finds that the electronic load is used for testing the power supply/battery, the power consumption of the electronic load in the power supply test is not calculated in the whole power consumption of the tested power supply, and the set value and the actual consumption value are different, so that the measurement error is generated. As shown in fig. 1, in the electronic load circuit in the prior art, the whole electronic load system consumes two parts of power, one is load power consumption, and the other is system power consumption. The power consumption parameters of the whole electronic load system influence the considered performance parameters of the tested power supply, if only the power consumption of the load part is calculated, and the power consumption of the system power supply is not considered, for power consumption sensitive equipment, the deviation generated by the power supply test result can generate great adverse effect, and even the evaluation result of the final equipment quality loses the evaluation value.
The passive electronic load circuit provided by the application comprises a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit; after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested; the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load; the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested. The passive electronic load circuit has the advantages that in the process of testing the electric energy consumption of a power supply/battery, the system power supply is connected with the controllable load in parallel, then the current is collected, the electric energy consumption of the system of the electronic load is considered, the whole battery testing error caused by lack of system power consumption is avoided, and the power supply detection precision is improved.
The passive electronic load circuit is simple and convenient to realize, cost is greatly saved, and the examination quality of the power supply in the development process of the Internet of things equipment is greatly improved.
In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following further detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings makes it clear that the described embodiments are only a part of the embodiments of the present application, and are not exhaustive of all embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
Example 1
A circuit schematic of a passive electronic load circuit according to an embodiment of the present application is shown in fig. 2.
As shown in fig. 2, the passive electronic load circuit of the present embodiment includes a system power supply 6, a core control unit 5, an error amplifier 3, a controllable load 1, a signal converter 4, and a current sampling unit 2; the system power supply 6 is connected with the controllable load 1 in parallel and then is connected with the current sampling unit 2 to form a branch circuit, and the branch circuit is connected between the anode Input + and the cathode Input-of the power supply to be tested.
Specifically, the core control unit 5 is connected in series with the error amplifier 3 and then connected with the control end of the controllable load 1;
the error amplifier 3 is connected with the signal converter 4 in series and then is connected with the positive electrode Input + or the negative electrode Input-of the power supply to be tested.
In the embodiment of the present application, as shown in fig. 2, an Input end of a system power supply 6 and an Input end of a controllable load 1 are connected to a positive electrode Input + of a power supply to be tested, and an output end of a current sampling unit 2 is connected to a negative electrode Input-; the error amplifier 3 is connected with the output end of the current sampling unit 2 after being connected with the signal converter 4 in series, namely is connected with the negative electrode Input-of the power supply to be detected.
In some embodiments of the present application, as shown in fig. 2, the passive electronic load circuit further includes a power domain converting unit 7, where the power domain converting unit 7 is connected to the system power supply 8, and after performing voltage conversion, supplies power to other components of the passive electronic load circuit.
Further, regarding the interface of the passive electronic load, because the whole passive electronic load does not need additional power supply, the passive electronic load external interface of the present application only has the shown power supply interface to be tested, i.e. the Input + and Input-ports as shown in fig. 2, in addition to the control and communication interfaces. The Input + corresponds to the positive pole of the power supply/battery to be tested, and the Input-end corresponds to the negative pole of the power supply/battery to be tested.
Further, the passive implementation scheme of the application is that the power consumption of the whole passive electronic load system is that the system power supply 6 is taken from two ends of the controllable load 1, and the circuit relationship is that the system power supply 6 is connected with the controllable load 1 in parallel, so that the controllable load 1 can be powered on as long as the Input end is connected to the tested device, and the whole passive electronic load system starts to work. And then, the system power supply 6 takes power and sends the power to the power domain changing unit 7 for voltage conversion and power supply to other unit circuits.
Therefore, the electricity consumption of the whole passive electronic load system is from the power supply to be tested, and the power of the actual power supply to be tested is divided by three parts: the power consumed by the system power supply 6, and the power consumed by the controllable load 1, as well as the power consumed by the current sampling unit 2.
Because the internal resistance of the current sampling unit 2 is very small, the internal resistance can be basically ignored relative to the controllable load 1, and the shared power can be also ignored, so that the power taking work of the whole system can be ignored.
In summary, the present invention is described in detail,
this application is with the concrete different parts of current electronic load to be: the current sampling point of getting electric position and feedback loop of system power 6 has been adjusted to this application.
Wherein, the sampling position of the system power supply 6 is changed from an Input + port to an Input-port to two ends of the controllable load 1;
the current sampling position of the feedback loop is changed from a point A between the controllable load 1 and the current sampling unit 2 to the lower end of the current sampling unit 2, namely an Input-port of the power supply to be tested.
In the present application, the error amplifier 3, the controllable load 1, the current sampling unit 2 and the signal converter 4 form a feedback loop, which is stabilized when the core control unit 5 gives a given setting. The control logic at this time is consistent with the feedback basic theory of the existing constant-current electronic load.
It should be noted that, since the system power supply 6 is taken from both ends of the controllable load 1, Input + is at a high potential, and the point a is grounded at a system 0 potential point, the Input-end is at a negative voltage with respect to the point a. Therefore, the signal converter 4 is used for converting the negative voltage into the positive voltage in a certain proportion, and converting the negative voltage on the current sampling unit 2 into the positive voltage to feed back to the feedback loop for calculating the current.
The signal converter 4 may be an inverting proportional amplifier, or other signal processing unit with the same effect. The magnification is more than or equal to-1, and the specific magnification is determined according to the specific design requirement.
Further, in the above-mentioned case,
regarding the core control unit 5, the core control unit 5 may be a set of embedded systems, have certain computing power, may include mechanisms required for human-computer interaction, such as a keyboard and a display device, may include an analog-to-digital conversion unit, may include a digital-to-analog conversion unit, and the like. The power supply of the embedded system of the core control unit 5 is typically a fixed lower voltage value, such as 3.3V. This power can be converted from the system power 6 via the power domain conversion unit 7. The core control unit 5 is a general circuit unit, and the principle of the control part of the existing electronic load is consistent.
In the present application, the core control unit 5 functions as: a) a basic parameter setting input interface and an information output method are provided. If the working parameters of the controllable load 1 are set, the working parameters of the controllable load 1 are displayed in real time, and the like; b) voltage and current parameters of the controllable load 1 can be collected in real time; c) and calculating the working parameters of the controllable load 1 in real time, and adjusting the working point of the controllable load 1 by adjusting the error amplification unit 3 in real time. Especially, when the controllable load 1 works in a constant-resistance and constant-power mode, the core control unit 5 needs to acquire system voltage and current parameters in real time, and then calculate and adjust a working point in real time.
In particular, the method comprises the following steps of,
an implementation circuit diagram of a passive electronic load circuit according to another embodiment of the present application is shown in fig. 2.
In some embodiments of the present application, as shown in fig. 2, the error amplifier 3 includes a first operational amplifier a1, and the signal converter 4 includes a second operational amplifier a2, a first feedback resistor Rf, and a second feedback resistor Ri.
Further, the air conditioner is provided with a fan,
the non-inverting input terminal of the first operational amplifier a1 is connected to the core control unit 5, the inverting input terminal of the first operational amplifier a1 is connected to the output terminal of the second operational amplifier a2, and the output terminal of the first operational amplifier a1 is connected to the control terminal of the controllable load 1.
Further, the air conditioner is provided with a fan,
the inverting input and output of the second operational amplifier a2 are connected across the first feedback resistor Rf; the inverting input end of the second operational amplifier A2 is connected with the output end of the current sampling unit 2 after being connected with the second feedback resistor Ri in series; the non-inverting input of the second operational amplifier A2 is connected to the system zero potential.
Further, the air conditioner is provided with a fan,
the output end of the controllable load 1 is connected with the input end of the current sampling unit 2; the output end of the controllable load 1 and the input end of the current sampling unit 2 are both grounded.
In some embodiments of the present application, the controllable load 1 is an N-type fet or an NPN bipolar transistor.
Specifically, in this embodiment, as shown in fig. 2, the controllable load 1 is an N-type field effect transistor, and a gate of the N-type field effect transistor is connected to the output end of the first operational amplifier a 1; the drain electrode of the N-type field effect transistor is used as an Input end and is connected with the anode Input + of the power supply to be detected; and the source electrode of the N-type field effect transistor is used as an output end and is connected with the input end of the current sampling unit 2.
Further, as shown in fig. 2, the controllable load 1 is used as an energy consumption element, and an N-type field effect transistor (MOSFET) is used; the current sampling unit 2 adopts a small-resistance resistor Rsa; the error amplifier 3 is mainly composed of an operational amplifier A1, a peripheral secondary element is omitted from the figure 2, the non-inverting input end of the operational amplifier A1 is connected with the core control unit 5 and is connected with a set signal, and the inverting input end of the operational amplifier A1 is connected with a feedback signal; the signal converter 4 mainly comprises an operational amplifier a2, a feedback resistor Ri and a resistor Rf to form an inverting proportional amplifier, and peripheral minor elements are omitted from fig. 2, and the right end of Ri is a signal input end and is connected to the output end of the current sampling unit 2.
In the concrete implementation, the method comprises the following steps of,
when the resistance Rsa is 0.5 Ω, the resistance Ri is 10k, and the resistance Rf is 10k, it is known that the amplification factor of the second operational amplifier a2 is-1. The second operational amplifier a2 converts the negative voltage signal at the lower end of the resistor Rsa into a positive voltage. At this time, if the core control unit 5 provides a voltage with a set value of 0.5V to the first operational amplifier a1, the discharging current of the system is 1A at this time. The measured current is now accurate because the system power also flows through resistor Rsa.
In some other embodiments of the present application, the controllable load is a plurality of N-type fets and/or NPN bjts connected in parallel, and the connection and principle thereof refer to the working principle of one N-type fet, and the connection is adjusted according to different circuit parameters and test requirements, which is not described herein again.
Compared with the prior art, the passive electronic load circuit of the embodiment of the application realizes high-precision measurement of power supply measurement.
In particular, the method comprises the following steps of,
compared with the prior art, the system power supply 6 is connected with the controllable load 1 in parallel, and then the current sampling unit 2 is connected, so that the working energy consumption of the whole system is calculated to the energy consumption of the power supply to be measured, the error is reduced, and the calculation precision is improved.
By way of example, it is possible to illustrate,
as shown in fig. 1, in the prior art, the current of the whole electronic load is set to be 1A, and the system power source consumes 30mA, during calculation, the current sampling unit 2 only calculates the 1A current, neglects the 30mA system power consumption, and generates an error of 30 mA.
In comparison, as shown in fig. 2, the current of the whole electronic load is set to be 1A in the present application, but since the load current and the system current are added to calculate the current, the circuit automatically sets the controllable load to 970mA only, and finally the power consumption of the whole system is 1A, and the set power consumption and the actual power consumption are consistent, so that errors are avoided.
Therefore, on the basis of realizing passive work of the electronic load, the power consumption of the system per se is automatically calculated into the load consumption by means of the improved circuit structure, so that errors caused by the fact that the power consumption of the system per se is not calculated in the prior art are avoided, and more accurate load testing and calculation of related electrical parameters are realized.
The passive electronic load circuit comprises a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit; after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested; the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load; the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested. The system power supply is connected with the controllable load in parallel, the current after series connection is collected, the electric energy consumption of the electronic load system is considered, the whole battery test error caused by lack of system power consumption is avoided, and the power supply detection precision is improved.
Example 2
The passive electronic load circuit of this embodiment 2 and the passive electronic load circuit of embodiment 1 are of a dual structure, and for details not disclosed in the passive electronic load circuit of this embodiment, please refer to specific implementation contents of the passive electronic load circuits in other embodiments.
A circuit schematic of a passive electronic load circuit according to another embodiment of the present application is shown in fig. 4.
As shown in fig. 4, the Input end of the current sampling unit 2 is connected to the positive Input + of the power supply to be detected, the zero reference potential of the system power supply 6 and the output end of the controllable load 1 are connected to the negative Input of the power supply to be detected, and the error amplifier 3 is connected to the current sampling unit after being connected to the signal converter 4.
As shown in fig. 4, the system is still energy consuming, and the power-taking points are at two ends of the controllable load 1, but the difference is that the positions of the controllable load 1 and the current sampling 2 are exchanged due to the change of the circuit structure, and the power-taking points are between the point a and the Input-. At this time, the Input-terminal is at the system 0 potential, and the point A is the positive electrode of the system power supply.
Specifically, the controllable load 1 is a P-type MOSFET or a PNP-type bipolar transistor as an energy consumption element;
specifically, the signal converter 4 functions to convert a potential higher than the system potential into a level within the proportional system potential.
In the embodiment of the present application, the controllable load 1 is a P-type fet or a PNP bipolar transistor.
In some embodiments of the present application, the controllable load is a plurality of parallel P-type fets or PNP bipolar transistors.
The passive electronic load circuit comprises a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit; after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested; the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load; the error amplifier is connected with the signal converter in series and then connected with the anode or the cathode of the power supply to be tested. The system power supply is connected with the controllable load in parallel, the current after series connection is collected, the electric energy consumption of the electronic load system is considered, the whole battery test error caused by lack of system power consumption is avoided, and the power supply detection precision is improved.
The core unit of the passive electronic load circuit is an energy consumption element, namely a controllable load 1 and an error amplifier 3, and the electronic load 1 can form working modes such as constant current, constant voltage, constant resistance, constant power and the like according to different connection relations or control logics.
The embodiment 1 of the application specifically discloses an improvement on the structure of the existing constant current load circuit. The operation modes of the other three electronic loads can be adjusted and converted by corresponding circuits, and are suitable for the circuit structure, which is not specifically described herein. It should be understood that based on the improved principle of the present application, the improved structure of the circuit in three modes of constant voltage, constant resistance, constant power, etc. is also within the protection scope of the present application.
It should be understood that the dimensions of the various features shown in the drawings are not drawn to scale for ease of illustration.
The above description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the application, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
In addition, technical solutions between the various embodiments of the present application may be combined with each other, but it must be based on the realization of the technical solutions by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination of technical solutions should be considered to be absent and not within the protection scope of the present application.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present invention. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (10)

1. A passive electronic load circuit is characterized by comprising a system power supply, a core control unit, an error amplifier, a controllable load, a signal converter and a current sampling unit;
after the system power supply is connected with the controllable load in parallel, the system power supply is connected with the current sampling unit to form a branch circuit, and the branch circuit is connected between the anode and the cathode of the power supply to be tested;
the core control unit is connected with the error amplifier in series and then connected with the control end of the controllable load;
and the error amplifier is connected with the positive electrode or the negative electrode of the power supply to be detected after being connected with the signal converter in series.
2. The passive electronic load circuit according to claim 1, wherein the input end of the system power supply and the input end of the controllable load are connected to the positive pole of the power supply to be tested, and the output end of the current sampling unit is connected to the negative pole of the power supply to be tested; and the error amplifier is connected with the negative electrode of the power supply to be detected after being connected with the signal converter in series.
3. The passive electronic load circuit according to claim 1, wherein an input end of the current sampling unit is connected to a positive electrode of the power supply to be tested, a zero reference potential of the system power supply and an output end of the controllable load are connected to a negative electrode of the power supply to be tested, and the error amplifier is connected to the current sampling unit after being connected to the signal converter.
4. The passive electronic load circuit according to any one of claims 1 to 3, further comprising a power domain transforming unit, wherein the power domain transforming unit is connected to the system power supply, and supplies power to each component of the passive electronic load circuit after performing voltage transformation.
5. The passive electronic load circuit according to claim 1 or 2, wherein the error amplifier comprises a first operational amplifier, the signal converter comprises a second operational amplifier, a first feedback resistor, and a second feedback resistor;
the non-inverting input end of the first operational amplifier is connected with the core control unit, the inverting input end of the first operational amplifier is connected with the output end of the second operational amplifier, and the output end of the first operational amplifier is connected with the control end of the controllable load;
the inverting input end and the inverting output end of the second operational amplifier are connected with the first feedback resistor in a bridging mode; the inverting input end of the second operational amplifier is connected with the second feedback resistor and then connected with the output end of the current sampling unit; the non-inverting input end of the second operational amplifier is connected with a system zero potential;
the output end of the controllable load is connected with the input end of the current sampling unit.
6. The passive electronic load circuit according to claim 5, wherein the controllable load is an N-type fet, a gate of the N-type fet is connected to the output terminal of the first operational amplifier, a drain of the N-type fet serves as the input terminal and is connected to the positive electrode of the power supply to be tested, and a source of the N-type fet serves as the output terminal and is connected to the input terminal of the current sampling unit.
7. The passive electronic load circuit of claim 2, wherein the controllable load is an N-type fet or an NPN bipolar transistor.
8. The passive electronic load circuit according to claim 2, wherein the controllable load is a plurality of N-type fets and/or NPN bjts connected in parallel.
9. The passive electronic load circuit of claim 3, wherein the controllable load is a P-type fet or a PNP bipolar transistor.
10. The passive electronic load circuit of claim 3, wherein the controllable load is a plurality of parallel P-type fets or PNP bipolar transistors.
CN202010918078.7A 2020-09-03 2020-09-03 Passive electronic load circuit Pending CN112147532A (en)

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CN202010918078.7A CN112147532A (en) 2020-09-03 2020-09-03 Passive electronic load circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010918078.7A CN112147532A (en) 2020-09-03 2020-09-03 Passive electronic load circuit

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CN112147532A true CN112147532A (en) 2020-12-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
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