CN112134660A

CN112134660A - Communication method and device

Info

Publication number: CN112134660A
Application number: CN201910549898.0A
Authority: CN
Inventors: 汪凡; 丁梦颖
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-06-24
Filing date: 2019-06-24
Publication date: 2020-12-25
Anticipated expiration: 2039-06-24
Also published as: CN112134660B; WO2020259231A1

Abstract

The application provides a communication method and device. The method comprises the following steps: the preamble is designed to be the weighted sum of a plurality of quasi-orthogonal sequences, or the weighted sum of a plurality of orthogonal sequences, so that the capacity of the preamble can be expanded in limited physical resources, and the requirement of a large number of terminals for accessing the network can be met.

Description

Communication method and device

Technical Field

The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for communication.

Background

In a wireless communication network, a terminal may send a preamble to a network device to initiate a random access procedure when attempting to access a wireless network. However, the physical resource capable of carrying the preamble is limited, which results in insufficient capacity of the preamble and fails to satisfy the requirement of a large number of terminals to access the network. Therefore, how to expand the capacity of the preamble in the limited physical resources becomes a problem to be solved urgently.

Disclosure of Invention

The embodiment of the application provides a communication method and device.

In a first aspect, an embodiment of the present application provides a communication method, which may be performed by a terminal or a component (e.g., a processor, a chip, or a system-on-chip) of the terminal, including: a first sequence of length N { x (N), N ═ 0,1, …, N-1} is obtained and sent to a network device or terminal. Wherein the elements x (n) in the first sequence satisfy the following formula:

wherein, { s }_m(N), N is 0,1, …, N-1, and is one of M second sequences of length N, which are included in a second sequence set, which is an orthogonal sequence set or a quasi-orthogonal sequence set. The second sequence may be referred to as a base sequence, and the second sequence set may be referred to as a base sequence set. { a (M) }, M ═ 0,1, …, M-1} is a third sequence of length M, which is one of the set of orthogonal sequences, one of the set of quasi-orthogonal sequences, a portion of one of the set of orthogonal sequences, or a portion of one of the set of quasi-orthogonal sequences. The third sequence may also be referred to as a feature mask, a feature mask sequence, a weighted mask sequence, a weighted sequence, or the like. M is 0. ltoreq. m<M is an integer of 0 to n<N, and the above N and M are integers greater than 1.

By the method, the sequence corresponding to the terminal signal is designed to be the weighted sum of a plurality of quasi-orthogonal sequences or the weighted sum of a plurality of orthogonal sequences, and the capacity of the sequence corresponding to the terminal signal is increased in two dimensions (the dimension of the base sequence and the dimension of the characteristic mask), so that the capacity of the sequence corresponding to the terminal signal can be expanded in limited physical resources, and the requirements of a large number of terminals for accessing a network or transmitting signals are met. In addition, because the base sequence and the feature mask in the method both have low cross-correlation characteristics, the capacity of the sequence corresponding to the terminal signal can be expanded, and meanwhile, the good detection performance of the sequence corresponding to the terminal signal can be ensured.

With reference to the first aspect, in certain embodiments of the first aspect, the first sequence is one of: a sequence of a preamble signal, a sequence of a demodulation reference signal (DMRS), a sequence of a Phase Tracking Reference Signal (PTRS), a sequence of a Sounding Reference Signal (SRS), a sequence of a synchronization signal, a sequence of a measurement reference signal, or a sequence of a discovery signal. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals. Optionally, when the first sequence is a sequence of a preamble, a value of N may be 839, 864, 144, or 139, and a value of M may be 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4, but the application does not limit other values of N and M. Optionally, when the first sequence is a sequence of a DMRS, a value of N may be 71, 72, 139, or 144, and a value of M may be 6, 8, 12, 18, 24, or 32, but the application does not limit other values of N and M.

With reference to the first aspect, in certain embodiments of the first aspect, the second sequence { s }_m(N), N ═ 0,1, …, N-1} is a Zadoff-chu (ZC) sequence, or a sequence obtained by performing a first process on a ZC sequence, the first process including Discrete Fourier Transform (DFT) and/or Cyclic Shift (CS). Alternatively, the ZC sequence in this segment may be replaced with a pseudo-random noise (PN) sequence or an m-sequence.

With reference to the first aspect, in certain embodiments of the first aspect, the third sequence { a (M) }, M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained by second processing of a ZC sequence, or a portion of a sequence obtained by second processing of a ZC sequence, the second processing including normalization and/or CS. Optionally, the normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller (reed muller) sequence, or a reed solomon (reed solomon) sequence.

With reference to the first aspect, in certain embodiments of the first aspect, the method further comprises: configuration information for configuring parameters related to the second set of sequences and parameters related to the third sequence is obtained. Optionally, the configuration information is predefined or carried by one or more of: system information, Radio Resource Control (RRC) signaling, Medium Access Control (MAC) Control Element (CE), or control channel. Optionally, the parameters related to the second set of sequences are used to configure: a root used in obtaining the second sequence, and/or a cyclic shift used in obtaining the second sequence. Optionally, the parameter related to the third sequence is used to configure: the root used in obtaining the third sequence, and/or the number or index of the third sequence.

By configuring the relevant parameters of the second sequence set by the above-mentioned configuration method, it is possible to reduce interference between devices by configuring different devices to use different second sequence sets. By configuring the related parameters of the third sequence by the above-configured method, different devices can obtain their own third sequences, so that collisions between the devices transmitting signals corresponding to the first sequence can be reduced or avoided.

In a second aspect, embodiments of the present application provide another communication method. The method may be performed by a network device or may be performed by a component of a network device (e.g., a processor, a chip, or a system of chips, etc.). Alternatively, the method may be performed by the terminal, or may be performed by a component of the terminal (e.g., a processor, a chip, or a system of chips, etc.). The method comprises the following steps: one or more first sequences of length N { x (N) ═ 0,1, …, N-1} are received from the terminal and communications are conducted with the terminal based on the one or more first sequences. The elements x (n) in the first sequence satisfy the following formula:

wherein, { s }_m(N), N is 0,1, …, N-1, and is one of M second sequences of length N, which are included in a second sequence set, which is an orthogonal sequence set or a quasi-orthogonal sequence set. The second sequence may be referred to as a base sequence, and the second sequence set may be referred to as a base sequence set. { a (M), M ═ 0,1, …, M-1 is a third sequence of length M, the third sequence being one of a set of orthogonal sequences, one of a set of quasi-orthogonal sequences, a portion of one of a set of orthogonal sequences, or a portion of one of a set of quasi-orthogonal sequences. The third sequence may also be referred to as a feature mask, a feature mask sequence, a weighted mask sequence, a weighted sequence, or the like. M is 0. ltoreq. m<M is an integer of 0 to n<N, and the above N and M are integers greater than 1.

With reference to the second aspect, in certain embodiments of the second aspect, the first sequence is one of: a sequence of preamble signals, a sequence of DMRS, a sequence of PTRS, a sequence of SRS, a sequence of synchronization signals, a sequence of measurement reference signals, or a sequence of discovery signals. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals. Optionally, when the first sequence is a sequence of a preamble, the value of N may be 839, 864, 144, or 139, and the value of M may be 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4, but the application does not limit other values of N and M. Optionally, when the first sequence is a sequence of DMRS, a value of N may be 71, 72, 139, or 144, and a value of M may be 6, 8, 12, 18, 24, or 32, but the application does not limit other values of N and M.

In certain embodiments of the second aspect in combination with the second aspect, the second sequence { s }_m(N), N ═ 0,1, …, N-1} is a ZC sequence, or a sequence obtained by subjecting a ZC sequence to a first process including DFT and/or CS. Alternatively, the ZC sequence in this segment may be replaced with a PN sequence or an m sequence.

With reference to the second aspect, in certain embodiments of the second aspect, the third sequence { a (M), M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained from the ZC sequence through a second process, or a portion of a sequence obtained from the ZC sequence through a second process, the second process including normalization and/or CS. Optionally, the normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller sequence, or a reed solomon sequence.

With reference to the second aspect, in certain embodiments of the second aspect, the method further comprises: and sending configuration information to the terminal, wherein the configuration information is used for configuring the parameters related to the second sequence set and the parameters related to the third sequence. Optionally, the configuration information is carried by one or more of: system information, RRC signaling, MAC CE, or control channel. Optionally, the parameters related to the second sequence set are used to configure: a root associated with the second sequence, and/or a cyclic shift associated with the second sequence. Optionally, the parameter related to the third sequence is used to configure: a root associated with the third sequence, and/or a number or index of the third sequence.

In a third aspect, an embodiment of the present application provides an apparatus, which may implement the method in the first aspect or any one of the possible implementation manners of the first aspect. The apparatus comprises corresponding units or means for performing the above-described method. The means comprised by the apparatus may be implemented by software and/or hardware means. The device may be, for example, a terminal, or a chip, a chip system, a processor, or the like that can support the terminal to implement the method.

In a fourth aspect, embodiments of the present application provide an apparatus, which may implement the method in the second aspect or any one of the possible implementation manners of the second aspect. The apparatus comprises corresponding units or means for performing the above-described method. The means comprised by the apparatus may be implemented by software and/or hardware means. The apparatus may be, for example, a network device (e.g., a base station), or a chip, a chip system, or a processor that can support the network device to implement the method described above. The apparatus may be, for example, a terminal, or a chip, a system-on-a-chip, or a processor that can support a terminal to implement the above-described method.

In a fifth aspect, the present application provides an apparatus comprising: a processor coupled to a memory, the memory being configured to store a program or instructions that, when executed by the processor, cause the apparatus to perform the method of the first aspect, or any of the possible embodiments of the first aspect.

In a sixth aspect, the present application provides an apparatus comprising: a processor coupled to a memory for storing a program or instructions which, when executed by the processor, cause the apparatus to carry out the method of the second aspect described above, or any one of the possible embodiments of the second aspect.

In a seventh aspect, the present application provides a storage medium having stored thereon a computer program or instructions which, when executed, cause a computer to perform the method of the first aspect, or any one of the possible implementations of the first aspect.

In an eighth aspect, the present application provides a storage medium having stored thereon a computer program or instructions which, when executed, cause a computer to perform the method of the second aspect described above, or any one of the possible embodiments of the second aspect.

In a ninth aspect, an embodiment of the present application provides a communication system, including: the apparatus of the third aspect above, and/or the apparatus of the fourth aspect above.

In a tenth aspect, an embodiment of the present application provides a communication system, including: the apparatus of the fifth aspect above, and/or the apparatus of the sixth aspect above.

Drawings

Fig. 1 is a schematic diagram of a communication system applied to an embodiment provided in the present application;

fig. 2 shows an exemplary architecture of a communication system;

fig. 3 is an interaction diagram illustrating a communication method according to an embodiment of the present application;

FIGS. 4A-4C are schematic diagrams illustrating several second sequences of acquisition provided by embodiments of the present application;

FIGS. 5A-5D are schematic diagrams illustrating a third sequence of several implementations provided by embodiments of the present application;

fig. 6 is a schematic structural diagram of a communication device according to an embodiment of the present application;

fig. 7 is a schematic structural diagram of a terminal according to an embodiment of the present application;

fig. 8 is a schematic diagram of another communication device according to an embodiment of the present application.

Detailed Description

The communication method and the communication device provided by the embodiment of the application can be applied to a communication system. Fig. 1 shows a schematic diagram of a communication system. The communication system includes one or more network devices (network device 10 and network device 20 are shown for clarity) and one or more terminal devices in communication with the one or more network devices.

Terminal devices

11 and 12 are shown in fig. 1 in communication with network device 10, and

terminal devices

21 and 22 are shown in communication with network device 20. It is to be understood that the network device and the terminal device may also be referred to as communication devices.

The techniques described in embodiments of the present invention may be used in various communication systems, such as fourth generation (4)^thgeneration, 4G) communication system, 4.5G communication system, 5G communication system, a system in which a plurality of communication systems are merged, or a communication system that evolves in the future. Such as Long Term Evolution (LTE) systems, New Radio (NR) systems, wireless fidelity (WiFi) systems, and 3rd generation partnership project (3 GPP) related communication systems, among others.

Fig. 2 shows an exemplary schematic diagram of a possible architecture of a communication system, in which a network device in a Radio Access Network (RAN) shown in fig. 2 is a base station (e.g., a gNodeB or a gNB) of a Centralized Unit (CU) and Distributed Unit (DU) separated architecture. The RAN may be connected to a core network (e.g., LTE core network, 5G core network, etc.). CU and DU can be understood as the division of the base stations from a logical functional point of view. CUs and DUs may be physically separate or deployed together. A plurality of DUs can share one CU. A DU may also connect multiple CUs (not shown). The CU and DU may be connected via an interface, such as an F1 interface. CUs and DUs may be partitioned according to protocol layers of the wireless network. For example, functions of a Packet Data Convergence Protocol (PDCP) layer and a Radio Resource Control (RRC) layer are provided in the CU, and functions of a Radio Link Control (RLC), a Medium Access Control (MAC) layer, a physical (physical) layer, and the like are provided in the DU. It is to be understood that the division of CU and DU processing functions according to such protocol layers is merely an example, and may be performed in other manners. For example, a CU or DU may be partitioned to have more protocol layer functionality. For example, a CU or DU may also be divided into partial processing functions with protocol layers. In one design, some of the functions of the RLC layer and the functions of the protocol layers above the RLC layer are set in the CU, and the remaining functions of the RLC layer and the functions of the protocol layers below the RLC layer are set in the DU. In another design, the functions of a CU or DU may also be divided according to the service type or other system requirements. For example, dividing by time delay, setting the function that processing time needs to meet the time delay requirement in DU, and setting the function that does not need to meet the time delay requirement in CU. The network architecture shown in fig. 2 may be applied to a 5G communication system, which may also share one or more components or resources with an LTE system. In another design, a CU may also have one or more functions of the core network. One or more CUs may be centrally located or separately located. For example, the CUs may be located on the network side to facilitate centralized management. The DU may have multiple rf functions, or may have a remote rf function.

The CU functions may be implemented by one entity, or the Control Plane (CP) and the User Plane (UP) may be further separated, that is, the control plane (CU-CP) and the user plane (CU-UP) of the CU may be implemented by different functional entities, and the CU-CP and the CU-UP may be coupled with the DU to jointly perform the functions of the base station.

It is understood that the embodiments provided in the present application are also applicable to an architecture in which CU and DU are not separated.

In this application, the network device may be any device having a wireless transceiving function. Including but not limited to: an evolved Node B (NodeB or eNB or e-NodeB, evolved Node B) in LTE, a base station (gnnodeb or gNB) or a Transmission Reception Point (TRP) in NR, a base station evolved subsequently by 3GPP, an access Node in WiFi system, a wireless relay Node, a wireless backhaul Node, and the like. The base station may be: macro base stations, micro base stations, pico base stations, small stations, relay stations, or balloon stations, etc. Multiple base stations may support the same technology network as mentioned above, or may support different technologies networks as mentioned above. The base station may contain one or more co-sited or non co-sited TRPs. The network device may also be a wireless controller, CU, and/or DU in a Cloud Radio Access Network (CRAN) scenario. The network device may also be a server, a wearable device, or a vehicle mounted device, etc. The following description will take a network device as an example of a base station. The multiple network devices may be base stations of the same type or base stations of different types. The base station may communicate with the terminal device, and may also communicate with the terminal device through the relay station. The terminal device may communicate with a plurality of base stations of different technologies, for example, the terminal device may communicate with a base station supporting an LTE network, may communicate with a base station supporting a 5G network, and may support dual connectivity with the base station of the LTE network and the base station of the 5G network.

The terminal is a device with a wireless transceiving function, and can be deployed on land, including indoors or outdoors, handheld, wearable or vehicle-mounted; can also be deployed on the water surface (such as a ship and the like); and may also be deployed in the air (e.g., on airplanes, balloons, satellites, etc.). The terminal may be a mobile phone (mobile phone), a tablet computer (Pad), a computer with a wireless transceiving function, a Virtual Reality (VR) terminal device, an Augmented Reality (AR) terminal device, a wireless terminal in industrial control (industrial control), a vehicle-mounted terminal device, a wireless terminal in self driving (self driving), a wireless terminal in remote medical (remote medical), a wireless terminal in smart grid (smart grid), a wireless terminal in transportation safety (transportation safety), a wireless terminal in smart city (smart city), a wireless terminal in smart home (smart home), a wearable terminal device, and so on. The embodiments of the present application do not limit the application scenarios. A terminal may also sometimes be referred to as a terminal device, User Equipment (UE), access terminal device, in-vehicle terminal, industrial control terminal, UE unit, UE station, mobile station, remote terminal device, mobile device, UE terminal device, wireless communication device, UE agent, or UE device, etc. The terminals may also be fixed or mobile.

In a wireless communication network, a terminal may initiate random access to establish a connection required for communication with a network device. The terminal may send a random access preamble (preamble) to the network device to initiate a random access process, where the random access preamble may also be referred to as a preamble, a preamble signal, a preamble code, or the like, and the name of the random access preamble is not limited in this application. However, when a large number of terminals need to access the network, limited by the physical resources capable of carrying the preamble, the capacity of the preamble may be in short supply, and the requirement of a large number of terminals for accessing the network cannot be met. Therefore, how to expand the capacity of the preamble in the limited physical resources becomes a problem to be solved urgently.

In the method provided by the embodiment of the application, the preamble is designed to be a weighted sum of a plurality of quasi-orthogonal sequences, or the preamble is designed to be a weighted sum of a plurality of orthogonal sequences, so that the capacity of the preamble can be expanded in limited physical resources, and the requirement of a large number of terminals for accessing a network is met.

The physical resources in this application may include one or more of time domain resources, frequency domain resources, code domain resources, or space domain resources. For example, the time domain resource included in the physical resource may include at least one frame, at least one sub-frame, at least one slot (slot), at least one mini-slot (mini-slot), at least one time unit, or at least one time domain symbol. For example, the frequency domain resources included in the physical resources may include at least one carrier (carrier), at least one Component Carrier (CC), at least one bandwidth part (BWP), at least one Resource Block Group (RBG), at least one physical resource block group (PRG), at least one Resource Block (RB), or at least one subcarrier (sub-carrier, SC), and the like. For example, the spatial domain resources included in the physical resources may include at least one beam, at least one port, at least one antenna port, or at least one layer/spatial layer, etc. For example, the code domain resource included in the physical resource may include at least one Orthogonal Cover Code (OCC), at least one non-orthogonal multiple access (NOMA) code, and the like.

It is to be understood that the physical resources described above may be physical resources of a baseband, which may be used by a baseband chip. The physical resources may also be physical resources of the air interface. The physical resource may also be an intermediate frequency or radio frequency physical resource.

The technical solution of the present application is described in detail below with reference to specific embodiments and accompanying drawings. The following examples and implementations may be combined with each other and may not be repeated in some examples for the same or similar concepts or processes. It will be appreciated that the functions explained herein may be implemented by means of individual hardware circuits, by means of software running in conjunction with a processor/microprocessor or general purpose computer, by means of an application specific integrated circuit, and/or by means of one or more digital signal processors. When described as a method, the present application may also be implemented in a computer processor and a memory coupled to the processor.

For ease of understanding the embodiments in the present application, some concepts or terms referred to in the present application will be first briefly described.

A and B: representing the multiplication of object a by object B. The term "subject" in this application is to be understood as meaning a numerical value, a number, a monomial, or a polynomial.

A mod B: indicating modulo, i.e. indicating object a modulo object B. Or it may be understood as a remainder, i.e., the remainder obtained by dividing object a by object B.

Representing the largest integer no greater than object a.

{ q (K) ═ 0,1, …, K-1} denotes a sequence of length K { q (0), q (1), …, q (K-1) }, K being an integer greater than 1. Where q (k) represents an element in the sequence (which may also be understood as an object in the sequence), the values of the elements in the sequence may be real or complex. q. q.s^*(k) Represents the conjugate of q (k). Iiq (K), K0, 1, …, K-1 iil₂The two-norm representation of the sequence { q (K) }, K ═ 0,1, …, K-1, may also be represented as:

{{q_l(k) k is 0,1, …, K-1, L is 0, …, L-1, and L is KSet of sequences { { q { [ q ]₀(k),k＝0,1,…,K-1},{q₁(k),k＝0,1,…,K-1},…,{q_L-1(k) K is 0,1, …, K-1} }, L is an integer greater than 1. In this application, a set of sequences may also be referred to simply as a set of sequences.

And (3) orthogonal sequence set: any two sequences in the set have the characteristic of mutual orthogonality. For example, in the set of orthogonal sequences { { q { ]_l(k) Any two sequences of K-0, 1, …, K-1, L-0, …, L-1

And

(l₁is not equal to l₂) And satisfies the following conditions:

quasi-orthogonal sequence set: there is low cross-correlation between any two sequences in the set. For example, in the quasi-orthogonal sequence set { { q { ]_l(k) Any two sequences of K-0, 1, …, K-1, L-0, …, L-1

And

satisfies the following conditions:

wherein the content of the first and second substances,_qlrepresentation and sequence set { { q { }_l(k) K-0, 1, …, K-1, L-0, …, L-1 correspond to the largest of each otherOff value or a predefined cross-correlation value. It will be appreciated that the foregoing orthogonal property may be considered a special case of low cross-correlation.

ZC (Zadoff-Chu) sequence: the term "ZC sequence" in this application refers to a type of sequence, a length N ZC sequence { x }_u(N), N-0, 1, …, N-1} of the element x_u(n) satisfies

Where u is an integer greater than 0 and less than N (again understood as a ZC sequence { x })_u(N), N is a root of 0,1, …, N-1), and j represents an imaginary unit (satisfying j)²1), pi denotes a circumferential ratio.

Fig. 3 is an interaction diagram of a communication method 300 according to an embodiment of the present application. The communication method is illustrated in fig. 3 by taking a terminal and a network device as an example of the execution subject of the interaction schematic, but the application is not limited to the execution subject of the interaction schematic, for example, the execution subject of the interaction schematic may also be one terminal and another terminal. For another example, the network device in fig. 3 may be a chip, a system-on-chip, or a processor that supports the network device to implement the method, and the terminal in fig. 3 may be a chip, a system-on-chip, or a processor that supports the terminal to implement the method. As shown in FIG. 3, the method 300 of this embodiment may include:

part 310: the terminal obtains a first sequence of length N { x (N), N being 0,1, …, N-1}, the elements x (N) in the first sequence satisfying

{s_m(N), N ≦ 0,1, …, N-1} is one of M second sequences of length N, where M is an integer satisfying 0 ≦ M-1, and N is an integer satisfying 0 ≦ N ≦ M-1. The M second sequences of length N are included in the second sequence set { { s { { S { (S) }_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1), the second sequence setAnd synthesizing into an orthogonal sequence set or a quasi-orthogonal sequence set. The second sequence may be referred to as a base sequence, and the second sequence set may be referred to as a base sequence set.

{ a (M) }, M ═ 0,1, …, M-1} is a third sequence of length M, which is one of a set of orthogonal sequences, one of a set of quasi-orthogonal sequences, a portion of one of a set of orthogonal sequences, or a portion of one of a set of quasi-orthogonal sequences. The above N and M are integers of more than 1. The third sequence may also be referred to as a feature mask, a feature mask sequence, a weighted mask sequence, a weighted sequence, or the like. Optionally, the orthogonal sequence set or quasi-orthogonal sequence set referred to in this paragraph is predefined, for example, the orthogonal sequence set or quasi-orthogonal sequence set may be pre-stored in a corresponding device (e.g., a memory, a buffer, a storage medium, or other devices capable of storing data) from which the terminal reads the orthogonal sequence set or quasi-orthogonal sequence set. Alternatively, the terminal may calculate or generate the set of orthogonal sequences or the set of quasi-orthogonal sequences (e.g., in terms of a generation of the set of orthogonal sequences or the set of quasi-orthogonal sequences).

The terminal may obtain the first sequence in a number of different ways.

In one possible implementation of obtaining the first sequence, the terminal may calculate or generate the first sequence { x (N), N ═ 0,1, …, N-1}, where the element x (N) in the first sequence satisfies the above formula.

In another possible embodiment of obtaining the first sequence, the first sequence { x (N), N ═ 0,1, …, N-1} is predefined, wherein the elements x (N) in the first sequence satisfy the above formula. The elements in the first sequence (e.g., values of the elements in the first sequence) may be pre-stored in a corresponding device (e.g., a memory, a cache, a storage medium, or other device capable of storing data), and the terminal reads the elements in the first sequence from the device to obtain the first sequence.

X (n) satisfies

It can also be expressed as:

that is, the elements in the first sequence may also be represented as x_r(n), the third sequence may also be expressed as { a_r(M), M ═ 0,1, …, M-1 }. Wherein the first sequence { x_rR in (N), N-0, 1, …, N-1} may be understood as the first sequence { x_r(N), an index or number of 0,1, …, N-1, and a third sequence { a }_rR in (M), M-0, 1, …, M-1} may be understood as a third sequence { a_r(M), M is an index or number of 0,1, …, M-1}, and R can be an integer greater than or equal to 0 and less than R, where R is an integer greater than M. The third sequence { a }_r(M), M is 0,1, …, M-1} may also be understood to be included in the third set of sequences { { a { (a) }_r(M), M is 0,1, …, M-1, R is 0,1, …, R-1 }. Optionally, the value of r may be predefined, configured by the network device, or selected by the terminal (e.g., randomly selected by the terminal). In other words, there may be multiple sets of first sequences in the system. In an embodiment, one and the same third sequence may correspond to a plurality of sets of first sequences, or different third sequences may correspond to a plurality of sets of first sequences. The third sequence may be configured by the network device or selected by the terminal.

Optionally, the first sequence is one of the following: a sequence of a preamble signal, a sequence of a demodulation reference signal (DMRS), a sequence of a Phase Tracking Reference Signal (PTRS), a sequence of a Sounding Reference Signal (SRS), a sequence of a synchronization signal, a sequence of a measurement reference signal, or a sequence of a discovery signal. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals.

Optionally, the second sequence s_m(N), N is 0,1, …, N-1 is Zadoff-a chu (ZC) sequence, or a sequence obtained by first processing a ZC sequence, the first processing including Discrete Fourier Transform (DFT) and/or Cyclic Shift (CS). The ZC sequence in this section may also be replaced with a pseudo-random noise (PN) sequence or an m-sequence.

Optionally, the third sequence { a (M), M ═ 0,1, …, M-1} (or denoted as { a (M) }_r(M), M is 0,1, …, M-1}) is a ZC sequence, a part of a ZC sequence, a sequence obtained by second processing on a ZC sequence, or a part of a sequence obtained by second processing on a ZC sequence, the second processing including normalization and/or CS. Normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. The ZC sequence in this segment may be replaced with any of the following sequences: a PN sequence, an m sequence, a reed muller (reed muller) sequence, or a reed solomon (reed solomon) sequence.

Part 320: and the terminal sends the first sequence to the network equipment, and the network equipment receives the first sequence. It will be appreciated that the network device may receive one or more first sequences since there are scenarios in which one or more terminals send the first sequences to the network device. Alternatively, the network device may receive a plurality of first sequences at the same time, where "receiving a plurality of first sequences at the same time" may be understood as receiving a plurality of first sequences at the same time point, or may be understood as receiving a plurality of first sequences in a period of time, or may be understood as receiving a plurality of first sequences in the same sequence processing cycle. Optionally, after receiving the first sequence, the network device performs a cross-correlation operation (for example, performing convolution in a time domain or performing dot multiplication in a frequency domain) on the first sequence by using each second sequence in the second sequence set, so as to obtain a cross-correlation sequence corresponding to each second sequence in the second sequence set. Optionally, the received first sequence or the parameter information related to the first sequence (e.g. the number of the first sequence) may be obtained using an algorithm (e.g. a compressed sensing algorithm).

Optionally, the second set of sequences is predefined. The second set of sequences may be pre-determinedStored in a corresponding device (e.g., memory, cache, storage medium, or other device capable of storing data), from which the network device reads the second set of sequences so that the second set of sequences can be obtained and used. Alternatively, the network device may set { { s ] according to a second sequence of the subsequent description_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_mAnd (N), N is 0,1, …, N-1}, and the second sequence set is calculated or generated in a variety of different implementation manners, and specific implementation manners may refer to subsequent descriptions and are not described herein again.

Optionally, the terminal sends indication information to the network device, indicating the network device the second sequence or the second sequence set used by the terminal.

Alternatively, the network device may communicate with the terminal based on the one or more first sequences. For example, if the first sequence is a sequence of preamble signals, the network device may transmit an access response (which may also be referred to as a random access response) to the terminal based on the sequence of preamble signals. For another example, if the first sequence is a sequence of DMRS, the network device may demodulate data from the terminal according to the sequence of DMRS. It is to be understood that the present application is not limited to the particular form in which the network device communicates with the terminal based on the first sequence.

There are a number of different understandings for transmitting the first sequence in this application. For example, transmitting a first sequence may be understood as preprocessing the first sequence before transmitting. For example, transmitting the first sequence may also be understood as transmitting a signal (for example, the preamble signal, DMRS, PTRS, SRS, synchronization signal, measurement reference signal, or discovery signal) corresponding to the first sequence, and optionally the signal may be a signal obtained by preprocessing the first sequence. The pre-processing includes one or more of scrambling, modulation, layer mapping, pre-coding, power adjustment, or physical resource mapping.

According to the method, the sequence corresponding to the terminal signal is designed to be the weighted sum of a plurality of quasi-orthogonal sequences or the weighted sum of a plurality of orthogonal sequences, and the capacity of the sequence corresponding to the terminal signal is increased in two dimensions (the dimension of the base sequence and the dimension of the feature mask), so that the capacity of the sequence corresponding to the terminal signal can be expanded in limited physical resources, and the requirements of a large number of terminals for accessing a network or transmitting signals are met. In addition, because the base sequence and the feature mask in the method both have low cross-correlation characteristics, the capacity of the sequence corresponding to the terminal signal can be expanded, and meanwhile, the good detection performance of the sequence corresponding to the terminal signal can be ensured.

Optionally, the terminal may obtain configuration information, where the configuration information includes parameters related to the second sequence set and parameters related to the third sequence set. The parameter related to the second sequence set may be understood as a parameter related to the first sequence, or the parameter related to the third sequence may be understood as a parameter related to the first sequence, or the parameter related to the second sequence set and the parameter related to the third sequence may be understood as a parameter related to the first sequence. The above parameters related to the second set of sequences are used to configure: a root used in obtaining the second sequence, and/or a cyclic shift used in obtaining the second sequence. The above-mentioned parameter related to the third sequence is used to configure: the root used in obtaining the third sequence, and/or the number or index of the third sequence.

The terminal obtains the configuration information, i.e. obtains the parameters related to the second sequence set and the parameters related to the third sequence, and further generates a first sequence { x (N) with a length N (or { x (N) } 0,1, …, N-1} according to the parameters related to the second sequence set and the parameters related to the third sequence set (or expressed as { x { (N) }_r(n),n＝0,1,…,N-1})。

By configuring the relevant parameters of the second sequence set by the above-mentioned configuration method, it is possible to reduce interference between devices by configuring different devices to use different second sequence sets.

By configuring the related parameters of the third sequence by the above-mentioned configured method, different devices can obtain their own third sequences, so that collisions between the devices transmitting signals corresponding to the first sequence can be reduced or avoided.

In one possible implementation manner of obtaining the configuration information by the terminal, the method shown in fig. 3 may further include a part 305: the network equipment sends configuration information to the terminal, and the terminal receives the configuration information. The configuration information is carried by one or more of: system information, Radio Resource Control (RRC) signaling, Medium Access Control (MAC) Control Element (CE), or control channel.

In another possible embodiment, in which the terminal obtains the configuration information, the configuration information is predefined. The configuration information may be pre-stored in a corresponding device (e.g., a memory, a cache, a storage medium, or other device capable of storing data) from which the terminal reads the configuration information to obtain the configuration information.

In part 310, the second set of sequences { { s_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_mThere are many different implementations of (N), N-0, 1, …, N-1. The terminal may obtain the second set of sequences { { s ] according to these implementations_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_m(N), N is 0,1, …, N-1}, and the network device may also obtain the second set of sequences { { s } according to these implementations_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_m(n),n＝0,1,…,N-1}。

In one possible implementation of the second sequence, the second set of sequences { { s { { S { (S) }_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_m(N), N ═ 0,1, …, N-1} is a sequence obtained by CS and DFT of the ZC sequence. Taking fig. 4A as an example, fig. 4A illustrates that CS is performed on a ZC sequence and then DFT is performed to obtain a second sequence. It is understood that the ZC sequence of fig. 4A may be replaced with other kinds of sequences, such as a PN sequence or an m sequence.

In ZC sequence { x_u(i),i＝0,1,…,L_RA-1 ], a second sequence s_m(N), N-0, 1, …, N-1} for example, L_RARepresenting a ZC sequence x_u(i),i＝0,1,…,L_RALength of-1, L_RAIs greater than 1 wholeNumber, e.g. L_RAIs a prime number greater than 1 (also referred to herein as a prime number). Wherein the ZC sequence { x_u(i),i＝0,1,…,L_RAElement x in-1 }_u(i) Satisfy the requirement of

Wherein u is greater than 0 and less than L_RAIs (also understood as the ZC sequence x)_u(i),i＝0,1,…,L_RA-1} root). Optionally, the value of u is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of u is predefined.

For ZC sequence { x_u(i),i＝0,1,…,L_RA-1} CS treatment to obtain a length L_RAOf (c) sequence { x_u,v(d),d＝0,1,…,L_RA-1}, the sequence { x }_u,v(d),d＝0,1,…,L_RAElement x in-1 }_u,v(d) Satisfy the requirement of

x_u,v(d)＝x_u((d+C_v)mod L_RA),d＝0,1,…,L_RA-1

Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). Optionally, the value of v is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of v is predefined.

Alternatively, C_vIs a function related to v, e.g. C_v＝v*N_CSOr C_v＝C′+v*N_CS，N_CSAnd C' is greater than or equal to 1 and less than L_RAInteger of (1), N_CSAnd C' are configured by the network device, for example, by the configuration information in section 305 of fig. 3. Or, alternatively, C_vThe value of (a) is configured by the network device, for example, by the configuration information in section 305 of fig. 3.

For the sequence { x_u,v(d),d＝0,1,…,L_RA-1} performing a DFT process to obtain a length L_RASequence of (a) { y }_u,v(n),n＝ 0,1,…,L_RA-1}, the sequence y_u,v(n),n＝0,1,…,L_RAElement y in-1 }_u,v(n) satisfies

The sequence y_u,v(n),n＝0,1,…,L_RA-1} is the second sequence s described above_m(N), N ═ 0,1, …, N-1}, where N ═ L_RA。

Alternatively, u is a function related to m, and u may be expressed as u_m. E.g. u_mU' or

Or a

The value of u 'is configured by the network device, for example, by the configuration information in section 305 in fig. 3, or the value of u' may be predefined.

Alternatively, the value of E is configured by the network device, for example, by the configuration information in section 305 in fig. 3. H (u ') represents a function with u' as an argument, mapping u 'to another value u'.

Alternatively, v is a function related to m, and v may be expressed as v_m. For example, v_mM, M is 0,1, …, M-1, or, v_mM mod E', M0, 1, …, M-1. Wherein

Alternatively, the value of E' is configured by the network device, for example, by the configuration information in section 305 in fig. 3.

It will be appreciated that the above-described implementation of such a second sequence mainly describes how to obtain the second set of sequences { { s { { S { (S) }_m(n),n＝0,1, …, N-1, M-0, 1, …, M-1_m(N), N being 0,1, …, N-1}, a second set of sequences is obtained { { s }_mThe manner of the other second sequence in (N), N is 0,1, …, N-1, and M is 0,1, …, M-1} is the same as the above implementation manner of this second sequence, and is not described herein again.

In another possible implementation of the second sequence, the second set of sequences { { s { { S { [ S ]_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_m(N), N ═ 0,1, …, N-1} is a sequence obtained by CS for a ZC sequence. Taking fig. 4B as an example, fig. 4B illustrates that CS is performed on a ZC sequence to obtain a second sequence. It is understood that the ZC sequence of fig. 4B may be replaced with other kinds of sequences, such as a PN sequence or an m sequence.

In ZC sequence { x_u(i),i＝0,1,…,L_RA-1 ], a second sequence s_m(N), N-0, 1, …, N-1} for example, L_RARepresenting a ZC sequence x_u(i),i＝0,1,…,L_RALength of-1, L_RAIs an integer greater than 1, e.g. L_RAIs a prime number greater than 1. Wherein the ZC sequence { x_u(i),i＝0,1,…,L_RAElement x in-1 }_u(i) Satisfy the requirement of

For ZC sequence { x_u(i),i＝0,1,…,L_RA-1} CS treatment to obtain a length L_RAOf (c) sequence { x_u,v(n),n＝0,1,…,L_RA-1}, the sequence { x }_u,v(n),n＝0,1,…,L_RAElement x in-1 }_u,v(n) satisfies

x_u,v(n)＝x_u((n+C_v)mod L_RA),n＝0,1,…,L_RA-1

The sequence { x }_u,v(n),n＝0,1,…,L_RA-1} is the second sequence s described above_m(N), N ═ 0,1, …, N-1}, where N ═ L_RA. Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). Optionally, the value of v is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of v is predefined.

Alternatively, C_vIs a function related to v. E.g. C_v＝v*N_CSOr, alternatively, C_v＝C′+v*N_CS，N_CSAnd C' is greater than or equal to 1 and less than L_RAInteger of (1), N_CSAnd C' are configured by the network device, for example, by the configuration information in section 305 of fig. 3. Or, alternatively, C_vThe value of (a) is configured by the network device, for example, by the configuration information in section 305 of fig. 3.

Alternatively, u is a function related to m, and u may be expressed as u_m. E.g. u_mU', or alternatively,

alternatively, the first and second electrodes may be,

Alternatively, v is a function related to m, and v may be expressed as v_m. For example, v_mM, M is 0,1, …, M-1, or v_mM mod E', M0, 1, …, M-1. Wherein

It will be appreciated that the above-described implementation of such a second sequence mainly describes how to obtain the second set of sequences { { s { { S { (S) }_m(N), N-0, 1, …, N-1, M-0, 1, …, M-1) in a second sequence { s }_m(N), N being 0,1, …, N-1}, a second set of sequences is obtained { { s }_mThe manner of the other second sequence in (N), N is 0,1, …, N-1, and M is 0,1, …, M-1} is the same as the above implementation manner of this second sequence, and is not described herein again.

In yet another possible implementation of the second sequence, the second set of sequences { { s { { S { (S) }_m(N), N is 0,1, …, N-1, M is 0,1, …, M-1, and a second sequence { s }_m(N), N ═ 0,1, …, N-1} is a ZC sequence. Taking fig. 4C as an example, fig. 4C illustrates obtaining a second sequence from a ZC sequence. It is understood that the ZC sequence of fig. 4C may be replaced with other kinds of sequences, such as PN sequences or m sequences.

In ZC sequence { x_u(n),n＝0,1,…,L_RA-1 ], a second sequence s_m(N), N is 0,1, …, N-1}, and L_RAAs an example, L_RAIndicating the ZC sequence x_u(n),n＝0,1,…,L_RALength of-1, L_RAIs an integer greater than 1, e.g. L_RAIs a prime number greater than 1. Wherein the ZC sequence { x_u(n),n＝0,1,…,L_RAElement x in-1 }_u(n) satisfies

The ZC sequence { x_u(n),n＝0,1,…,L_RA-1} is the second sequence s described above_m(N), N is 0,1, …, N-1 }. Wherein u is greater than 0 and less than L_RAIs (also understood as the ZC sequence x)_u(n),n＝0,1,…,L_RA-1} root). Optionally, the value of u isConfigured by the network device, for example, via configuration information in section 305 of fig. 3. Or, optionally, the value of u is predefined.

Or a

Or the value of E is configured by the network device, for example, by the configuration information in section 305 in fig. 3. H (u ') represents a function with u' as an argument, mapping u 'to another value u'.

In part 310, the third sequence { a }_rThere are many different implementations of (M), M is 0,1, …, M-1 (or { a (M) }, M is 0,1, …, M-1 }). The terminal may obtain the third sequence a according to these implementations_r(M), M is 0,1, …, M-1}, and the network device may also obtain the third sequence { a } according to these implementations_r(m),m＝0,1,…,M-1}。

In one possible implementation of the third sequence, the third sequence { a }_r(M), M ═ 0,1, …, M-1} is a sequence obtained by CS for a ZC sequence. Taking FIG. 5A as an example, FIG. 5A illustrates pairing ZC sequencesCS is performed to obtain a third sequence. It is understood that the ZC sequence of fig. 5A may be replaced with other kinds of sequences, such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

In ZC sequence { x_u(i),i＝0,1,…,L_RA-1, a third sequence { a }_r(M), M is 0,1, …, M-1} for example, L_RARepresenting a ZC sequence x_u(i),i＝0,1,…,L_RALength of-1, L_RAIs an integer greater than 1, e.g. L_RAIs the maximum prime number greater than 1 and less than M, or L_RAM. Wherein the ZC sequence { x_u(i),i＝0,1,…,L_RAElement x in-1 }_u(i) Satisfy the requirement of

For ZC sequence { x_u(i),i＝0,1,…,L_RA-1, CS processing to obtain a sequence { x) of length M_u,v(M), M-0, 1, …, M-1}, and the sequence { x ═ 1}_u,v(M) 0,1, …, M-1} or a salt thereof_u,v(m) satisfies

x_u,v(m)＝x_u((m+C_v)mod L_RA),m＝0,1,…,M-1

Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). C_vIs a function related to v. E.g. C_vV or C_vIs greater than or equal to 1 and less than L ═ C' + v_RAThe value of C' is configured by the network device, for example, through the configuration information in section 305 of fig. 3. Or, alternatively, C_vIs configured by the network device, e.g., via the configuration information of section 305 of fig. 3. The sequence { x }_u,v(M), M is 0,1, …, M-1) is the third sequence { a_r(m),m＝0,1,…,M-1}。

Alternatively, u is a function related to r, and u may be expressed as u_r. E.g. u_rU' or

Or a

Or

Where u' is configured by the network device, for example, by the configuration information in section 305 of fig. 3. H (u ') represents a function with u' as an argument, and u 'is mapped to another value u'.

Alternatively, v is a function related to r, and v may be expressed as v_r. For example, v_rR, R-0, 1, …, R-1, or v_r＝r mod L_RA,r＝0,1,…,R-1。

It will be appreciated that the above implementation of such a third sequence mainly describes how a third sequence { a } is obtained_r(M), M ═ 0,1, …, M-1 }. Where r can be understood as the number and index of the third sequence. Optionally, the value of r is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of r is predefined. If the third sequence { a }_r(M), M is 0,1, …, M-1, and is included in the third sequence set { { a { (a) }_rAnd (M), where M is 0,1, …, M-1, and R is 0,1, …, R-1, the manner of obtaining other third sequences in the third sequence set is the same as the above implementation manner of such third sequences, and thus, the description thereof is omitted.

In another possible implementation of the third sequence, the third sequence { a }_r(M), M is 0,1, …, M-1} is a sequence obtained by CS normalizing a ZC sequence. Taking fig. 5B as an example, fig. 5B illustrates CS normalization of a ZC sequence to obtain a third sequence. The normalization may also beUnderstood as power adjustment, power normalization, or power scaling. It is understood that the ZC sequence of fig. 5B may be replaced with other kinds of sequences, such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

x_u,v(m)＝x_u((m+C_v)mod L_RA),m＝0,1,…,M-1

Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). C_vIs a function related to v. E.g. C_vV or C_vIs greater than or equal to 1 and less than L ═ C' + v_RAThe value of C' is configured by the network device, for example, through the configuration information in section 305 of fig. 3. Or, alternatively, C_vIs configured by the network device, e.g. by section 305 of fig. 3And configuring the sub configuration information.

For the above sequence { x_u,v(M), M is 0,1, …, M-1} and a third sequence { a with length M is obtained by normalization_r(M), M-0, 1, …, M-1}, wherein the third sequence { a }_r(M) element a in (0, 1, …, M-1) }_r(m) satisfies

a_r(m)＝β*x_u,v(m),m＝0,1,…,M-1

Where β is a normalization factor greater than 0 and less than or equal to 1, β may also be referred to as a scaling factor, a power factor, or an adjustment factor, etc. For example,

or

Or a

Or

It will be appreciated that the above implementation of such a third sequence mainly describes how a third sequence { a } is obtained_r(M), M ═ 0,1, …, M-1 }. Where r can be understood as the number and index of the third sequence. Optionally, the taking of rThe values are configured by the network device, for example, via configuration information in section 305 of fig. 3. Or, optionally, the value of r is predefined. If the third sequence { a }_r(M), M is 0,1, …, M-1, and is included in the third sequence set { { a { (a) }_rAnd (M), where M is 0,1, …, M-1, and R is 0,1, …, R-1, the manner of obtaining other third sequences in the third sequence set is the same as the above implementation manner of such third sequences, and thus, the description thereof is omitted.

In another possible implementation of the third sequence, the third sequence { a }_r(M), M is 0,1, …, M-1} is a sequence obtained by normalizing the ZC sequence. Taking fig. 5C as an example, fig. 5C illustrates normalizing ZC sequences to obtain a third sequence. This normalization can also be understood as power adjustment, power normalization, or power scaling. It is understood that the ZC sequence of fig. 5C may be replaced with other kinds of sequences, such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

In ZC sequence { x_u(m),m＝0,1,…,L_RA-1, a third sequence { a }_r(M), M is 0,1, …, M-1, and M is L_RAFor example, L_RAIndicating the ZC sequence x_u(m),m＝0,1,…,L_RALength of-1, L_RAIs an integer greater than 1. Wherein the ZC sequence { x_u(m),m＝0,1,…,L_RAElement x in-1 }_u(m) satisfies

Wherein u is greater than 0 and less than L_RAIs (also understood as the ZC sequence x)_u(m),m＝0,1,…,L_RA-1} root). Optionally, the value of u is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of u is predefined.

For ZC sequence { x_u(m),m＝0,1,…,L_RA-1, obtaining a third sequence { a) of length M_r(M), M is 0,1, …, M-1}, wherein the third sequence is saida_r(M) element a in (0, 1, …, M-1) }_r(m) satisfies

a_r(m)＝β*x_u(m),m＝0,1,…,M-1

or

Or a

Or

In another possible implementation of the third sequence, the third sequence { a }_r(M), M-0, 1, …, M-1 is ZC sequence. Taking fig. 5D as an example, fig. 5D illustrates obtaining a third sequence from a ZC sequence. It is understood that the ZC sequence of fig. 5D may be replaced with other kinds of sequences, such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

The ZC sequence { x_u(m),m＝0,1,…,L_RA-1} is the third sequence { a } described above_r(M), M ═ 0,1, …, M-1 }. Wherein u is greater than 0 and less than L_RAIs (also understood as the ZC sequence x)_u(m),m＝0,1,…,L_RA-1} root). Optionally, the value of u is configured by the network device, for example, by the configuration information in section 305 of fig. 3. Or, optionally, the value of u is predefined.

Or a

Or

Where u' is configured by the network device, for example, by the configuration information in section 305 of fig. 3. H (u') representsAnd mapping u ' to another value u ' by taking u ' as a function of the independent variable.

In another possible implementation of the third sequence, the third sequence { a }_r(M), M is 0,1, …, M-1} is a part of a sequence obtained by CS for a ZC sequence. It is understood that the ZC sequence described herein may be replaced with other kinds of sequences such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

Wherein u is greater than 0 and less than L_RAIs (also understood as the ZC sequence x)_u(i),i＝0,1,…,L_RA-1} root). Optionally, the value of u is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, alternatively, of uThe value is predefined.

For ZC sequence { x_u(i),i＝0,1,…,L_RA-1, performing CS processing to obtain a sequence { x) of length L M_u,v(M'), M ═ 0,1, …, L ═ M-1}, L being an integer greater than 1. The sequence { x }_u,v(M '), M' ═ 0,1, …, L × M-1} element x_u,v(m') satisfies

x_u,v(m′)＝x_u((m′+C_v)mod L_RA),m′＝0,1,…,L*M-1

Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). C_vIs a function related to v. E.g. C_vV or C_vIs greater than or equal to 1 and less than L ═ C' + v_RAThe value of C' is configured by the network device, for example, through the configuration information in section 305 of fig. 3. Or, alternatively, C_vThe value of (a) is configured by the network device, for example, by the configuration information in section 305 of fig. 3. The sequence { x }_u,v(M '), M' ═ 0,1, …, L × M-1} (this sequence { x can also be understood as being part of this sequence { x ═ 1}_u,v(M '), one subsequence of M' ═ 0,1, …, L × M-1) } is the third sequence { a_r(M), M ═ 0,1, …, M-1 }. Where r can be understood as the number and index of the third sequence. Optionally, the value of r is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of r is predefined.

For example, the sequence { x }_u,v(M '), M' ═ 0,1, …, L × M-1} includes L subsequences of length M. The above sequence { x_u,v(M '), M' ═ 0,1, …, L × M-1} may be represented in the form:

{x_u,v(0),x_u,v(1),…,x_u,v(M-1),x_u,v(M),x_u,v(M+1),…,x_u,v(2*M-1),…,x_u,v(l*M),x_u,v(l

*M+1),…,x_u,v((l+1)*M-1),…,x_u,v((L-1)*M),x_u,v((L-1)*M

+1),…,x_u,v(L*M-1)}

wherein, { x_u,v(0),x_u,v(1),…,x_u,v(M-1) is a first subsequence of length M (subsequence 0), { x_u,v(M),x_u,v(M+1),…,x_u,v(2M-1) is a second subsequence of length M (subsequence 1), …, { x }_u,v(l*M),x_u,v(l*M+1),…,x_u,v(l +1) M-1) is the l +1 th subsequence of length M (subsequence l), …, { x }_u,v((L-1)*M),x_u,v((L-1)*M+1),…,x_u,v(L M-1) } is the L-th subsequence of length M (subsequence L-1), wherein L is a natural number less than L (L can also be understood as the index or number of the subsequence).

The one subsequence of length M is the third sequence { a }_r(M), M ═ 0,1, …, M-1 }. For example, the subsequence l is the third sequence { a }_r(M), where M is 0,1, …, M-1}, the third sequence may be represented as

Wherein

Satisfy the requirement of

Alternatively, the different third sequences may be different subsequences described above. For example { x_u,v(0),x_u,v(1),…,x_u,v(M-1) } is the first third sequence

{x_u,v(M),x_u,v(M+1),…,x_u,v(2M-1) } is the second third sequence

Is the firstl +1 third sequences

Is the Lth third sequence

Or a

Or

In another possible implementation of the third sequence, the third sequence { a }_r(M), M is 0,1, …, M-1} is a part of a sequence obtained by CS and normalization of a ZC sequence. This normalization can also be understood as power adjustment, power normalization, or power scaling. It is understood that the ZC sequence described herein may be replaced with other kinds of sequences such as PN sequence, m sequence, reed muller sequence, or reed solomon sequence.

For ZC sequence { x_u(i),i＝0,1,…,L_RA-1, performing CS treatment to obtain sequences of length L M

L is an integer greater than 1. The sequence

Element (1) of

Satisfy the requirement of

Where v is an integer greater than or equal to 0 (also understood as a cyclically shifted number or index). C_vIs a function related to v. E.g. C_vV or C_vIs greater than or equal to 1 and less than L ═ C' + v_RAThe value of C' is configured by the network device, for example, through the configuration information in section 305 of fig. 3. Or, alternatively, C_vIs configured by the network device, e.g., via the configuration information of section 305 of fig. 3And (4) placing. For the sequence

Performing normalization processing to obtain a sequence { x with the length of L M_u,v(M '), M' ═ 0,1, …, L × M-1}, where the sequence { x ═ M-1}, where_u,v(M '), M' ═ 0,1, …, L × M-1} element x_u,v(m') satisfies

or

Or

The above sequence { x_u,v(M '), M' ═ 0,1, …, L × M-1} (this sequence { x can also be understood as being part of this sequence { x ═ 1}_u,v(M '), one subsequence of M' ═ 0,1, …, L × M-1) } is the third sequence { a_r(M), M ═ 0,1, …, M-1 }. Where r can be understood as the number and index of the third sequence. Optionally, the value of r is configured by the network device, for example, by the configuration information in section 305 in fig. 3. Or, optionally, the value of r is predefined.

*M+1),…,x_u,v((l+1)*M-1),…,x_u,v((L-1)*M),x_u,v((L-1)*M

+1),…,x_u,v(L*M-1)}

Wherein

Satisfy the requirement of

{x_u,v(M),x_u,v(M+1),…,x_u,v(2M-1) } is the second third sequence

Is the l +1 th third sequence

Is the Lth third sequence

Or a

Or

Where u' is configured by the network device, for example, by the configuration information in section 305 of fig. 3. H (u ' ') represents a function with u ' ' as an argument, mapping u ' ' to another value u ' ' '.

In part 310, the values of N and M may be related to the signal type corresponding to the first sequence.

In the embodiment where the first sequence is a preamble sequence, N may take a value of 839, 864, 144, or 139, and M may take a value of 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4. The application does not limit other values of N and M.

In an embodiment where the first sequence is a sequence of DMRS, N may take a value of 71, 72, 139, or 144, and M may take a value of 6, 8, 12, 18, 24, or 32. The application does not limit other values of N and M.

It is to be understood that ZC sequences illustrated in fig. 4A, 4B, 4C, 5A, 5B, 5C, and 5D may be identical ZC sequences or different ZC sequences, which is not limited in this application.

Corresponding to the method provided by the above method embodiment, the embodiment of the present application further provides a corresponding apparatus, which includes a module for executing the above embodiment. The module may be software, hardware, or a combination of software and hardware.

Fig. 6 shows a schematic diagram of the structure of an apparatus. The apparatus 1500 may be a network device, a terminal device, a chip system, a processor, or the like, which supports the network device to implement the method described above, or a chip, a chip system, a processor, or the like, which supports the terminal device to implement the method described above. The apparatus may be configured to implement the method described in the method embodiment, and refer to the description in the method embodiment.

The apparatus 1500 may comprise one or more processors 1501, which processors 1501 may also be referred to as processing units, which may implement certain control functions. The processor 1501 may be a general-purpose processor, a special-purpose processor, or the like. For example, a baseband processor or a central processor. The baseband processor may be configured to process communication protocols and communication data, and the central processor may be configured to control a communication device (e.g., a base station, a baseband chip, a terminal chip, a DU or CU, etc.), execute a software program, and process data of the software program.

In an alternative design, the processor 1501 may also store instructions and/or data 1503, which may be executed by the processor to cause the apparatus 1500 to perform the methods described in the above method embodiments.

In an alternative design, processor 1501 may include a transceiver unit to perform receive and transmit functions. The transceiving unit may be, for example, a transceiving circuit, or an interface circuit. The transceiver circuitry, interface or interface circuitry used to implement the receive and transmit functions may be separate or integrated. The transceiver circuit, the interface circuit or the interface circuit may be used for reading and writing code/data, or the transceiver circuit, the interface circuit or the interface circuit may be used for transmitting or transferring signals.

In yet another possible design, apparatus 1500 may include circuitry that may perform the functions of transmitting or receiving or communicating in the foregoing method embodiments.

Optionally, the apparatus 1500 may include one or more memories 1502 having instructions 1504 stored thereon, which are executable on the processor to cause the apparatus 1500 to perform the methods described in the above method embodiments. Optionally, the memory may further store data therein. Optionally, instructions and/or data may also be stored in the processor. The processor and the memory may be provided separately or may be integrated together. For example, the correspondence described in the above method embodiments may be stored in a memory or in a processor.

Optionally, the device 1500 may also include a transceiver 1505 and/or an antenna 1506. The processor 1501, which may be referred to as a processing unit, controls the apparatus 1500. The transceiver 1505 may be referred to as a transceiver unit, a transceiver circuit, a transceiver device, a transceiver module, etc. for implementing a transceiving function.

Optionally, the apparatus 1500 in this embodiment of the present application may be used to perform the method described in fig. 3 in this embodiment of the present application.

In one possible design, an apparatus 1500 (e.g., an integrated circuit, a wireless device, a circuit module, or a terminal, etc.) may comprise: a processor 1501 and a transceiver 1505. Processor 1501 is configured to obtain a first sequence { x (N) } of length N, N ═ 0,1, …, N-1, and transceiver 1505 is configured to transmit the first sequence to a network device or terminal. Wherein the elements x (n) in the first sequence satisfy the following formula:

The sequence corresponding to the terminal signal obtained and transmitted by the device is a weighted sum of a plurality of quasi-orthogonal sequences or a weighted sum of a plurality of orthogonal sequences, and the capacity of the sequence corresponding to the terminal signal is increased in two dimensions (the dimension of the base sequence and the dimension of the feature mask), so that the capacity of the sequence corresponding to the terminal signal can be expanded in limited physical resources, and the requirement that a large number of terminals access a network or transmit signals is met. In addition, because the base sequence and the feature mask both have low cross-correlation characteristics, the capacity of the sequence corresponding to the terminal signal can be expanded, and meanwhile, the sequence corresponding to the terminal signal can be ensured to have good detection performance.

In some possible embodiments of the apparatus 1500, the first sequence is one of: a sequence of preamble signals, a sequence of DMRS, a sequence of PTRS, a sequence of SRS, a sequence of synchronization signals, a sequence of measurement reference signals, or a sequence of discovery signals. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals. Optionally, when the first sequence is a sequence of a preamble, a value of N may be 839, 864, 144, or 139, and a value of M may be 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4, but the application does not limit other values of N and M. Optionally, when the first sequence is a sequence of a DMRS, a value of N may be 71, 72, 139, or 144, and a value of M may be 6, 8, 12, 18, 24, or 32, but the application does not limit other values of N and M.

In some possible embodiments of the apparatus 1500 described above, the second sequence s_m(N), N ═ 0,1, …, N-1} is a ZC sequence or a sequence obtained by performing a first process on a ZC sequence, the first process including DFT and/or CS. Alternatively, the ZC sequence in this segment may be replaced with a PN sequence or an m sequence.

In some possible embodiments of the apparatus 1500 above, the third sequence { a (M) }, M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained by second processing of a ZC sequence, or a portion of a sequence obtained by second processing of a ZC sequence, the second processing including normalization and/or CS. Optionally, normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller sequence, or a reed solomon sequence.

In some possible embodiments of the apparatus 1500, the processor 1501 is further configured to obtain configuration information, where the configuration information is used to configure parameters related to the second set of sequences and parameters related to the third sequence. Optionally, the configuration information is predefined or carried by one or more of: system information, RRC signaling, MAC CE, or control channel. Optionally, the transceiver 1505 is also configured to receive the configuration information when the configuration information is carried by one or more of system information, RRC signaling, MAC CE, or a control channel. Optionally, the parameters related to the second sequence set are used to configure: a root used in obtaining the second sequence, and/or a cyclic shift used in obtaining the second sequence. Optionally, the parameter related to the third sequence is used to configure: the root used in obtaining the third sequence, and/or the number or index of the third sequence.

By configuring the relevant parameters of the second sequence set by the device, the interference between devices can be reduced by configuring different devices to use different second sequence sets. The device configures the related parameters of the third sequence, so that different devices can obtain the unique third sequence, and the collision between the devices transmitting the signals corresponding to the first sequence can be reduced or avoided.

In another possible design, an apparatus 1500 (e.g., an integrated circuit, a wireless device, a circuit module, a network device, or a terminal, etc.) may include: transceiver 1505, the transceiver 1505 receiving one or more first sequences of length N { x (N) } 0,1, …, N-1} from a terminal, the elements x (N) in the first sequence satisfying the following equation:

The sequence corresponding to the terminal signal received by the device is a weighted sum of a plurality of quasi-orthogonal sequences or a weighted sum of a plurality of orthogonal sequences, and the capacity of the sequence corresponding to the terminal signal is increased in two dimensions (the dimension of the base sequence and the dimension of the feature mask), so that the capacity of the sequence corresponding to the terminal signal can be expanded in limited physical resources, and the requirement that a large number of terminals access to a network or send signals is met. In addition, since the base sequence and the feature mask both have low cross-correlation characteristics, the capacity of the sequence corresponding to the terminal signal can be expanded, and good detection performance of the sequence corresponding to the terminal signal can be ensured.

In some possible embodiments of the apparatus 1500, the first sequence is one of: a sequence of preamble signals, a sequence of DMRS, a sequence of PTRS, a sequence of SRS, a sequence of synchronization signals, a sequence of measurement reference signals, or a sequence of discovery signals. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals. Optionally, when the first sequence is a sequence of a preamble, a value of N may be 839, 864, 144, or 139, and a value of M may be 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4, but the application does not limit other values of N and M. Optionally, when the first sequence is a sequence of DMRS, a value of N may be 71, 72, 139, or 144, and a value of M may be 6, 8, 12, 18, 24, or 32, but the application does not limit other values of N and M.

In some possible embodiments of the apparatus 1500 described above, the second sequence s_m(N), N ═ 0,1, …, N-1} is a ZC sequence, or a sequence obtained by subjecting a ZC sequence to a first process including DFT and/or CS. Alternatively, the ZC sequence in this segment may be replaced with a PN sequence or an m sequence.

In some possible embodiments of the apparatus 1500 above, the third sequence { a (M) }, M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained from a ZC sequence through a second process, or a portion of a sequence obtained from a ZC sequence through a second process, the second process including normalization and/or CS. Optionally, normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller sequence, or a reed solomon sequence.

In some possible embodiments of the apparatus 1500, the transceiver 1505 is further configured to send configuration information to the terminal, the configuration information being configured to configure parameters related to the second set of sequences and parameters related to the third sequence. Optionally, the configuration information is carried by one or more of: system information, RRC signaling, MAC CE, or control channel. Optionally, the parameters related to the second sequence set are used to configure: a root associated with the second sequence, and/or a cyclic shift associated with the second sequence. Optionally, the parameter related to the third sequence is used to configure: a root associated with the third sequence, and/or a number or index of the third sequence. Optionally, the apparatus 1500 may further include a processor 1501, where the processor 1501 is configured to obtain or generate the configuration information.

The processors and transceivers described herein may be implemented on Integrated Circuits (ICs), analog ICs, Radio Frequency Integrated Circuits (RFICs), mixed signal ICs, Application Specific Integrated Circuits (ASICs), Printed Circuit Boards (PCBs), electronic devices, and the like. The processor and transceiver may also be fabricated using various IC process technologies, such as Complementary Metal Oxide Semiconductor (CMOS), N-type metal oxide semiconductor (NMOS), P-type metal oxide semiconductor (PMOS), Bipolar Junction Transistor (BJT), Bipolar CMOS (bicmos), silicon germanium (SiGe), gallium arsenide (GaAs), and the like.

The apparatus in the description of the above embodiment may be a network device or a terminal device, but the scope of the apparatus described in the present application is not limited thereto, and the structure of the apparatus may not be limited by fig. 6. The apparatus may be a stand-alone device or may be part of a larger device. For example, the apparatus may be:

(1) a stand-alone integrated circuit IC, or chip, or system-on-chip or subsystem;

(2) a set of one or more ICs, which optionally may also include storage components for storing data and/or instructions;

(3) an ASIC, such as a modem (MSM);

(4) a module that may be embedded within other devices;

(5) receivers, terminals, smart terminals, cellular phones, wireless devices, handsets, mobile units, in-vehicle devices, network devices, cloud devices, artificial intelligence devices, and the like;

(6) others, and so forth.

Fig. 7 provides a schematic structural diagram of a terminal device. The terminal device may be adapted to the scenario shown in fig. 1. For convenience of explanation, fig. 7 shows only main components of the terminal device. As shown in fig. 7, the terminal apparatus 1600 includes a processor, a memory, a control circuit, an antenna, and an input-output device. The processor is mainly used for processing communication protocols and communication data, controlling the whole terminal, executing software programs and processing data of the software programs. The memory is used primarily for storing software programs and data. The radio frequency circuit is mainly used for converting baseband signals and radio frequency signals and processing the radio frequency signals. The antenna is mainly used for receiving and transmitting radio frequency signals in the form of electromagnetic waves. Input and output devices, such as touch screens, display screens, keyboards, etc., are used primarily for receiving data input by a user and for outputting data to the user.

When the terminal device is started, the processor can read the software program in the storage unit, analyze and execute the instruction of the software program, and process the data of the software program. When data needs to be sent wirelessly, the processor outputs a baseband signal to the radio frequency circuit after performing baseband processing on the data to be sent, and the radio frequency circuit processes the baseband signal to obtain a radio frequency signal and sends the radio frequency signal outwards in the form of electromagnetic waves through the antenna. When data is transmitted to the terminal equipment, the radio frequency circuit receives a radio frequency signal through the antenna, the radio frequency signal is further converted into a baseband signal, the baseband signal is output to the processor, and the processor converts the baseband signal into the data and processes the data.

For ease of illustration, fig. 7 shows only one memory and processor. In an actual terminal device, there may be multiple processors and memories. The memory may also be referred to as a storage medium or a storage device, etc., which is not limited by the embodiment of the present invention.

As an alternative implementation manner, the processor may include a baseband processor and a central processing unit, where the baseband processor is mainly used to process a communication protocol and communication data, and the central processing unit is mainly used to control the whole terminal device, execute a software program, and process data of the software program. The processor in fig. 7 integrates the functions of the baseband processor and the central processor, and those skilled in the art will understand that the baseband processor and the central processor may be independent processors, and are interconnected by a bus or the like. Those skilled in the art will appreciate that the terminal device may include a plurality of baseband processors to accommodate different network formats, the terminal device may include a plurality of central processing units to enhance its processing capability, and various components of the terminal device may be connected by various buses. The baseband processor can also be expressed as a baseband processing circuit or a baseband processing chip. The central processing unit can also be expressed as a central processing circuit or a central processing chip. The function of processing the communication protocol and the communication data may be built in the processor, or may be stored in the storage unit in the form of a software program, and the processor executes the software program to realize the baseband processing function.

In one example, the antenna and the control circuit with transceiving functions can be considered as the transceiving unit 1611 of the terminal device 1600, and the processor with processing function can be considered as the processing unit 1612 of the terminal device 1600. As shown in fig. 7, the terminal device 1600 includes a transceiving unit 1611 and a processing unit 1612. A transceiver unit may also be referred to as a transceiver, a transceiving device, etc. Optionally, a device for implementing a receiving function in the transceiving unit 1611 may be regarded as a receiving unit, and a device for implementing a transmitting function in the transceiving unit 1611 may be regarded as a transmitting unit, that is, the transceiving unit 1611 includes a receiving unit and a transmitting unit. For example, a receiving unit may also be referred to as a receiver, a receiving circuit, etc., and a transmitting unit may be referred to as a transmitter, a transmitting circuit, etc. Alternatively, the receiving unit and the transmitting unit may be integrated into one unit, or may be multiple units independent of each other. The receiving unit and the transmitting unit can be in one geographical position or can be dispersed in a plurality of geographical positions.

As shown in fig. 8, yet another embodiment of the present application provides an apparatus 1700. The device may be a terminal or a component of a terminal (e.g., an integrated circuit, a chip, etc.). Alternatively, the apparatus may be a network device, or may be a component (e.g., an integrated circuit, a chip, etc.) of a network device. The apparatus may also be another communication module, which is used to implement the method in the embodiment of the method of the present application. The apparatus 1700 may include a processing module 1702 (processing unit). Optionally, a transceiver module 1701 (transceiver unit) and a storage module 1703 (storage unit) may be further included.

In one possible design, one or more of the modules in FIG. 8 may be implemented by one or more processors or by one or more processors and memory; or by one or more processors and transceivers; or by one or more processors, memories, and transceivers, which are not limited in this application. The processor, the memory and the transceiver can be arranged independently or integrated.

The apparatus has a function of implementing the terminal described in the embodiment of the present application, for example, the apparatus includes a module or a unit or means (means) corresponding to the terminal performing the terminal related steps described in the embodiment of the present application, and the function or the unit or the means (means) may be implemented by software or hardware, or may be implemented by hardware executing corresponding software, or may be implemented by a combination of software and hardware. Reference may be made in detail to the corresponding description in the corresponding method embodiments described above. Or, the apparatus has a function of implementing the network device described in the embodiment of the present application, for example, the apparatus includes a module or a unit or means (means) corresponding to the step of executing the network device described in the embodiment of the present application by the network device, and the function or the unit or the means (means) may be implemented by software or hardware, or may be implemented by hardware executing corresponding software, or may be implemented by a combination of software and hardware. Reference may be made in detail to the respective description of the corresponding method embodiments hereinbefore.

Optionally, each module in the apparatus 1700 in this embodiment of the present application may be configured to perform the method described in fig. 3 in this embodiment of the present application.

In one possible implementation, an apparatus 1700 may include: a processing module 1702 and a transceiver module 1701. The processing module 1702 is configured to obtain a first sequence { x (N) — 0,1, …, N-1} with a length N, and the transceiver module 1701 is configured to transmit the first sequence to a network device or a terminal. Wherein the elements x (n) in the first sequence satisfy the following formula:

wherein, { s }_m(N), N is 0,1, …, N-1, and is one of M second sequences of length N, which are included in a second sequence set, which is an orthogonal sequence set or a quasi-orthogonal sequence set. The second sequence may be referred to as a base sequence, and the set of second sequences may be referred to as a baseAnd (5) collecting sequences. { a (M) }, M ═ 0,1, …, M-1} is a third sequence of length M, which is one of the set of orthogonal sequences, one of the set of quasi-orthogonal sequences, a portion of one of the set of orthogonal sequences, or a portion of one of the set of quasi-orthogonal sequences. The third sequence may also be referred to as a feature mask, a feature mask sequence, a weighted mask sequence, a weighted sequence, or the like. M is 0. ltoreq. m<M is an integer of 0 to n<N, and the above N and M are integers greater than 1.

In some possible embodiments of the apparatus 1700, the first sequence is one of: a sequence of preamble signals, a sequence of DMRS, a sequence of PTRS, a sequence of SRS, a sequence of synchronization signals, a sequence of measurement reference signals, or a sequence of discovery signals. The signal may be a signal transmitted by a terminal to a network device, or may be a signal transmitted by one terminal to one or more other terminals. Optionally, when the first sequence is a sequence of a preamble, a value of N may be 839, 864, 144, or 139, and a value of M may be 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4, but the application does not limit other values of N and M. Optionally, when the first sequence is a sequence of DMRS, a value of N may be 71, 72, 139, or 144, and a value of M may be 6, 8, 12, 18, 24, or 32, but the application does not limit other values of N and M.

In some possible embodiments of the apparatus 1700, the second sequence s_m(N), N ═ 0,1, …, N-1} is a ZC sequence or a sequence obtained by performing a first process on a ZC sequence, the first process including DFT and/or CS. Alternatively, the ZC sequence in this segment may be replaced with a PN sequence or an m sequence.

In some possible embodiments of the apparatus 1700 described above, the third sequence { a (M) }, M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained by second processing of a ZC sequence, or a portion of a sequence obtained by second processing of a ZC sequence, the second processing including normalization and/or CS. Optionally, normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller sequence, or a reed solomon sequence.

In some possible embodiments of the apparatus 1700, the processing module 1702 is further configured to obtain configuration information, where the configuration information is used to configure parameters related to the second sequence set and parameters related to the third sequence set. Optionally, the configuration information is predefined or carried by one or more of: system information, RRC signaling, MAC CE, or control channel. Optionally, the transceiver module 1701 is further configured to receive the configuration information when the configuration information is carried by one or more of system information, RRC signaling, MAC CE, or a control channel. Optionally, the parameters related to the second sequence set are used to configure: a root used in obtaining the second sequence, and/or a cyclic shift used in obtaining the second sequence. Optionally, the parameter related to the third sequence is used to configure: the root used in obtaining the third sequence, and/or the number or index of the third sequence.

In another possible embodiment, an apparatus 1700 may include: a transceiver module 1701, wherein the transceiver module 1701 receives one or more first sequences { x (N) } 0,1, …, N-1 of length N from a terminal, and an element x (N) in the first sequence satisfies the following formula:

In some possible embodiments of the apparatus 1700, the second sequence s_m(N), N ═ 0,1, …, N-1} is a ZC sequence, or a sequence obtained by subjecting a ZC sequence to a first process including DFT and/or CS. Alternatively, the ZC sequence in this segment may be replaced with a PN sequence or an m sequence.

In some possible embodiments of the apparatus 1700 described above, the third sequence { a (M) }, M ═ 0,1, …, M-1} is a ZC sequence, a portion of a ZC sequence, a sequence obtained from a ZC sequence through a second process, or a portion of a sequence obtained from a ZC sequence through a second process, the second process including normalization and/or CS. Optionally, normalization in this paragraph may also be understood as power adjustment, power normalization, or power scaling. Alternatively, the ZC sequence in this segment may be replaced with any one of the following sequences: a PN sequence, an m sequence, a reed muller sequence, or a reed solomon sequence.

In some possible embodiments of the apparatus 1700, the transceiver module 1701 is further configured to send configuration information to the terminal, where the configuration information is used to configure the parameters related to the second sequence set and the parameters related to the third sequence set. Optionally, the configuration information is carried by one or more of: system information, RRC signaling, MAC CE, or control channel. Optionally, the parameters related to the second sequence set are used to configure: a root associated with the second sequence, and/or a cyclic shift associated with the second sequence. Optionally, the parameter related to the third sequence is used to configure: a root associated with the third sequence, and/or a number or index of the third sequence. Optionally, the apparatus 1700 may further include a processing module 1702, where the processing module 1702 is configured to obtain or generate the configuration information.

It is to be understood that some optional features in the embodiments of the present application may, in some scenarios, be implemented independently without depending on other features, such as a currently-based solution, to solve the corresponding technical problem and achieve the corresponding effect, or may, in some scenarios, be combined with other features according to requirements. Accordingly, the apparatuses provided in the embodiments of the present application may also implement these features or functions, which are not described herein again.

Those skilled in the art will also appreciate that the various illustrative logical blocks and steps (step) set forth in the embodiments of the present application may be implemented in electronic hardware, computer software, or combinations of both. Whether such functionality is implemented as hardware or software depends upon the particular application and design requirements of the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the embodiments of the present application.

In the various embodiments and implementations of the present application, unless otherwise specified or logically conflicting, terms and/or descriptions between different embodiments, different implementations have consistency and may be mutually cited, and technical features in different embodiments and implementations may be combined to form a new embodiment or a new implementation according to their inherent logical relationships.

It should be understood that the processor in the embodiments of the present application may be an integrated circuit chip having signal processing capability. In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The processor may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, or discrete hardware components.

The techniques described herein may be implemented by various means. For example, these techniques may be implemented in hardware, software, or a combination of hardware and software. For a hardware implementation, the processing units used to perform these techniques at a communication device (e.g., a base station, terminal, network entity, or chip) may be implemented in one or more general-purpose processors, DSPs, digital signal processing devices, ASICs, programmable logic devices, FPGAs, or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combinations of the above. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other similar configuration.

It will be appreciated that the memory in the embodiments of the subject application can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM, enhanced SDRAM, SLDRAM, Synchronous Link DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.

The present application also provides a computer-readable medium having stored thereon a computer program which, when executed by a computer, performs the functions of any of the method embodiments described above.

The present application also provides a computer program product which, when executed by a computer, implements the functionality of any of the above-described method embodiments.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause, in whole or in part, the processes or functions described in accordance with the embodiments of the application. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, including one or more integrated servers, data centers, and the like. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a Digital Video Disk (DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), among others.

It should be appreciated that reference throughout this specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the various embodiments are not necessarily referring to the same embodiment throughout the specification. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the size of the sequence number of each process described above does not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.

It should also be understood that, in this application, "when …", "if" and "if" all refer to a UE or base station that is doing the corresponding processing under certain objective circumstances, and are not time-critical, nor do they require certain deterministic actions to be performed by the UE or base station, nor do they imply that other limitations exist.

Those of ordinary skill in the art will understand that: the numbers of the first, second, etc. in the present application are merely for convenience of description and are not used to limit the scope of the embodiments of the present application, but also to indicate the order of the steps.

Reference in the present application to an element using the singular is intended to mean "one or more" rather than "one and only one" unless specifically stated otherwise. In the present application, unless otherwise specified, "at least one" is intended to mean "one or more" and "a plurality" is intended to mean "two or more".

Additionally, the terms "system" and "network" are often used interchangeably herein. The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A can be singular or plural, and B can be singular or plural.

The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

Herein, the term "at least one of … …" or "at least one of … …," denotes all or any combination of the listed items, e.g., "at least one of A, B and C," may denote: the compound comprises six cases of independently existing A, independently existing B, independently existing C, simultaneously existing A and B, simultaneously existing B and C, and simultaneously existing A, B and C, wherein A can be singular or plural, B can be singular or plural, and C can be singular or plural.

It should be understood that in the embodiments of the present application, "B corresponding to a" means that B is associated with a, from which B can be determined. It should also be understood that determining B from a does not mean determining B from a alone, but may be determined from a and/or other information.

The correspondence shown in the tables in the present application may be configured or predefined. The values of the information in each table are merely examples, and may be configured as other values, which is not limited in the present application. When the correspondence between the information and each parameter is configured, it is not always necessary to configure all the correspondences indicated in each table. For example, in the table in the present application, the correspondence relationship shown in some rows may not be configured. For another example, appropriate modification adjustments, such as splitting, merging, etc., can be made based on the above tables. The names of the parameters in the tables may be other names understandable by the communication device, and the values or the expression of the parameters may be other values or expressions understandable by the communication device. When the above tables are implemented, other data structures may be used, for example, arrays, queues, containers, stacks, linear tables, pointers, linked lists, trees, graphs, structures, classes, heaps, hash tables, or hash tables may be used.

Predefinition in this application may be understood as defining, predefining, storing, pre-negotiating, pre-configuring, solidifying, or pre-firing.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The same or similar parts between the various embodiments in this application may be referred to each other. In the embodiments and the implementation methods/implementation methods in the embodiments in the present application, unless otherwise specified or conflicting in logic, terms and/or descriptions between different embodiments and between various implementation methods/implementation methods in various embodiments have consistency and can be mutually cited, and technical features in different embodiments and various implementation methods/implementation methods in various embodiments can be combined to form new embodiments, implementation methods, or implementation methods according to the inherent logic relationships thereof. The above-described embodiments of the present application do not limit the scope of the present application.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

Claims

1. A method of communication, comprising:

obtaining a first sequence { x (N) of length N, N being 0,1, …, N-1}, wherein x (N) in the first sequence satisfies

And, transmitting the first sequence;

wherein:

{s_m(N), where N is 0,1, …, N-1 is one of M second sequences of length N, which are included in a second set of sequences, which is an orthogonal or quasi-orthogonal set of sequences;

{ a (M), M ═ 0,1, …, M-1} is a third sequence of length M, which is one of a set of orthogonal sequences, one of a set of quasi-orthogonal sequences, a portion of one of a set of orthogonal sequences, or a portion of one of a set of quasi-orthogonal sequences;

m is an integer satisfying 0-M < M, N is an integer satisfying 0-N < N, and N and M are integers greater than 1.

2. The method of claim 1, wherein the first sequence is a sequence of a preamble signal.

3. The method of claim 2, wherein N equals 839, 864, 144, or 139, and wherein M equals 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4.

4. The method of claim 1, wherein the first sequence is a sequence of a demodulation reference signal (DMRS).

5. The method of claim 4, wherein N is equal to 71, 72, 139, or 144, and wherein M is equal to 6, 8, 12, 18, 24, or 32.

6. The method of claim 1, wherein the first sequence is a sequence of a Phase Tracking Reference Signal (PTRS), a sequence of a Sounding Reference Signal (SRS), a sequence of a synchronization signal, a sequence of a measurement reference signal, or a sequence of a discovery signal.

7. The method according to any one of claims 1 to 6, wherein the second sequence is a ZC sequence or a sequence obtained by performing a first treatment on a ZC sequence, the first treatment comprising one or more of the following: discrete fourier transform, DFT, or cyclic shift.

8. The method according to any one of claims 1 to 7, wherein the third sequence is a ZC sequence, a part of a ZC sequence, a sequence obtained by second processing of a ZC sequence, or a part of a sequence obtained by second processing of a ZC sequence, the second processing comprising one or more of: normalization, or cyclic shift.

9. The method according to any one of claims 1 to 8, further comprising: obtaining configuration information for configuring parameters related to the second set of sequences and parameters related to the third sequence.

10. A method of communication, comprising:

receiving one or more first sequences { x (N) { 0,1, …, N-1}, wherein x (N) in the first sequences satisfies N

And communicating based on the first sequence;

wherein:

11. The method of claim 10, wherein the first sequence is a sequence of a preamble signal.

12. The method of claim 11, wherein N equals 839, 864, 144, or 139, and wherein M equals 64, 60, 56, 52, 48, 44, 40, 36, 32, 28, 24, 20, 16, 12, 8, or 4.

13. The method of claim 10, wherein the first sequence is a sequence of a demodulation reference signal (DMRS).

14. The method of claim 13, wherein N is equal to 71, 72, 139, or 144, and wherein M is equal to 6, 8, 12, 18, 24, or 32.

15. The method of claim 10, wherein the first sequence is a sequence of a Phase Tracking Reference Signal (PTRS), a sequence of a Sounding Reference Signal (SRS), a sequence of a synchronization signal, a sequence of a measurement reference signal, or a sequence of a discovery signal.

16. A method according to any one of claims 10 to 15, wherein the second sequence is a ZC sequence, or a sequence derived from a ZC sequence by a first process comprising one or more of: discrete fourier transform, DFT, or cyclic shift.

17. A method according to any of claims 10 to 16, wherein the third sequence is a ZC sequence, a part of a ZC sequence, a sequence obtained from a ZC sequence by a second process, or a part of a sequence obtained from a ZC sequence by a second process, the second process comprising one or more of: normalization, or cyclic shift.

18. The method according to any one of claims 10 to 17, further comprising: sending configuration information, wherein the configuration information is used for configuring parameters related to the second sequence set and parameters related to the third sequence.

19. An apparatus, characterized in that the apparatus is configured to perform the method according to any of claims 1 to 9.

20. An apparatus, characterized in that the apparatus is configured to perform the method according to any of claims 10 to 18.

21. An apparatus, comprising: a processor coupled with a memory, the memory to store a program or instructions that, when executed by the processor, cause the apparatus to perform the method of any of claims 1 to 9.

22. An apparatus, comprising: a processor coupled with a memory, the memory to store a program or instructions that, when executed by the processor, cause the apparatus to perform the method of any of claims 10 to 18.

23. A storage medium having stored thereon a computer program or instructions, which when executed cause a computer to perform the method of any one of claims 1 to 9.

24. A storage medium having stored thereon a computer program or instructions, which when executed cause a computer to perform the method of any of claims 10 to 18.

25. A communication system, comprising: the apparatus as claimed in claim 19, and/or the apparatus as claimed in claim 20.

26. A communication system, comprising: the apparatus as claimed in claim 21, and/or the apparatus as claimed in claim 22.