CN112133259A - Display module, matching method of display module and main control chip signal format and display device - Google Patents
Display module, matching method of display module and main control chip signal format and display device Download PDFInfo
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- CN112133259A CN112133259A CN202011074149.6A CN202011074149A CN112133259A CN 112133259 A CN112133259 A CN 112133259A CN 202011074149 A CN202011074149 A CN 202011074149A CN 112133259 A CN112133259 A CN 112133259A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
Abstract
The invention provides a display module, a method for matching signal formats of the display module and a main control chip, and a display device. The display module comprises a display panel, a data driving chip and a flexible circuit board, wherein the flexible circuit board further comprises a plurality of module interfaces, a data mode identification unit and a data mode selection unit; the plurality of module interfaces are used for being electrically connected with a main control chip of the display device; the data pattern recognition unit is used for reading the output data format setting in the main control chip and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result; the data format selection unit is used for configuring the working mode of the data driving chip according to the format of the low-voltage differential signal output by the main control chip. The invention can realize that the display module automatically matches the signal format of the main control chip, increases the adaptability of the display module during assembly, and can avoid abnormal display caused by the mismatching of the working mode and the output signal format of the main control chip.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display module, a method for matching signal formats of the display module and a main control chip, and a display device.
Background
Low-Voltage Differential Signaling (LVDS) has the advantages of Low noise, Low electromagnetic interference, Low power consumption, high bit rate, and simple connection, and is therefore a signal that is currently used in a liquid crystal display device to transmit from an image processing system to a liquid crystal panel. The LVDS output by the image processing system includes two formats: a Japanese Electronic Industry Development Association (JEIDA) format (hereinafter, referred to as JEIDA format) and a Video Electronics Standards Association (VESA) format (hereinafter, referred to as VESA format). After the display panel, the data driving chip and the flexible circuit board are assembled into the display module under the normal condition, the data format which can be applied by the data driving chip in the display module is fixed. When the data driving chip in the display module is adapted to the JEIDA format signal, if the image processing system provides the VESA format signal to the display module, the display will be abnormal.
Disclosure of Invention
The embodiment of the invention provides a display module, a method for matching signal formats of the display module and a main control chip, and a display device, and aims to solve the technical problem that a data driving chip in the display module in the prior art cannot simultaneously match JEIDA format signals and VESA format signals.
In a first aspect, an embodiment of the present invention provides a display module, including: the display device comprises a display panel, a data driving chip and a flexible circuit board, wherein an input pin of the data driving chip is electrically connected with a port of the flexible circuit board, and an output pin of the data driving chip is electrically connected with a signal wire in the display panel; the flexible circuit board also comprises a plurality of module interfaces which are used for being electrically connected with a main control chip of the display device, wherein,
the flexible circuit board comprises a data pattern recognition unit and a data pattern selection unit;
the data pattern recognition unit is used for reading the output data format setting in the main control chip, judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result, and sending the format judgment result to the data format selection unit;
the data format selection unit is used for configuring the working mode of the data driving chip to be a VESA mode when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format; and the controller is also used for configuring the working mode of the data driving chip to be a JEIDA mode when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format.
In a second aspect, an embodiment of the present invention provides a display device, including the display module provided in any embodiment of the present invention, and the display device further includes a main control chip, where the plurality of module interfaces are electrically connected to the main control chip.
In a third aspect, an embodiment of the present invention further provides a method for matching a signal format of a display module with a signal format of a main control chip, where the display module includes a display panel, a data driving chip and a flexible circuit board, an input pin of the data driving chip is electrically connected to an output port of the flexible circuit board, and an output pin of the data driving chip is electrically connected to a signal line in the display panel; the flexible circuit board further comprises a plurality of module interfaces, the module interfaces are used for being electrically connected with a main control chip of the display device, and the matching method comprises the following steps:
reading output data format setting in the main control chip, and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result;
when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format, configuring the working mode of the data driving chip to be the VESA mode;
and when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format, configuring the working mode of the data driving chip to be the JEIDA mode.
The display module, the method for matching the display module with the signal format of the main control chip and the display device provided by the embodiment of the invention have the following beneficial effects: according to the display module provided by the embodiment of the invention, the data mode identification unit and the data mode selection unit are arranged in the flexible circuit board, the output data format setting in the main control chip is read through the data mode identification unit, and the format of the low-voltage differential signal output when the main control chip provides the signal for the display module is judged according to the output data format setting. Then the data mode selection unit configures the working mode of the data driving chip according to the format of the low-voltage differential signal output by the main control chip, and when the main control chip outputs the VESA format signal, the working mode of the data driving chip is configured to be a VESA mode; and when the main control chip outputs the JEIDA format signal, the working mode of the data driving chip is configured to be the JEIDA mode. Therefore, the display module can automatically match the signal format of the main control chip, one display module can be simultaneously suitable for a system board for outputting JEIDA format signals and a system board for outputting VESA format signals, the adaptability of the display module during assembly is improved, and the display module with different working modes can be produced without corresponding to the system board for outputting JEIDA format signals and the system board for outputting VESA format signals. Display abnormity caused by mismatching of the working mode and the output signal format of the main control chip can be avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without inventive labor.
Fig. 1 is a schematic diagram of an alternative implementation of a display module according to an embodiment of the present application;
fig. 2 is a schematic view of data interaction of a display module provided in an embodiment of the present application during application;
fig. 3 is a partially simplified schematic view of an alternative embodiment of a display module according to an embodiment of the present invention;
fig. 4 is a flowchart illustrating a working process of the display module according to the embodiment of the present invention;
fig. 5 is a schematic view of another alternative implementation of a display module according to an embodiment of the disclosure;
FIG. 6 is a schematic diagram of a display device according to an embodiment of the present invention;
fig. 7 is a flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention;
fig. 8 is another flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention;
fig. 9 is another flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
After the display module is assembled by the display panel, the data driving chip and the flexible circuit board, a module interface can be reserved on the flexible circuit board, and when the display device is assembled, the display module is electrically connected with the main control chip in the system board through the module interface. The main control chip is an application processor chip, the main control chip provides a Low-Voltage Differential Signaling (LVDS) to the data display chip in the display module, and the data display chip controls the display panel to display an image picture after receiving the LVDS. At present, LVDS formats provided by main control chips in system boards produced by various manufacturers are not uniform, the main control chips in the system boards produced by some manufacturers provide JEIDA format signals, and the main control chips in the system boards produced by some manufacturers provide VESA format signals. When the data driving chip in the display module is suitable for the JEIDA format signal, if the display module is assembled with the system board providing the VESA format signal, the display abnormality may be caused due to the mismatch of the signal modes.
Based on this, the embodiment of the application provides a display module, a method for matching the display module with a signal format of a main control chip, and a display device, so as to realize that the display module can automatically configure a working mode of a data driving chip to match with the signal format of the main control chip, so that the display module can be simultaneously suitable for a system board outputting a JEIDA format signal and a system board outputting a VESA format signal, the adaptability of the display module during assembly is increased, and the display module with different working modes can be produced without corresponding to the system board outputting the JEIDA format signal and the system board outputting the VESA format signal. The technical problem that a data driving chip in a display module cannot be matched with a JEIDA format signal and a VESA format signal at the same time is solved.
Fig. 1 is a schematic view of an alternative implementation of a display module according to an embodiment of the present disclosure. As shown in fig. 1, the display module 00 includes a display panel 100, a data driving chip 200 and a flexible circuit board 300, wherein the data driving chip 200 is fixed in a non-display area BA of the display panel 100, the non-display area BA further includes a binding area B, the binding area B is located on one side of the data driving chip 200 away from the display area AA, and one end of the flexible circuit board 300 is bound in the binding area B. The display panel 100 in the embodiment of the present invention is a liquid crystal display panel, and the display panel 100 includes an array substrate, a color film substrate and a liquid crystal layer between the array substrate and the color film substrate, which are oppositely disposed.
In fig. 1, it is illustrated that a fan-out area S is included in the non-display area BA, and the fan-out area S is provided with a plurality of signal lines X, wherein the signal lines X are connected to the display area AA. The input pin 21 of the data driving chip 200 is electrically connected to the port 32 of the flexible circuit board 300, and the output pin 22 of the data driving chip 200 is electrically connected to the signal line X in the display panel 100, in this embodiment, the port 32 of the flexible circuit board 300 is reused as a binding pin, that is, the port 32 of the flexible circuit board 300 is bound and connected to the display panel; the flexible circuit board 300 further includes a plurality of module interfaces K for electrically connecting with a main control chip (not shown) of the display device. The main control chip is an application processor chip in the system board, that is, when the display device is assembled, a plurality of module interfaces are arranged to be electrically connected with the main control chip so as to realize that the display module 00 is electrically connected with the main control chip, and in application, the main control chip provides signals for the display module 00 through the module interfaces K so as to realize the display function of the display module 00.
As illustrated in fig. 1, in the embodiment of the present invention, the flexible circuit board 300 includes a data pattern recognition unit 310 and a data pattern selection unit 320; the data pattern recognition unit 310 is configured to read an output data format setting in the main control chip, determine, according to a read result, that a format of the low voltage differential signal output by the main control chip is a VESA format or a JEIDA format, and send a format determination result to the data format selection unit 320.
The data format selection unit 320 is configured to configure the working mode of the data driving chip 200 to be the VESA mode when the format of the low voltage differential signal output by the main control chip is determined to be the VESA format; and is further configured to configure the working mode of the data driving chip 200 to be JEIDA mode when the format of the low voltage differential signal output by the main control chip is determined to be JEIDA format.
The main control chip of the system board stores data format setting bits. For example, in a system board where the main control chip is configured to output a VESA format low-voltage differential signal, the data format setting bit is bit 1; in the system board where the main control chip is configured to output the VESA format low voltage differential signal, the data format setting bit is bit 0. Fig. 2 is a schematic view of data interaction of the display module provided in the embodiment of the present application during application, and as shown in fig. 2, a system board 400 is illustrated, and a main control chip 40 is disposed in the system board 400. In the embodiment of the present invention, the data pattern recognition unit 310 can read the output data format setting in the main control chip 40, and when the read result is bit1, it determines that the Low Voltage Differential Signaling (LVDS) output by the main control chip 40 to the display module is in the VESA format. Then, the data format selecting unit 320 configures the working mode of the data driving chip 200 to be the VESA mode according to the format determination result, so as to implement that the working mode of the data driving chip 200 matches with the low-voltage differential signal format output by the main control chip 40.
According to the display module provided by the embodiment of the invention, the data mode identification unit and the data mode selection unit are arranged in the flexible circuit board, the output data format setting in the main control chip is read through the data mode identification unit, and the format of the low-voltage differential signal output when the main control chip provides the signal for the display module is judged according to the output data format setting. Then the data mode selection unit configures the working mode of the data driving chip according to the format of the low-voltage differential signal output by the main control chip, and when the main control chip outputs the VESA format signal, the working mode of the data driving chip is configured to be a VESA mode; and when the main control chip outputs the JEIDA format signal, the working mode of the data driving chip is configured to be the JEIDA mode. Therefore, the display module can automatically match the signal format of the main control chip, one display module can be simultaneously suitable for a system board for outputting JEIDA format signals and a system board for outputting VESA format signals, the adaptability of the display module during assembly is improved, and the display module with different working modes can be produced without corresponding to the system board for outputting JEIDA format signals and the system board for outputting VESA format signals. Display abnormity caused by mismatching of the working mode and the output signal format of the main control chip can be avoided.
Specifically, in the embodiment of the present invention, the plurality of module interfaces K includes N low voltage differential signal interfaces, where N is a positive integer; in application, the low voltage differential signal interface is used for receiving a low voltage differential signal provided by the main control chip. The input pins 21 included in the data driving chip 200 include N low voltage differential signal input pins, where the low voltage differential signal input pins correspond to the low voltage differential signal interfaces one to one. That is, the low voltage differential signal interface provides the low voltage differential signal to the input pins included in the data driving chip 200 after receiving the low voltage differential signal provided by the main control chip. The circuit blocks in the flexible circuit board 300 do not perform any processing on the low voltage differential signal until the data driving chip 200 receives the low voltage differential signal. According to the embodiment of the application, the data pattern recognition unit is arranged in the flexible circuit board and used for directly reading the output data format setting in the main control chip so as to judge the format of the low-voltage differential signal output by the main control chip, and the signal bit of the low-voltage differential signal for display is not sacrificed in the process of judging the format of the low-voltage differential signal output by the main control chip.
Specifically, fig. 3 is a partially simplified schematic view of an alternative implementation of the display module according to the embodiment of the present invention. As shown in fig. 3, the input pin 21 of the data driving chip 200 includes a format selection pin 21a, wherein when the format selection pin 21a receives a first level signal, the operating mode of the data driving chip 200 is the VESA mode; when the format selection pin 21a receives the second level signal, the operation mode of the data driving chip 200 is JEIDA mode. That is, by supplying different level signals to the format selection pin 21a, the configuration of the operation mode of the data driving chip 200 can be realized.
As illustrated in fig. 3, the ports of the flexible circuit board 300 include a format selection port 32a, the format selection pins 21a are connected with the format selection port 32a of the flexible circuit board 300, and the format selection pins 21a are connected to the data format selection unit 320 through the format selection port 32 a. The first terminal of the data format selecting unit 320 is electrically connected to the data pattern identifying unit 310, the second terminal of the data format selecting unit 320 is electrically connected to the first level terminal D1, the third terminal of the data format selecting unit 320 is electrically connected to the second level terminal D2, and the fourth terminal of the data format selecting unit 320 is electrically connected to the fourth format selecting pin 21 a. The first level terminal D1 is used for providing a first level signal, and the second level terminal D1 is used for providing a second level signal.
When the format of the low voltage differential signal output by the main control chip is determined to be the VESA format, the data format selection unit 320 controls the second terminal and the fourth terminal to be conducted according to the signal of the first terminal, so as to configure the format selection pin 21a to be electrically connected to the first level terminal D1. When the format of the low voltage differential signal output by the main control chip is determined to be JEIDA, the data format selection unit 320 controls the third terminal and the fourth terminal to be conducted according to the signal of the control terminal, so as to configure the format selection pin 21a to be electrically connected to the second level terminal D2.
In the conventional display module, after the data driving chip 200 is fixedly connected to the flexible circuit board, the signal terminal connected to the format selection pin on the data driving chip is fixed, that is, in the conventional display module, the data driving chip has completed the configuration of the working mode and is configured to be the VESA working mode or the JEIDA working mode. In the embodiment of the present invention, by providing the data format selecting unit 320 in the flexible circuit board 300, it is possible to configure the operation mode of the data driving chip 200 according to the requirement in the application, instead of configuring the data driving chip 200 into the fixed operation mode.
Specifically, as shown in fig. 3, the plurality of module interfaces K includes a first level interface V1 and a second level interface V2, the first level interface V1 is a first level terminal D1, and the second level interface V2 is a second level terminal D2. The data format selection unit 320 is configured to control the format selection port 32a to be electrically connected to the first level interface V1 when the format of the low voltage differential signal output by the main control chip is determined to be the VESA format, so that the format selection pin 21a is electrically connected to the first level interface V1, so as to configure the operating mode of the data driving chip 200 to be the VESA mode. The data format selecting unit 320 is further configured to electrically connect the configuration format selecting port 32a to the second level interface V2 when the format of the low voltage differential signal output by the main control chip is determined to be JEIDA format, so that the format selecting pin 21a is electrically connected to the second level interface V21, so as to configure the operating mode of the data driving chip 200 to be JEIDA mode.
Further, in the first level signal and the second level signal: one is a high level signal and the other is a low level signal. Specifically, in one embodiment, the first level interface V1 is a positive power interface, and the second level interface V2 is a ground interface. In another embodiment, the first level interface V1 is a ground interface, and the second level interface V2 is a positive power interface.
Specifically, as shown with continued reference to fig. 3, the plurality of module interfaces K includes an SPI interface; the data format recognition module 310 comprises a single chip microcomputer, an SPI interface is electrically connected with the single chip microcomputer, and the single chip microcomputer is used for reading data format setting of low-voltage differential signals in the main control chip through the SPI interface. The SPI interface may be 3-wire or 4-wire. In this embodiment, a single chip microcomputer is disposed in the flexible circuit board 300, and the single chip microcomputer reads the output data format setting in the main control chip through the SPI interface, and then determines the format of the low voltage differential signal output when the main control chip provides a signal to the display module according to the output data format setting, and then configures the operating mode of the data driving chip 200 through the data format selection unit, so as to match the operating mode of the data driving chip 200 with the low voltage differential signal output by the main control chip. Through the setting of the single chip microcomputer, the signal position of the low-voltage differential signal for display is not sacrificed in the process of judging the format of the low-voltage differential signal output by the main control chip.
In an embodiment, fig. 4 is a flowchart illustrating a working process of the display module according to an embodiment of the present invention. As shown in fig. 4, a flow chart of the matching between the display module and the main control chip is shown, and optionally, the matching process may be triggered before the display module displays the image in a bright screen. After the display module and the system board are assembled into the display device, before the display device displays on a bright screen, firstly, the single chip microcomputer (i.e. the data pattern recognition unit 310) arranged on the flexible circuit board 300 in the display module reads the setting of the Low Voltage Differential Signaling (LVDS) format in the main control chip in the system board through the SPI interface. The single chip microcomputer judges the format of the low-voltage differential signal output by the main control chip according to the reading result of the setting bit, wherein the single chip microcomputer judges whether the read data format setting bit is 1, and when the read data format setting bit is 1, the format selection pin 21a of the data driving chip 200 is controlled to be electrically connected with the first level end, so that the working mode of the data driving chip 200 is set to be a VESA mode, and the working mode of the data driving chip 200 is matched with the data output format of the main control chip; when the read data format setting bit is not 1, the format selection pin 21a of the data driving chip 200 is controlled to be electrically connected with the second level end, so that the working mode of the data driving chip 200 is set to be the JEIDA mode, and the working mode of the data driving chip 200 is matched with the data output format of the main control chip.
The embodiment of the application does not limit the specific judgment logic of the single chip microcomputer, and fig. 4 only illustrates one judgment logic of the single chip microcomputer. In another judgment logic, the single chip microcomputer judges whether the read data format setting bit is 0, and when the read data format setting bit is 0, the format selection pin 21a of the data driving chip 200 is controlled to be electrically connected with the second level end, so that the working mode of the data driving chip 200 is set to be the JEIDA mode; when the read data format setting bit is not 0, the format selection pin 21a of the data driving chip 200 is controlled to be electrically connected to the first level terminal, so as to set the working mode of the data driving chip 200 to the VESA mode.
Fig. 1 illustrates an embodiment in which a data driving chip is fixed in a non-display area of a display panel, and in another embodiment, the data driving chip is fixed on a flexible circuit board, as shown in fig. 5, and fig. 5 is a schematic view of another alternative implementation of the display module according to the embodiment of the present invention. The data driving chip 200 is fixed on the flexible circuit board 300 to form a flip chip, and the input pins and the output pins of the data driving chip 200 are electrically connected to corresponding ports (not shown in fig. 5) on the flexible circuit board 300, respectively. The non-display area BA of the display panel 100 includes a bonding area B, and the flexible circuit board 300 includes a plurality of bonding pins 33, and the bonding pins 33 are bonded to the bonding area B. The non-display area BA includes a fan-out area S therein, and the fan-out area S is provided with a plurality of signal lines X, wherein the signal lines X are connected to the display area AA. The data driving chip 200 is connected to the signal line X through the bonding pin 33. The flexible circuit board 300 further includes a plurality of module interfaces K for electrically connecting with a main control chip (not shown) of the display device. The data pattern recognition unit 310 is configured to read an output data format setting in the main control chip, determine, according to a read result, that a format of the low voltage differential signal output by the main control chip is a VESA format or a JEIDA format, and send a format determination result to the data format selection unit 320. The data format selection unit 320 is configured to configure the working mode of the data driving chip 200 to be the VESA mode when the format of the low voltage differential signal output by the main control chip is determined to be the VESA format; and is further configured to configure the working mode of the data driving chip 200 to be JEIDA mode when the format of the low voltage differential signal output by the main control chip is determined to be JEIDA format. In the embodiment, the data driving chip is fixed on the flexible circuit board, and the flexible circuit board is bound and connected with the display panel, so that the space of a non-display area of the display panel can be saved.
The embodiments shown in fig. 2 to 4 are all applicable to the embodiment shown in fig. 5, and are not described herein again.
Fig. 6 is a schematic view of a display device according to an embodiment of the present invention, where as shown in the figure, the display device includes a display module 00 according to any embodiment of the present invention, and the display device 00 further includes a main control chip (not shown), where a plurality of module interfaces are electrically connected to the main control chip.
The embodiment of the invention also provides a method for matching the signal format of the display module and the signal format of the main control chip, which can be applied to the display module provided by any embodiment of the invention. The display module comprises a display panel, a data driving chip and a flexible circuit board, wherein an input pin of the data driving chip is electrically connected with an output port of the flexible circuit board, and an output pin of the data driving chip is electrically connected with a signal wire in the display panel; fig. 7 is a flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention, where as shown in fig. 7, the method for matching includes:
step S101: reading output data format setting in the main control chip, and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result;
step S102: when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format, configuring the working mode of the data driving chip to be the VESA mode;
step S103: and when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format, configuring the working mode of the data driving chip to be the JEIDA mode.
According to the matching method provided by the embodiment of the invention, the format of the low-voltage differential signal output when the main control chip provides the signal for the display module is judged according to the output data format setting by reading the output data format setting in the main control chip. And then the data mode selection unit configures the working mode of the data driving chip according to the format of the low-voltage differential signal output by the main control chip, so that the display module can automatically match the signal format of the main control chip, one display module can be simultaneously suitable for a system board for outputting JEIDA format signals and a system board for outputting VESA format signals, the adaptability of the display module during assembly is improved, and the display module with different working modes can be produced without correspondingly outputting the system board for outputting JEIDA format signals and the system board for outputting VESA format signals. Display abnormity caused by mismatching of the working mode and the output signal format of the main control chip can be avoided.
Further, the flexible circuit board includes the singlechip, and a plurality of module interfaces include the SPI interface, and the SPI interface is connected with the singlechip electricity. Fig. 8 is another flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention, where as shown in fig. 8, the matching method includes:
step S201: reading the data format setting of the low-voltage differential signal in the main control chip through the SPI interface, and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result;
step S202: when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format, configuring the working mode of the data driving chip to be the VESA mode;
step S203: and when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format, configuring the working mode of the data driving chip to be the JEIDA mode.
In the embodiment, the single chip microcomputer is arranged to read the output data format setting in the main control chip through the SPI, then the format of the low-voltage differential signal output when the main control chip provides a signal for the display module is judged according to the output data format setting, and then the working mode of the data driving chip is configured through the data format selection unit so as to realize that the working mode of the data driving chip is matched with the low-voltage differential signal output by the main control chip. Through the setting of the single chip microcomputer, the signal position of the low-voltage differential signal for display is not sacrificed in the process of judging the format of the low-voltage differential signal output by the main control chip.
Further, the input pin of the data driving chip comprises a format selection pin, wherein when the format selection pin receives the first level signal, the working mode of the data driving chip is a VESA mode; when the format selection pin receives the second level signal, the working mode of the data driving chip is a JEIDA mode; fig. 9 is another flowchart of a method for matching signal formats of a display module and a main control chip according to an embodiment of the present invention, where as shown in fig. 9, the matching method includes:
step S301: reading the data format setting of the low-voltage differential signal in the main control chip through the SPI interface, and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result;
step S302: when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format, the configuration format selection pin is electrically connected with the first level end to configure the working mode of the data driving chip to be the VESA mode, wherein the first level end is used for providing a first level signal;
step S303: when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format, the configuration format selection pin is electrically connected with the second level end so as to configure the working mode of the data driving chip to be the JEIDA mode, wherein the second level end is used for providing a second level signal.
Wherein, in the first level signal and the second level signal: one is a high level signal and the other is a low level signal.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (12)
1. A display module is characterized by comprising a display panel, a data driving chip and a flexible circuit board, wherein an input pin of the data driving chip is electrically connected with a port of the flexible circuit board, and an output pin of the data driving chip is electrically connected with a signal wire in the display panel; the flexible circuit board also comprises a plurality of module interfaces which are used for being electrically connected with a main control chip of the display device, wherein,
the flexible circuit board comprises a data pattern recognition unit and a data pattern selection unit;
the data pattern recognition unit is used for reading the output data format setting in the main control chip, judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result, and sending the format judgment result to the data format selection unit;
the data format selection unit is used for configuring the working mode of the data driving chip to be a VESA mode when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format; and the controller is also used for configuring the working mode of the data driving chip to be a JEIDA mode when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format.
2. The display module of claim 1,
the plurality of module interfaces comprise N low-voltage differential signal interfaces, wherein N is a positive integer;
the data driving chip comprises input pins comprising N low-voltage differential signal input pins, wherein the low-voltage differential signal input pins correspond to the low-voltage differential signal interfaces one to one.
3. The display module of claim 1,
the input pin of the data driving chip comprises a format selection pin, wherein when the format selection pin receives a first level signal, the working mode of the data driving chip is a VESA mode; when the format selection pin receives a second level signal, the working mode of the data driving chip is a JEIDA mode;
the data format selection unit is used for configuring the format selection pin to be electrically connected with the first level end when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format; and the configuration module is further configured to configure the format selection pin to be electrically connected to a second level terminal when the format of the low-voltage differential signal output by the main control chip is determined to be the JEIDA format, where the first level terminal is configured to provide the first level signal, and the second level terminal is configured to provide the second level signal.
4. The display module of claim 3,
the ports of the flexible circuit board comprise format selection ports, and the format selection ports are electrically connected with the format selection pins;
the plurality of module interfaces comprise a first level interface and a second level interface, the first level interface is the first level end, and the second level interface is the second level end;
the data format selection unit is used for controlling the format selection port to be electrically connected with the first level interface when the format of the low-voltage differential signal output by the main control chip is judged to be the VESA format; and the format selection port is configured to be electrically connected with the second level interface when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format.
5. The display module of claim 3,
of the first level signal and the second level signal: one is a high level signal and the other is a low level signal.
6. The display module of claim 1,
the plurality of module interfaces comprise an SPI interface;
the data format recognition module comprises a single chip microcomputer, the SPI interface is electrically connected with the single chip microcomputer, and the single chip microcomputer is used for reading the data format setting of the low-voltage differential signal in the main control chip through the SPI interface.
7. The display module of claim 1,
the display panel includes a display area and a non-display area surrounding the display area,
the data driving chip is fixed in the non-display area, the non-display area further comprises a binding area, the binding area is located on one side, far away from the display area, of the data driving chip, and one end of the flexible circuit board is bound in the binding area.
8. The display module of claim 1,
the data driving chip is fixed on the flexible circuit board, the non-display area of the display panel comprises a binding area, and one end of the flexible circuit board is bound to the binding area.
9. A display device comprising the display module according to any one of claims 1 to 8, and a main control chip, wherein the plurality of module interfaces are electrically connected to the main control chip.
10. A method for matching signal formats of a display module and a main control chip is disclosed, wherein the display module comprises a display panel, a data driving chip and a flexible circuit board, an input pin of the data driving chip is electrically connected with an output port of the flexible circuit board, and an output pin of the data driving chip is electrically connected with a signal wire in the display panel; the flexible circuit board further comprises a plurality of module interfaces, and the plurality of module interfaces are used for being electrically connected with a main control chip of a display device, and the matching method is characterized by comprising the following steps:
reading output data format setting in the main control chip, and judging the format of the low-voltage differential signal output by the main control chip to be a VESA format or a JEIDA format according to the reading result;
when the format of the low-voltage differential signal output by the main control chip is judged to be a VESA format, configuring the working mode of the data driving chip to be a VESA mode;
and when the format of the low-voltage differential signal output by the main control chip is judged to be the JEIDA format, configuring the working mode of the data driving chip to be the JEIDA mode.
11. The matching method according to claim 10, wherein the flexible circuit board comprises a single chip microcomputer, the plurality of module interfaces comprise SPI interfaces, and the SPI interfaces are electrically connected to the single chip microcomputer;
reading the output data format setting in the main control chip, including: and reading the data format setting of the low-voltage differential signal in the main control chip through the SPI interface.
12. The matching method according to claim 10, wherein the input pin of the data driving chip comprises a format selection pin, wherein when the format selection pin receives the first level signal, the operating mode of the data driving chip is VESA mode; when the format selection pin receives a second level signal, the working mode of the data driving chip is a JEIDA mode;
configuring the working mode of the data driving chip to be a VESA mode, including: configuring the format selection pin to be electrically connected with a first level end, wherein the first level end is used for providing the first level signal;
configuring the working mode of the data driving chip to be a JEIDA mode, comprising the following steps: and configuring the format selection pin to be electrically connected with a second level end, wherein the second level end is used for providing the second level signal.
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