Disclosure of Invention
In order to overcome the disadvantages of the prior art, it is an object of the present invention to provide a power factor correction circuit, which can effectively control the power factor correction circuit to operate in a critical mode by a first rectification circuit being turned on or off when receiving a control signal outputted by a controller, the control signal being obtained by the controller according to a first level outputted by a first detection circuit or a second level outputted by a second detection circuit.
One of the purposes of the invention is realized by adopting the following technical scheme:
a power factor correction circuit comprising: the device comprises a boost inductor, a first rectifying circuit, a first detection circuit, a second rectifying circuit and a filter circuit;
the boost inductor has one end connected to one end of the ac power transmission network and the other end connected to the midpoint of the first rectifying circuit, and is configured to boost a voltage output from the ac power transmission network;
the first rectifying circuit is connected with one end of the filter circuit at one end, connected with the other end of the filter circuit at the other end, and connected with the controller at a control end, and used for switching on or off when receiving a control signal output by the controller so as to control the power factor correction circuit to work in a critical mode, wherein the control signal is output by the controller when receiving a first level or a second level;
the first detection circuit is connected with one end of the filter circuit, the other end of the first detection circuit is connected with the midpoint of the first rectifying circuit, and the output end of the first detection circuit is connected with the controller and used for outputting a first level to the controller when the current of the midpoint of the first rectifying circuit is reversed;
the second detection circuit has one end connected to the other end of the filter circuit, the other end connected to the midpoint of the first rectification circuit, and an output end connected to the controller, and is used for outputting a second level to the controller when the current of the midpoint of the first rectification circuit is reversed;
the second rectifying circuit is connected with one end of the filter circuit, the other end of the second rectifying circuit is connected with the other end of the filter circuit, and the middle point of the second rectifying circuit is connected with the other end of the alternating current transmission network;
the first rectifying circuit and the second rectifying circuit are used for converting alternating-current voltage output from the alternating-current power transmission network into pulsating direct-current voltage;
the filter circuit is used for filtering alternating current voltage in the pulsating direct current voltage.
Further, the first rectification circuit includes:
the first switch tube comprises a first control end, a first source end and a first drain end, the first control end is connected to the controller, the first drain end is connected with one end of the filter circuit, and the first source end is connected with the other end of the boost inductor;
the second switch tube comprises a second control end, a second source end and a second drain end, the second control end is connected to the controller, the second drain end is connected with the other end of the boost inductor, and the second source end is connected with the other end of the filter circuit;
the first control end and the second control end are used for receiving a control signal of a controller, and the first switching tube and the second switching tube are alternately conducted under the control of the control signal so as to control the power factor correction circuit to work in a critical mode, wherein in the critical mode, a body diode of the first switching tube or the second switching tube is changed into a cut-off state from a reverse recovery state.
Further, the first detection circuit comprises a first current limiting resistor, a first energy storage capacitor, a first voltage stabilizing diode and a first discharging resistor;
the first current limiting resistor and the first energy storage capacitor are connected in series between the midpoint of the first rectifying circuit and the anode of the first voltage stabilizing diode, the first voltage stabilizing diode is connected in parallel with the first discharging resistor, and the anode and the cathode of the first voltage stabilizing diode are respectively connected to the controller and one end of the filter circuit;
the anode of the first voltage stabilizing diode is used for outputting the first level to the controller when the current of the midpoint of the first rectifying circuit changes from the boosting inductor to the second switching tube to the boosting inductor from the second switching tube.
Further, the second detection circuit comprises a second current limiting resistor, a second energy storage capacitor, a second voltage stabilizing diode and a second discharge resistor;
the second current-limiting resistor and the second energy-storing capacitor are connected in series between the midpoint of the first rectifying circuit and the anode of the second voltage-stabilizing diode, the second voltage-stabilizing diode is connected in parallel with the second discharging resistor, and the anode and the cathode of the second voltage-stabilizing diode are respectively connected to the other ends of the controller and the filter circuit;
the anode of the second voltage stabilizing diode is used for outputting the second level to the controller when the current of the midpoint of the first rectifying circuit changes from the boosting inductor to the first switching tube to the boosting inductor from the first switching tube.
Further, the first switch tube and the second switch tube are respectively any one of Si _ MOS, SIC _ MOS, GAN _ MOS and IGBT.
Further, the second rectification circuit includes:
the third switching tube comprises a third control end, a third source end and a third drain end, the third control end is connected to the controller, the third drain end is connected to one end of the filter circuit, and the third source end is connected to the other end of the alternating current transmission network;
the fourth switching tube comprises a fourth control end, a fourth source end and a fourth drain end, the fourth control end is connected to the controller, the fourth drain end is connected to the other end of the alternating current transmission network, and the fourth source end is connected to the other end of the filter circuit;
the third control terminal and the fourth control terminal are used for receiving control signals of a controller, the third switching tube and the fourth switching tube are alternately conducted under the control of the control signals so as to control the third switching tube and the fourth switching tube to be respectively turned off and on in the positive half cycle of the alternating current output from the alternating current transmission network, and the third switching tube and the fourth switching tube to be respectively turned on and off in the negative half cycle of the alternating current output from the alternating current transmission network.
Further, the third switching tube and the fourth switching tube are respectively any one of Si _ MOS, SIC _ MOS, GAN _ MOS and IGBT.
Further, the filter circuit comprises a bus capacitor, and the anode and the cathode of the bus capacitor are respectively connected with the first detection circuit and the second detection circuit.
The second objective of the present invention is to provide a control device for a power factor correction circuit, which outputs a switch control signal when receiving a first level output by a first detection circuit or a second level output by a second detection circuit through a controller, so as to control a first rectification circuit to be turned on or off to make the power factor correction circuit operate in a critical mode, and is stable and reliable.
The second purpose of the invention is realized by adopting the following technical scheme:
a control device of a power factor correction circuit comprises an alternating current power transmission network, a controller and the power factor correction circuit which is one of the purposes of the invention, wherein the controller is respectively connected with the first rectifying circuit, the second rectifying circuit, the first detection circuit and the second detection circuit and is used for outputting switch control signals to the first rectifying circuit and the second rectifying circuit so as to control the first rectifying circuit and the second rectifying circuit to be switched on or switched off, and outputting switch control signals to control the first rectifying circuit to be switched on or switched off when receiving the first level or the second level so as to enable the power factor correction circuit to work in a critical mode.
The third objective of the present invention is to provide a control method for a power factor correction circuit, in which a first switch tube and a second switch tube are alternately turned on or off to control the envelope phase of the current waveform of a boost inductor to match the envelope phase of the input waveform of an ac power transmission network, and simultaneously, the body diodes of the first switch tube and the second switch tube are controlled to perform reverse recovery, thereby controlling the power factor correction circuit to operate in a critical mode.
The third purpose of the invention is realized by adopting the following technical scheme:
in the positive half cycle of the alternating current input of the alternating current transmission network, a controller outputs a first control signal to a third switching tube and a fourth switching tube, and the third switching tube and the fourth switching tube are respectively turned off and turned on in response to the first control signal;
the controller outputs a second control signal to the first switching tube and the second switching tube when the conduction time of the first switching tube reaches a preset first conduction time, and the first switching tube and the second switching tube are both turned off in response to the second control signal;
the controller outputs a third control signal to the first switching tube and the second switching tube when receiving a second level, and the first switching tube and the second switching tube are respectively turned off and turned on in response to the third control signal;
the controller outputs a second control signal to the first switching tube and the second switching tube when the conduction time of the second switching tube reaches a preset second conduction time, and the first switching tube and the second switching tube are both turned off in response to the second control signal;
the controller outputs a fourth control signal to the first switching tube and the second switching tube when the turn-off time of the second switching tube reaches a preset first turn-off time, and the first switching tube and the second switching tube respond to the fourth control signal and are respectively turned on and off;
in the negative half cycle of the alternating current input of the alternating current transmission network, the controller outputs a fifth control signal to the third switching tube and the fourth switching tube, and the third switching tube and the fourth switching tube are respectively switched on and off in response to the first control signal;
the controller outputs a second control signal to the first switching tube and the second switching tube when the conduction time of the second switching tube reaches a preset third conduction time, and the first switching tube and the second switching tube are both turned off in response to the second control signal;
the controller outputs a fourth control signal to the first switching tube and the second switching tube when receiving a first level, and the first switching tube and the second switching tube are respectively switched on and off in response to the fourth control signal;
the controller outputs a second control signal to the first switching tube and the second switching tube when the conduction time of the first switching tube reaches a preset fourth conduction time, and the first switching tube and the second switching tube are both turned off in response to the second control signal;
the controller outputs a third control signal to the first switching tube and the second switching tube when the turn-off time of the first switching tube reaches a preset second turn-off time, and the first switching tube and the second switching tube respond to the third control signal and are respectively turned off and turned on.
Compared with the prior art, the invention has the beneficial effects that:
according to the invention, the controller generates the control signal according to the first level output by the first detection circuit or the second level output by the second detection circuit, the first rectification circuit is switched on or off when receiving the control signal, so that the power factor correction circuit is effectively controlled to work in a critical mode, and the circuit is simple, efficient and reliable.
Detailed Description
The present invention will now be described in more detail with reference to the accompanying drawings, in which the description of the invention is given by way of illustration and not of limitation. The current limiting resistor, the discharging resistor and the load resistor in each embodiment are all resistor networks, may be a resistor element, or may be a circuit formed by connecting a plurality of resistor elements with different and/or the same resistance in series and/or in parallel, the boost inductor is an inductor network, may be an inductor element, or may be a circuit formed by connecting a plurality of inductor elements with different and/or the same resistance in series and/or in parallel, the energy storage capacitor is a capacitor network, may be a capacitor element, or may be a circuit formed by connecting a plurality of capacitor elements with different and/or the same resistance in series and/or in parallel. The various embodiments may be combined with each other to form other embodiments not shown in the following description.
Example one
Referring to fig. 2, the power factor correction circuit 100 includes a boost inductor L1, a first rectifying circuit 110, a first detecting circuit 120, a second detecting circuit 130, a second rectifying circuit 140, and a filter circuit 160. The boost inductor L1 has one end connected to one end of the AC and the other end connected to the midpoint of the first rectification circuit 110 for boosting the voltage output from the AC.
The first rectifying circuit 110 has one end connected to one end of the filter circuit 160, the other end connected to the other end of the filter circuit 160, and a control end connected to the controller 150 for turning on or off to control the power factor correction circuit 100 to operate in the critical mode when receiving a control signal output by the controller 150 when receiving the first level or the second level.
The first detection circuit 120 has one end connected to one end of the filter circuit 160, the other end connected to the midpoint of the first rectification circuit 110, and an output end connected to the controller 150, for outputting a first level to the controller 150 when the current of the midpoint of the first rectification circuit 110 is reversed.
The second detection circuit 130 has one end connected to the other end of the filter circuit 160, the other end connected to the midpoint of the first rectification circuit 110, and an output end connected to the controller 150, for outputting a second level to the controller 150 when the current of the midpoint of the first rectification circuit 110 is reversed.
One end of the second rectification circuit 140 is connected to one end of the filter circuit 160, and the other end is connected to the other end of the filter circuit 160, with its midpoint connected to the other end of the alternating current transmission network AC.
The first and second rectification circuits 110 and 140 convert an alternating current voltage output from the AC power transmission network AC into a pulsating direct current voltage, and the filter circuit 160 filters the alternating current voltage of the pulsating direct current voltage.
In other embodiments, the first switch Q1 and the second switch Q2 are alternately turned on or off to control the envelope phase of the current waveform of the boost inductor L1 to match the envelope phase of the input waveform of the AC grid AC, and at the same time, the uncontrollable reverse recovery of the body diode of the first switch Q1 can be eliminated, so that the control power factor correction circuit 100 can operate in a critical mode, and the loss caused by the reverse recovery can be reduced, which is efficient and reliable, and the first detection circuit 120 and the second detection circuit 130 have the same structure, and can be produced in a modularized manner, and are convenient to install and replace.
The first rectifying circuit 110 includes a first switching tube Q1 and a second switching tube Q2. The first switch Q1 includes a first control terminal, a first source terminal and a first drain terminal, the first control terminal is connected to the controller 150, the first drain terminal is connected to one end of the filter circuit 160, and the first source terminal is connected to the other end of the boost inductor L1. The second switch Q2 includes a second control terminal, a second source terminal, and a second drain terminal, the second control terminal is connected to the controller 150, the second drain terminal is connected to the other end of the boost inductor L1, and the second source terminal is connected to the other end of the filter circuit 160.
The first control terminal and the second control terminal are configured to receive a control signal from the controller 150, and the first switching transistor Q1 and the second switching transistor Q2 are alternately turned on under the control of the control signal to control the power factor correction circuit 100 to operate in a critical mode, in which the body diode of the first switching transistor Q1 or the second switching transistor Q2 is changed from a reverse recovery state to an off state.
In this embodiment, the first switch tube Q1 and the second switch tube Q2 are both Si _ MOS tubes, that is, silicon-based super junction MOS is adopted, which can effectively reduce the circuit cost.
As an optional technical solution, the first switching tube Q1 and the second switching tube Q2 may be any one of semiconductor switching devices such as an IGBT, a SIC, a GAN, and an IGBT, respectively.
The first detection circuit 120 includes a first current limiting resistor R1, a first energy storage capacitor C1, a first zener diode Z1, and a first discharge resistor R2. The first current limiting resistor R1 and the first energy storage capacitor C1 are connected in series between the midpoint of the first rectifying circuit 110 and the anode of the first zener diode Z1, the first zener diode Z1 is connected in parallel with the first discharge resistor R2, and the anode and cathode of the first zener diode Z1 are connected to the controller 150 and one end of the filter circuit 160, respectively. The anode of the first zener diode Z1 outputs a first level to the controller 150 when the current flowing from the midpoint of the first rectifying circuit 110 changes from the boost inductor L1 to the second switching tube Q2 to flow from the second switching tube Q2 to the boost inductor L1.
The second detection circuit 130 includes a second current limiting resistor R3, a second energy storage capacitor C2, a second zener diode Z2, and a second discharge resistor R4. The second current-limiting resistor R3 and the second energy-storing capacitor C2 are connected in series between the midpoint of the first rectifying circuit 110 and the anode of the second zener diode Z2, the second zener diode Z2 is connected in parallel with the second discharging resistor R4, and the anode and cathode of the second zener diode Z2 are connected to the other end of the controller 150 and the other end of the filter circuit 160, respectively. The anode of the second zener diode Z2 is used to output a second level to the controller 150 when the current flowing from the midpoint of the first rectifying circuit 110 changes from the boost inductor L1 to the first switching tube Q1 to flow from the first switching tube Q1 to the boost inductor L1.
The second rectifying circuit 140 includes a third switching tube Q3 and a fourth switching tube Q4. The third switch Q3 includes a third control terminal, a third source terminal and a third drain terminal, the third control terminal is connected to the controller 150, the third drain terminal is connected to one end of the filter circuit 160, and the third source terminal is connected to the other end of the AC power transmission network AC. The fourth switching tube Q4 includes a fourth control terminal, a fourth source terminal and a fourth drain terminal, the fourth control terminal is connected to the controller 150, the fourth drain terminal is connected to the other end of the AC power transmission network AC, and the fourth source terminal is connected to the other end of the filter circuit 160.
The third control terminal and the fourth control terminal are used for receiving a control signal of the controller 150, the third switching tube Q3 and the fourth switching tube Q4 are alternately turned on under the control of the control signal to control the third switching tube Q3 and the fourth switching tube Q4 to be turned off and turned on respectively at the positive half cycle of the AC output from the AC power grid AC, and the third switching tube Q3 and the fourth switching tube Q4 to be turned on and turned off respectively at the negative half cycle of the AC output from the AC power grid AC.
In this embodiment, the third switching tube Q3 and the fourth switching tube Q4 are both Si _ MOS tubes, that is, silicon-based super junction MOS is adopted, which can effectively reduce the circuit cost.
As an alternative solution, the third switching tube Q3 and the fourth switching tube Q4 may be any one of semiconductor switching devices such as an IGBT, a SIC, and a GAN.
The filter circuit 160 includes a bus capacitor C3, and the positive electrode and the negative electrode of the bus capacitor C3 are respectively connected to the first detection circuit 120 and the second detection circuit 130.
The power factor correction circuit further includes a load circuit, which in this embodiment includes a load resistor R5, and the load resistor R5 is connected in parallel with the filter circuit 160. It is to be noted that the load circuit is not limited to the above type.
The level of the anode of the second zener diode Z2 with respect to the level of the cathode of the bus capacitor C3 is referred to as ZVS2 level. The operation principle of the power factor correction circuit 100 in the positive half cycle of the AC input of the AC grid AC is: during the positive half cycle of the AC input of the AC grid AC, the third switching tube Q3 and the fourth switching tube Q4 are turned off and on, respectively, under the control of the control signal. When the power factor correction circuit 100 operates when the AC input of the AC grid AC changes from a negative half cycle to a positive half cycle, the first switching tube Q1 and the second switching tube Q2 are respectively turned off and on under the control of the control signal, the AC voltage is applied across the boost inductor L1, the level of the midpoint of the first rectifying circuit 110 is zero with respect to the level of the negative pole of the bus capacitor C3, the current in the boost inductor L1 rises linearly from zero, the current flows from the AC grid AC flow to the boost inductor L1 to the second switching tube Q2 to the fourth switching tube Q4 to the AC grid AC, and the ZVS2 level is zero.
When the conduction time of the second switching tube Q2 reaches the preset second conduction time, the first switching tube Q1 and the second switching tube Q2 are both turned off under the control of the control signal, when the voltage at the midpoint of the first rectifying circuit 110 rapidly rises to the voltage of the bus capacitor C3, the body diode of the first switching tube Q1 is turned on and simultaneously charges the second energy storage capacitor C2, the current flows from the AC grid AC to the boost inductor L1 to the first switching tube Q1 to the bus capacitor C3 to the fourth switching tube Q4 to the AC grid AC, and the current flows from the AC grid AC to the boost inductor L1 to the second energy storage capacitor C2 to the second voltage stabilizing diode Z2 to the fourth switching tube Q4 to the AC grid AC, and the level of the ZVS2 is the forward conduction voltage drop of the second voltage stabilizing diode Z2.
When the time that the second switching tube Q2 is turned off reaches the preset first turn-off time, the first switching tube Q1 and the second switching tube Q2 are respectively turned on and off under the control of the control signal, the current in the boosting inductor L1 linearly decreases, the second energy storage capacitor C2 is in a charging state, the current flows from the alternating current power grid AC to the boosting inductor L1 to the first switching tube Q1 to the bus capacitor C3 to the fourth switching tube Q4 to the alternating current power grid AC, and the ZVS2 level is zero.
When the conduction time of the first switching tube Q1 reaches a preset first conduction time, the first switching tube Q1 and the second switching tube Q2 are both turned off, that is, the first switching tube Q1 and the second switching tube Q2 are turned off in advance when the current in the boosting inductor L1 does not drop to zero, at this time, the body diode of the first switching tube Q1 recovers in the reverse direction, because the current in the boosting inductor L1 cannot suddenly change, the current in the boosting inductor L1 reverses and discharges the junction capacitor of the second switching tube Q2, the junction capacitor of the first switching tube Q1 charges, the second energy storage capacitor C2 discharges, the current flows from the first switching tube Q1 to the boosting inductor L1 to the alternating current grid AC current to the fourth switching tube 37q 84 to the bus capacitor C3 to the first switching tube Q1, and the current flows from the second energy storage capacitor C45 to the boosting inductor L1 to the fourth switching tube AC power grid AC current to the second switching tube Q58r 57323 to the second energy storage capacitor Q5857323, the ZVS2 level is negative.
At this time, the current flowing from the boost inductor L1 to the midpoint of the first rectifying circuit 110 through the first switching tube Q1 changes to flow from the first switching tube Q1 to the boost inductor L1, the current flowing from the boost inductor L1 to the midpoint of the first rectifying circuit 110 changes to flow from the midpoint of the first rectifying circuit 110 to the AC power grid AC, that is, the current flowing from the boost inductor L1 reverses, and the positive output of the second zener diode Z2 drops to the second level of the negative level with respect to the level of the negative electrode of the bus capacitor C3 to the controller 150. The first switch Q1 and the second switch Q2 are turned off and on respectively under the control signal of the controller 150, the body diode of the first switch Q1 changes from the reverse recovery state to the off state, the current in the boost inductor L1 recovers to flow from the AC power grid to the midpoint of the first rectification circuit 110, the current at the midpoint of the first rectification circuit 110 flows from the boost inductor L1 to the second switch Q2, the voltage drop across the second switch Q2 is zero, and the level of the positive pole of the second zener diode Z2 is also zero with respect to the level of the negative pole of the bus capacitor C3.
Thereafter, during the positive half cycle of the AC input to the AC grid AC, the first switching tube Q1 and the second switching tube Q2 cycle under the control of the control signal during the following duty cycle: when the on time of the first switch tube Q1 reaches a preset first on time, the first switch tube Q1 and the second switch tube Q2 are both turned off; when the ZVS2 level is negative, the first switch tube Q1 is turned off, and the second switch tube Q2 is turned on; when the on time of the second switch tube Q2 reaches a preset second on time, both the first switch tube Q1 and the second switch tube Q2 are turned off; when the time that the second switch tube Q2 is turned off reaches a preset first turn-off time, the first switch tube Q1 is turned on, and the second switch tube Q2 is turned off.
By means of the above-mentioned alternate turning on and off of the first switch tube Q1 and the second switch tube Q2, the envelope phase of the current waveform of the boost inductor L1 can be effectively controlled to coincide with the envelope phase of the input waveform of the AC power grid AC during the positive half cycle of the AC power grid AC input, and at the same time, the body diode reverse recovery of the first switch tube Q1 is controlled, so that the reverse loss of the first switch tube Q1 is reduced.
Similarly, assuming that the level of the positive electrode of the first zener diode Z1 is ZVS1 with respect to the level of the positive electrode of the bus capacitor C3, the operation principle of the power factor correction circuit 100 in the negative half cycle of the AC input of the AC grid AC is as follows: in the negative half cycle of the AC input of the AC power grid AC, the third switching tube Q3 and the fourth switching tube Q4 are respectively turned on and off under the control of the control signal, when the current at the midpoint of the first rectification circuit 110 flows from the boost inductor L1 to the second switching tube Q2 to flow from the second switching tube Q2 to the boost inductor L1, the ZVS1 level is a negative level, the positive electrode of the first zener diode Z1 outputs a first level that is reduced to a negative level with respect to the level of the positive electrode of the bus capacitor C3 to the controller 150, the first switching tube Q1 and the second switching tube Q2 are respectively turned on and off under the control signal of the controller 150, the body diode of the second switching tube Q2 is changed from the reverse recovery state to the off state, the current in the boost inductor L1 is recovered to flow from the AC power grid AC to the midpoint of the first rectification circuit 110, the current at the midpoint of the first rectification circuit 110 flows from the boost inductor L1 to the first switching tube Q1, meanwhile, the voltage drop across the first switching tube Q1 is zero, and the level of the anode of the first zener diode Z1 is also zero relative to the level of the anode of the bus capacitor C3.
During the negative half cycle of the AC input to the AC grid AC, the first switching tube Q1 and the second switching tube Q2 cycle under the control of the control signal during the following duty cycle: when the on time of the second switch tube Q2 reaches a preset third on time, both the first switch tube Q1 and the second switch tube Q2 are turned off; when the ZVS1 level is negative, the first switch tube Q1 is turned on, and the second switch tube Q2 is turned off; when the on time of the first switch tube Q1 reaches a preset fourth on time, the first switch tube Q1 and the switch tube are both turned off; when the time that the first switch tube Q1 is turned off reaches a preset second turn-off time, the first switch tube Q1 is turned off, and the second switch tube Q2 is turned on.
Example two
Referring to fig. 3, the second embodiment provides a control apparatus of a power factor correction circuit 100, which includes an AC power transmission network AC, a controller 150 and the power factor correction circuit 100 of the first embodiment, wherein the controller 150 is respectively connected to the first rectification circuit 110, the second rectification circuit 140, the first detection circuit 120 and the second detection circuit 130, and is configured to output a switching control signal to the first rectification circuit 110 and the second rectification circuit 140 to control the first rectification circuit 110 and the second rectification circuit 140 to be turned on or off, and output the switching control signal to control the first rectification circuit 110 to be turned on or off when receiving the first level or the second level, so that the power factor correction circuit 100 operates in a critical mode, and the loop operates in the critical mode stably and reliably.
Preferably, the controller 150 is respectively connected to the anode of the first zener diode Z1, the anode of the second zener diode Z2, the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4.
The controller 150 includes four control terminals (c _1, c _2, c _3, and c _4) and two receiving terminals (r _1 and r _ 2). The switch control signal is output to the first switch tube Q1 through the control terminal c _1, the switch control signal is output to the second switch tube Q2 through the control terminal c _2, the switch control signal is output to the third switch tube Q3 through the control terminal c _3, and the switch control signal is output to the fourth switch tube Q4 through the control terminal c _ 4. The first level output by the first detection circuit 120 is received by the receiver r _1, and the second level output by the second detection circuit 130 is received by the receiver r _ 2.
The switching control signals output by the controller 150 include a first control signal, a second control signal, a third control signal, a fourth control signal, and a fifth control signal. The first control signal and the fifth control signal are both output to the third switching tube Q3 through the control terminal c _3, and are both output to the fourth switching tube Q4 through the control terminal c _ 4. The second control signal, the third control signal and the fourth control signal are all output to the first switch tube Q1 through the control terminal c _1 and are all output to the second switch tube Q2 through the control terminal c _ 2.
The first control signal is: the third switch tube Q3 is turned off, and the fourth switch tube Q4 is turned on.
The second control signal is: the first switch tube Q1 is turned off, and the second switch tube Q2 is turned off.
The third control signal is: the first switch tube Q1 is turned off, and the second switch tube Q2 is turned on.
The fourth control signal is: the first switch tube Q1 is turned on, and the second switch tube Q2 is turned off.
The fifth control signal is: the third switch tube Q3 is turned on, and the fourth switch tube Q4 is turned off.
During the positive half cycle of the AC input of the AC grid AC, the controller 150 outputs the first control signal to the third switching transistor Q3 and the fourth switching transistor Q4. When the time that the first switch Q1 is turned on reaches a first preset on-time or the time that the second switch Q2 is turned on reaches a second preset on-time, the controller 150 outputs a second control signal to the first switch Q1 and the second switch Q2. When receiving the second level, the controller 150 outputs a third control signal to the first switch transistor Q1 and the second switch transistor Q2. The controller 150 outputs a fourth control signal to the first switching tube Q1 and the second switching tube Q2 when the time that the second switching tube Q2 is turned off reaches a preset first turn-off time.
During the negative half cycle of the AC input of the AC grid AC, the controller 150 outputs a fifth control signal to the third switching transistor Q3 and the fourth switching transistor Q4. When the time that the second switch Q2 is turned on reaches the third preset on-time or the time that the first switch Q1 is turned on reaches the fourth preset on-time, the controller 150 outputs the second control signal to the first switch Q1 and the second switch Q2. When the time that the first switch Q1 is turned off reaches the preset second off time, the controller 150 outputs a third control signal to the first switch Q1 and the second switch Q2. The controller 150 outputs a fourth control signal to the first switch transistor Q1 and the second switch transistor Q2 when receiving the first level.
The envelope phase of the current waveform of the boost inductor L1 can be controlled to match the envelope phase of the input waveform of the AC power transmission network AC by alternately turning on and off the first switching tube Q1 and the second switching tube Q2, and the body diodes of the first switching tube Q1 and the second switching tube Q2 are controlled to perform reverse recovery, so as to control the power factor correction circuit 100 to operate in the critical mode.
EXAMPLE III
According to the circuit structure and the operation principle of the second embodiment, a control method of the power factor correction circuit 100 can be obtained, the control method comprising:
during the positive half cycle of the AC input of the AC grid AC, the controller 150 outputs a first control signal to the third transistor Q3 and the fourth transistor Q4, and the third transistor Q3 and the fourth transistor Q4 turn off and on, respectively, in response to the first control signal;
the controller 150 outputs a second control signal to the first switching tube Q1 and the second switching tube Q2 when the on time of the first switching tube Q1 reaches a preset first on time, and the first switching tube Q1 and the second switching tube Q2 are both turned off in response to the second control signal;
the controller 150 outputs a third control signal to the first switch tube Q1 and the second switch tube Q2 when receiving the second level, and the first switch tube Q1 and the second switch tube Q2 are turned off and on respectively in response to the third control signal;
the controller 150 outputs a second control signal to the first switching tube Q1 and the second switching tube Q2 when the on time of the second switching tube Q2 reaches a preset second on time, and the first switching tube Q1 and the second switching tube Q2 are both turned off in response to the second control signal;
the controller 150 outputs a fourth control signal to the first switching tube Q1 and the second switching tube Q2 when the time that the second switching tube Q2 is turned off reaches a preset first turn-off time, and the first switching tube Q1 and the second switching tube Q2 are turned on and off respectively in response to the fourth control signal;
during the negative half cycle of the AC input of the AC grid AC, the controller 150 outputs a fifth control signal to the third transistor Q3 and the fourth transistor Q4, and the third transistor Q3 and the fourth transistor Q4 turn on and off, respectively, in response to the first control signal;
the controller 150 outputs a second control signal to the first switching tube Q1 and the second switching tube Q2 when the on time of the second switching tube Q2 reaches a preset third on time, and the first switching tube Q1 and the second switching tube Q2 are both turned off in response to the second control signal;
the controller 150 outputs a fourth control signal to the first switch tube Q1 and the second switch tube Q2 when receiving the first level, and the first switch tube Q1 and the second switch tube Q2 are turned on and off respectively in response to the fourth control signal;
the controller 150 outputs a second control signal to the first switching tube Q1 and the second switching tube Q2 when the on time of the first switching tube Q1 reaches a preset fourth on time, and the first switching tube Q1 and the second switching tube Q2 are both turned off in response to the second control signal;
the controller 150 outputs a third control signal to the first switching tube Q1 and the second switching tube Q2 when the time that the first switching tube Q1 is turned off reaches a preset second turn-off time, and the first switching tube Q1 and the second switching tube Q2 are turned off and on respectively in response to the third control signal.
It should be noted that, in the foregoing embodiment, each included module and unit are only divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be implemented; in addition, specific names of the functional modules and units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
Various other modifications and changes may be made by those skilled in the art based on the above-described technical solutions and concepts, and all such modifications and changes should fall within the scope of the claims of the present invention.