CN112104002B - Alternating current power supply parallel operation method and device - Google Patents
Alternating current power supply parallel operation method and device Download PDFInfo
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- CN112104002B CN112104002B CN202011217930.4A CN202011217930A CN112104002B CN 112104002 B CN112104002 B CN 112104002B CN 202011217930 A CN202011217930 A CN 202011217930A CN 112104002 B CN112104002 B CN 112104002B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
- H02J3/46—Controlling of the sharing of output between the generators, converters, or transformers
- H02J3/466—Scheduling the operation of the generators, e.g. connecting or disconnecting generators to meet a given demand
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Abstract
The invention discloses a parallel operation method and a parallel operation device for alternating current power supplies, wherein in the method, when a host detects that motors of a plurality of alternating current power supplies are connected in parallel, a current reference value is sent to a slave machine through an FPGA (field programmable gate array) interface and a differential signal data line; the slave machine carries out modulation output according to the current reference value; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
Description
Technical Field
The invention relates to the technical field of power supplies, in particular to an alternating current power supply parallel operation method and device.
Background
With the improvement of the test requirements of 5G and new energy, the power requirement on the AC Source is also continuously improved; this also requires several AC Source motors in parallel to obtain higher power.
Generally, a parallel AC Source motor adopts a master-slave mode, a master voltage loop and a slave current loop work in a double-loop mode; the output of the host voltage control loop is transmitted to the slave machine through an analog signal and used as a reference value of the slave machine current control loop; but the analog signal is easily distorted by interference, thereby affecting the parallel operation effect.
Disclosure of Invention
The invention mainly aims to provide an alternating current power supply parallel operation method and device, and aims to solve the technical problems that in the prior art, the current reference value transmission rate is low, the hardware implementation is complicated, and parallel operation simulation signals of an alternating current power supply are easy to be interfered and distorted, so that the parallel operation effect is poor.
In a first aspect, the present invention provides an ac power supply parallel operation method, including the following steps:
when detecting that the motors of a plurality of alternating current power supplies are connected in parallel, the host sends the current reference value to the slave through the FPGA interface and the differential signal data line;
and the slave machine performs modulation output according to the current reference value.
Optionally, the master includes a reference voltage generating unit, a voltage control loop, a master current control loop, and a master PWM modulator, and when detecting that the motors of the multiple ac power supplies are connected in parallel, the master sends the current reference value to the slave through the FPGA interface and the differential signal data line, including:
when the host detects that the motors of a plurality of alternating current power supplies are connected in parallel, acquiring output voltage after parallel connection;
the host acquires the reference voltage output by the reference voltage generating unit and inputs the output voltage and the reference voltage to the voltage control loop;
and the voltage control loop calculates to obtain a current reference value, and the current reference value is sent to the slave machine according to a preset PWM period through an FPGA interface and a differential signal data line.
Optionally, the voltage control loop calculates to obtain a current reference value, and sends the current reference value to the slave machine according to a preset PWM cycle through the FPGA interface and the differential signal data line, including:
the voltage control loop calculates and obtains a current reference value;
and the host machine sends the current reference value to the slave machine according to a preset PWM cycle through the FPGA interface and the asynchronous communication line, or the host machine sends the current reference value to the slave machine according to the preset PWM cycle through the FPGA interface, the clock line and the data communication line.
Optionally, the voltage control loop calculating the obtained current reference value includes:
and the voltage control loop compares the output voltage value with the reference voltage and obtains a current reference value according to a comparison result and a preset closed-loop control relation.
Optionally, after the master machine sends the current reference value to the slave machine through the FPGA interface and the differential signal data line when detecting that the motors of the multiple ac power supplies are connected in parallel, the ac power supply parallel operation method further includes:
the host current control loop acquires host output current, generates a host signal to be modulated according to the current reference value and the host output current, and sends the host signal to be modulated to the host PWM modulator;
and after the host PWM modulator carries out pulse width modulation on the host signal to be modulated, the host PWM modulator outputs a host modulated signal.
Optionally, the slave includes a slave current control loop and a slave PWM modulator, and the slave performs modulation output according to the current reference value, including:
the slave machine collects slave machine output current and inputs the current reference value and the slave machine output current into a slave machine current control loop;
the slave current control loop generates a slave to-be-modulated signal according to the current reference value and the slave output current, and outputs the slave to-be-modulated signal to the slave PWM modulator;
and after the slave PWM modulator performs pulse width modulation on the slave to-be-modulated signal, the slave PWM modulator outputs a slave modulated signal.
In a second aspect, the present invention further provides an ac power parallel operation apparatus, including:
a master and a slave, wherein,
the master machine is used for sending the current reference value to the slave machine through the FPGA interface and the differential signal data line when the motors of a plurality of alternating current power supplies are detected to be connected in parallel;
and the slave machine is used for carrying out modulation output according to the current reference value.
Optionally, the host includes a reference voltage generation unit and a voltage control loop; wherein the content of the first and second substances,
the host is also used for collecting output voltage and output current after parallel connection when the motors of the multiple alternating current power supplies are detected to be connected in parallel;
the host is also used for acquiring the reference voltage output by the reference voltage generating unit;
the reference voltage generating unit is used for inputting the output voltage and the reference voltage to the voltage control loop;
and the voltage control loop is used for calculating to obtain a current reference value, and sending the current reference value to the slave machine according to a preset PWM period through an FPGA interface and a differential signal data line.
Optionally, the host further comprises a host current control loop and a host PWM modulator; wherein the content of the first and second substances,
the host current control loop is used for acquiring host output current, generating a host signal to be modulated according to the current reference value and the host output current, and sending the host signal to be modulated to the host PWM modulator;
and the host PWM modulator is used for outputting a host modulated signal after the host to-be-modulated signal is subjected to pulse width modulation.
Optionally, the slave comprises a slave current control loop and a slave PWM modulator; wherein the content of the first and second substances,
the slave is also used for collecting slave output current and inputting the current reference value and the slave output current into the slave current control loop;
the slave current control loop is used for generating a slave to-be-modulated signal according to the current reference value and the slave output current and outputting the slave to-be-modulated signal to the slave PWM modulator;
and the slave PWM modulator is used for outputting a slave modulated signal after the slave to-be-modulated signal is subjected to pulse width modulation.
According to the parallel operation method of the alternating current power supplies, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the current reference value is sent to the slave through the FPGA interface and the differential signal data line; the slave machine carries out modulation output according to the current reference value; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
Drawings
FIG. 1 is a schematic flow chart of a parallel operation method of AC power supplies according to a first embodiment of the present invention;
FIG. 2 is a schematic flow chart of a parallel operation method of AC power supplies according to a second embodiment of the present invention;
FIG. 3 is a schematic flow chart of a third embodiment of a parallel operation method for AC power supplies according to the present invention;
FIG. 4 is a schematic flow chart of a fourth embodiment of an AC power supply parallel operation method according to the present invention;
FIG. 5 is a schematic flow chart of a fifth embodiment of the parallel operation method of the AC power supplies according to the present invention;
FIG. 6 is a schematic structural diagram of a first embodiment of an AC parallel power supply apparatus according to the present invention;
FIG. 7 is a schematic structural diagram of an AC parallel power supply device according to a second embodiment of the present invention;
fig. 8 is a schematic structural diagram of a third embodiment of an ac power parallel operation device according to the present invention;
fig. 9 is a schematic structural diagram of an ac power combiner device according to a fourth embodiment of the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The solution of the embodiment of the invention is mainly as follows: when the motors of a plurality of alternating current power supplies are detected to be connected in parallel through the host, the current reference value is sent to the slave through the FPGA interface and the differential signal data line; the slave machine carries out modulation output according to the current reference value; the current reference value can be transmitted through the digital signal, the transmission speed is high, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, the hardware implementation is simple and convenient, the parallel operation effect is improved, the parallel operation processing time is saved, the parallel operation efficiency is improved, the technical problems that in the prior art, the transmission speed of the current reference value is low, the hardware implementation is complex, and the analog signal of the alternating current power supply parallel operation is easy to interfere and distort, so that the parallel operation effect is poor are solved.
Referring to fig. 1, fig. 1 is a schematic flow chart of a parallel operation method of an ac power supply according to a first embodiment of the present invention.
In a first embodiment, the parallel operation method of the alternating current power supplies comprises the following steps:
and step S10, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the host sends the current reference value to the slave through the FPGA interface and the differential signal data line.
It should be noted that, when the motors of the multiple ac power supplies are connected in parallel, that is, the electrodes of the multiple ac power supplies are connected in parallel or are to be connected in parallel, the master may transmit the current reference value to the slave through a Field Programmable Gate Array (FPGA) interface and a differential signal data line, the master is a master motor for performing parallel operation of the ac power supplies, the slave is a slave motor for performing parallel operation of the ac power supplies, the master and the slave both use the FPGA as a controller, and the differential signal data line is used for transmitting the current reference value in a differential signal manner, so that interference can be avoided.
In a specific implementation, the number of bits of the current reference value may be flexibly set, for example, 8 bits, 16 bits, or 24 bits, the current reference value is transmitted through the differential signal data line, the transmission rate is fast, and the transmission of the current reference value can be generally completed within 1 us.
And step S20, the slave machine carries out modulation output according to the current reference value.
It should be understood that the slave, after receiving the current reference value, may perform power modulation output according to the current reference value, and generally use the current after modulation as a switch for controlling its own power circuit, the slave may be multiple, and the slave and the frame of the slave may be identical.
According to the scheme, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the current reference value is sent to the slave through the FPGA interface and the differential signal data line; the slave machine carries out modulation output according to the current reference value; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
Further, fig. 2 is a schematic flowchart of a second embodiment of the ac power parallel operation method according to the present invention, and as shown in fig. 2, the second embodiment of the ac power parallel operation method according to the present invention is proposed based on the first embodiment, in this embodiment, the step S10 includes the following steps:
and step S11, when detecting that the motors of the multiple alternating current power supplies are connected in parallel, the host machine collects the output voltage after parallel connection.
It should be noted that the host includes a reference voltage generation unit, a voltage control loop, a host current control loop, and a host PWM modulator, and when the host detects that the motors of a plurality of ac power supplies are connected in parallel, the host can collect the output voltage after parallel connection, that is, the current output voltage of the host after the parallel connection of the whole parallel circuit architecture.
Step S12, the host acquires the reference voltage output by the reference voltage generating unit, and inputs the output voltage and the reference voltage to the voltage control loop.
It can be understood that the host may further obtain a reference voltage output by the reference voltage generating unit, that is, a preset reference voltage, where the reference voltage generating unit generally includes a Direct Digital Synthesis (DDS), and the main functions of the reference voltage generating unit include generating a sine wave, and setting parameters such as frequency, amplitude, and offset of the sine wave by a user; any waveform can be edited, the waveform is generated, and the output voltage and the reference voltage can be input into the voltage control loop after the reference voltage is obtained, so that the voltage control loop can conveniently compare the voltage magnitude and prepare for subsequent current output.
And step S13, calculating by the voltage control loop to obtain a current reference value, and sending the current reference value to a slave machine according to a preset PWM cycle through an FPGA interface and a differential signal data line.
It should be understood that the current reference value is a reference current determined according to a current voltage and a closed loop condition, the voltage control loop obtains the current reference value through calculation, and then the current reference value can be sent to the slave machine according to a preset PWM period through the FPGA interface and the differential signal data line, where the preset PWM period is a preset Pulse Width Modulation (PWM) Modulation period, that is, a transmission period corresponding to the current reference value, and the PWM adjustments of the master machine and the slave machine may be unipolar, bipolar, mixed polarity, or the like, which is not limited in this embodiment.
According to the scheme, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the output voltage after the parallel connection is acquired; the host acquires the reference voltage output by the reference voltage generating unit and inputs the output voltage and the reference voltage to the voltage control loop; the voltage control loop calculates to obtain a current reference value, the current reference value is sent to the slave machine through the FPGA interface and the differential signal data line according to a preset PWM period, the current reference value can be transmitted through digital signals, the transmission speed is high, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, and the hardware implementation is simple and convenient.
Further, fig. 3 is a schematic flowchart of a third embodiment of the ac power parallel operation method of the present invention, and as shown in fig. 3, the third embodiment of the ac power parallel operation method of the present invention is proposed based on the second embodiment, in this embodiment, the step S13 specifically includes the following steps:
step S131, the voltage control loop calculates and obtains a current reference value.
It should be noted that, the voltage control loop may obtain the current reference value through calculation by a preset conversion algorithm according to the current voltage and the closed loop condition.
Further, the step S131 specifically includes the following steps:
and the voltage control loop compares the output voltage value with the reference voltage and obtains a current reference value according to a comparison result and a preset closed-loop control relation.
It should be understood that, after receiving the output voltage value and the reference voltage, the voltage control loop may compare the output voltage value and the reference voltage to obtain a comparison result, and may obtain a reference current value corresponding to the comparison result according to a preset closed-loop control relationship, where the preset closed-loop control relationship is a preset mapping relationship for reflecting different voltage difference values and different current values in a closed loop; the loop control structure of the voltage control loop may be a Proportional-Integral-derivative Controller (PID Controller), and the like, which is not limited in this embodiment.
And S132, the host sends the current reference value to the slave machine according to a preset PWM cycle through the FPGA interface and the asynchronous communication line, or the host sends the current reference value to the slave machine according to the preset PWM cycle through the FPGA interface, the clock line and the data communication line.
It can be understood that the transmission mode of the current reference value may be a transmission mode of synchronous data or an asynchronous data transmission mode, when the asynchronous transmission mode is adopted, the host sends the current reference value to the slave according to a preset PWM cycle through the FPGA interface and the asynchronous communication line, generally at least one line is needed, both the host and the slave may be hung on the same asynchronous communication line, and at this time, the current reference value is sent from the host to the slave, if the asynchronous communication mode is adopted, it may be simplified to only use one connection line, so that the hardware implementation becomes simple.
It should be understood that, when the synchronous transmission mode is adopted, the host sends the current reference value to the slave according to a preset PWM period through the FPGA interface, the clock line and the data communication line, at least two lines are generally required, that is, a clock line needs to be configured in addition to data, both the data and the clock are sent by the host, and the slave receives the data.
According to the scheme, the current reference value is obtained through adjusting the voltage control loop; the current reference value is transmitted to the slave machine by the host machine through the FPGA interface and the asynchronous communication line according to the preset PWM period, or the current reference value is transmitted to the slave machine through the FPGA interface, the clock line and the data communication line according to the preset PWM period, the current reference value can be transmitted through the digital signal, the transmission speed is high, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, the hardware implementation is simple and convenient, the parallel operation effect is improved, the parallel operation processing time is saved, and the parallel operation efficiency is improved.
Further, fig. 4 is a schematic flowchart of a fourth embodiment of the ac power parallel operation method according to the present invention, and as shown in fig. 4, the fourth embodiment of the ac power parallel operation method according to the present invention is proposed based on the second embodiment, in this embodiment, after the step S20, the ac power parallel operation method further includes the following steps:
and step S30, the host current control loop collects host output current, generates a host signal to be modulated according to the current reference value and the host output current, and sends the host signal to be modulated to the host PWM modulator.
It should be noted that, a host current control loop of the host may acquire an output current of the host in real time, compare the host output current with a reference current corresponding to the current reference value, and according to a comparison result and a mapping relationship between a preset adjustment signal and different current difference values, determine a corresponding modulation signal, and may generate a signal to be modulated by the host, and further send the signal to be modulated by the host to the host PWM modulator, where a loop control structure of the host current control loop may be a Proportional-Integral-Differential Controller (PID Controller), and the like, which is not limited in this embodiment.
And step S40, after the host PWM modulator performs pulse width modulation on the host signal to be modulated, the host modulated signal is output.
It should be understood that, after obtaining the host signal to be modulated, the host PWM modulator may perform pulse width modulation on the host signal to be modulated according to a preset modulation program, so as to obtain and output a host modulated signal.
According to the scheme, the host output current is collected through the host current control loop, a host signal to be modulated is generated according to the current reference value and the host output current, and the host signal to be modulated is sent to the host PWM modulator; after the host PWM modulator carries out pulse width modulation on the host to-be-modulated signal, the host modulated signal is output, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, the hardware implementation is simple and convenient, the parallel operation effect is improved, the parallel operation processing time is saved, and the parallel operation efficiency is improved.
Further, fig. 5 is a schematic flowchart of a fifth embodiment of the ac power parallel operation method according to the present invention, and as shown in fig. 5, the fifth embodiment of the ac power parallel operation method according to the present invention is proposed based on the first embodiment, in this embodiment, the step S20 specifically includes the following steps:
and step S21, the slave machine collects the output current of the slave machine and inputs the current reference value and the output current of the slave machine into a current control loop of the slave machine.
The slave includes a slave current control loop and a slave PWM modulator, and the slave can collect the current slave output current of the slave and input the current reference value and the slave output current to the slave current control loop.
And step S22, the slave current control loop generates a slave standby modulation signal according to the current reference value and the slave output current, and outputs the slave standby modulation signal to the slave PWM modulator.
It can be understood that the slave current control loop compares the slave output current with the reference current corresponding to the current reference value, and according to the comparison result and the mapping relationship between the preset adjustment signal and different current difference values, the corresponding modulation signal can be determined, a slave to-be-modulated signal can be generated, and the slave to-be-modulated signal is sent to the slave PWM modulator.
And step S23, after the slave PWM modulator performs pulse width modulation on the slave signal to be modulated, outputting a slave modulated signal.
It should be understood that, after obtaining the slave to-be-modulated signal, the slave PWM modulator may perform pulse width modulation on the slave to-be-modulated signal according to a preset modulation program, so as to obtain and output a slave modulated signal.
In this embodiment, by using the above scheme, the slave acquires the slave output current, and inputs the current reference value and the slave output current to the slave current control loop; the slave current control loop generates a slave to-be-modulated signal according to the current reference value and the slave output current, and outputs the slave to-be-modulated signal to the slave PWM modulator; the slave PWM modulator is used for carrying out pulse width modulation on the slave to-be-modulated signal and then outputting a slave modulated signal; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
Correspondingly, the invention further provides an alternating current power supply parallel device.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an ac power combiner device according to a first embodiment of the present invention.
In a first embodiment of the ac power parallel operation apparatus of the present invention, the ac power parallel operation apparatus includes:
a master 10 and a slave 20, wherein,
the master machine 10 is configured to send a current reference value to the slave machine 20 through an FPGA interface and a differential signal data line when detecting that the motors of the multiple ac power supplies are connected in parallel.
It should be noted that, when the motors of the multiple ac power supplies are connected in parallel, that is, the electrodes of the multiple ac power supplies are connected in parallel or are to be connected in parallel, the master may transmit the current reference value to the slave through a Field Programmable Gate Array (FPGA) interface and a differential signal data line, the master is a master motor for performing parallel operation of the ac power supplies, the slave is a slave motor for performing parallel operation of the ac power supplies, the master and the slave both use the FPGA as a controller, and the differential signal data line is used for transmitting the current reference value in a differential signal manner, so that interference can be avoided.
In a specific implementation, the number of bits of the current reference value may be flexibly set, for example, 8 bits, 16 bits, or 24 bits, the current reference value is transmitted through the differential signal data line, the transmission rate is fast, and the transmission of the current reference value can be generally completed within 1 us.
The slave 20 is configured to perform modulation output according to the current reference value.
It should be understood that the slave, after receiving the current reference value, may perform power modulation output according to the current reference value, and generally use the current after modulation as a switch for controlling its own power circuit, the slave may be multiple, and the slave and the frame of the slave may be identical.
According to the scheme, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the current reference value is sent to the slave through the FPGA interface and the differential signal data line; the slave machine carries out modulation output according to the current reference value; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
Further, fig. 7 is a schematic structural diagram of an ac power parallel machine apparatus according to a second embodiment of the present invention, and as shown in fig. 7, a second embodiment of an ac power parallel machine method according to the present invention is proposed based on the first embodiment, in this embodiment, the host 10 further includes a reference voltage generating unit 11 and a voltage control loop 12.
The host 10 is further configured to collect output voltage and output current after parallel connection when detecting that the motors of the multiple ac power supplies are connected in parallel.
It should be noted that the host includes a reference voltage generation unit, a voltage control loop, a host current control loop, and a host PWM modulator, and when the host detects that the motors of a plurality of ac power supplies are connected in parallel, the host can collect the output voltage after parallel connection, that is, the current output voltage of the host after the parallel connection of the whole parallel circuit architecture.
The host 10 is further configured to obtain the reference voltage output by the reference voltage generating unit 11.
The reference voltage generating unit 11 is configured to input the output voltage and the reference voltage to the voltage control loop.
It can be understood that the host may further obtain a reference voltage output by the reference voltage generating unit, that is, a preset reference voltage, where the reference voltage generating unit generally includes a Direct Digital Synthesis (DDS), and the main functions of the reference voltage generating unit include generating a sine wave, and setting parameters such as frequency, amplitude, and offset of the sine wave by a user; any waveform can be edited, the waveform is generated, and the output voltage and the reference voltage can be input into the voltage control loop after the reference voltage is obtained, so that the voltage control loop can conveniently compare the voltage magnitude and prepare for subsequent current output.
And the voltage control loop 12 is configured to calculate and obtain a current reference value, and send the current reference value to the slave machine according to a preset PWM period through the FPGA interface and the differential signal data line.
It should be understood that the reference current is a reference current determined according to a current voltage and a closed-loop condition, the voltage control loop obtains a current reference value through calculation, and then the current reference value can be sent to the slave machine according to a preset PWM period through the FPGA interface and the differential signal data line, where the preset PWM period is a preset Pulse Width Modulation (PWM) Modulation period, that is, a transmission period corresponding to the current reference value, and the PWM adjustment of the master machine and the slave machine may be unipolar, bipolar, or mixed polarity, and the like, which is not limited in this embodiment.
According to the scheme, when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the output voltage after the parallel connection is acquired; the host acquires the reference voltage output by the reference voltage generating unit and inputs the output voltage and the reference voltage to the voltage control loop; the voltage control loop calculates to obtain a current reference value, the current reference value is sent to the slave machine through the FPGA interface and the differential signal data line according to a preset PWM period, the current reference value can be transmitted through digital signals, the transmission speed is high, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, and the hardware implementation is simple and convenient.
Further, fig. 8 is a schematic structural diagram of an ac power parallel operation device according to a third embodiment of the present invention, and as shown in fig. 8, a third embodiment of an ac power parallel operation method according to the present invention is proposed based on the second embodiment, in this embodiment, the host 10 further includes a host current control loop 13 and a host PWM modulator 14; wherein the content of the first and second substances,
the host current control loop 13 is configured to collect a host output current, generate a host signal to be modulated according to the current reference value and the host output current, and send the host signal to be modulated to the host PWM modulator 14.
It should be noted that, a host current control loop of the host may acquire an output current of the host in real time, compare the host output current with a reference current corresponding to the current reference value, and according to a comparison result and a mapping relationship between a preset adjustment signal and different current difference values, determine a corresponding modulation signal, and may generate a signal to be modulated by the host, and further send the signal to be modulated by the host to the host PWM modulator, where a loop control structure of the host current control loop may be a Proportional-Integral-Differential Controller (PID Controller), and the like, which is not limited in this embodiment.
The host PWM modulator 14 is configured to output a host modulated signal after performing pulse width modulation on the host signal to be modulated.
It should be understood that, after obtaining the host signal to be modulated, the host PWM modulator may perform pulse width modulation on the host signal to be modulated according to a preset modulation program, so as to obtain and output a host modulated signal.
According to the scheme, the host output current is collected through the host current control loop, a host signal to be modulated is generated according to the current reference value and the host output current, and the host signal to be modulated is sent to the host PWM modulator; after the host PWM modulator carries out pulse width modulation on the host to-be-modulated signal, the host modulated signal is output, the transmission of the current reference value can be completed in a very short time, the interference of analog signals can be avoided, the hardware implementation is simple and convenient, the parallel operation effect is improved, the parallel operation processing time is saved, and the parallel operation efficiency is improved.
Further, fig. 9 is a schematic structural diagram of a fourth embodiment of an ac power parallel machine apparatus according to the present invention, and as shown in fig. 9, a fourth embodiment of an ac power parallel machine method according to the present invention is proposed based on the first embodiment, in this embodiment, the slave 20 includes a slave current control loop 21 and a slave PWM modulator 22; wherein the content of the first and second substances,
the slave 20 is further configured to collect a slave output current, and input the current reference value and the slave output current to the slave current control loop.
The slave includes a slave current control loop and a slave PWM modulator, and the slave can collect the current slave output current of the slave and input the current reference value and the slave output current to the slave current control loop.
The slave current control loop 21 is configured to generate a slave to-be-modulated signal according to the current reference value and the slave output current, and output the slave to-be-modulated signal to the slave PWM modulator.
It can be understood that the slave current control loop compares the slave output current with the reference current corresponding to the current reference value, and according to the comparison result and the mapping relationship between the preset adjustment signal and different current difference values, the corresponding modulation signal can be determined, a slave to-be-modulated signal can be generated, and the slave to-be-modulated signal is sent to the slave PWM modulator.
The slave PWM modulator 22 is configured to output a slave modulated signal after performing pulse width modulation on the slave to-be-modulated signal.
It should be understood that, after obtaining the slave to-be-modulated signal, the slave PWM modulator may perform pulse width modulation on the slave to-be-modulated signal according to a preset modulation program, so as to obtain and output a slave modulated signal.
In this embodiment, by using the above scheme, the slave acquires the slave output current, and inputs the current reference value and the slave output current to the slave current control loop; the slave current control loop generates a slave to-be-modulated signal according to the current reference value and the slave output current, and outputs the slave to-be-modulated signal to the slave PWM modulator; the slave PWM modulator is used for carrying out pulse width modulation on the slave to-be-modulated signal and then outputting a slave modulated signal; can pass through digital signal transmission current reference value, transmission rate is fast, can just accomplish the transmission of current reference value in the very short time, can avoid analog signal's interference to hardware implementation is simple convenient, has improved parallel operation effect, has saved the time of parallel operation processing, has promoted parallel operation efficiency.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (7)
1. An alternating current power supply parallel operation method is characterized by comprising the following steps:
when detecting that the motors of a plurality of alternating current power supplies are connected in parallel, the host sends the current reference value to the slave through the FPGA interface and the differential signal data line;
the slave machine carries out modulation output according to the current reference value;
the master machine comprises a reference voltage generating unit, a voltage control ring, a master machine current control ring and a master machine PWM modulator, and the slave machine comprises a slave machine current control ring;
when the host detects that the motors of the multiple alternating current power supplies are connected in parallel, the current reference value is sent to the slave through the FPGA interface and the differential signal data line, and the method comprises the following steps:
when the host detects that the motors of a plurality of alternating current power supplies are connected in parallel, acquiring output voltage after parallel connection;
the host acquires the reference voltage output by the reference voltage generating unit and inputs the output voltage and the reference voltage to the voltage control loop;
the voltage control loop calculates to obtain a current reference value, and the current reference value is sent to the slave machine according to a preset PWM period through an FPGA interface and a differential signal data line; the voltage control loop calculates to obtain a current reference value, and sends the current reference value to a slave machine according to a preset PWM cycle through an FPGA interface and a differential signal data line, and the method comprises the following steps:
the voltage control loop calculates and obtains a current reference value;
and the host machine sends the current reference value to the slave machine according to a preset PWM cycle through the FPGA interface and the asynchronous communication line, or the host machine sends the current reference value to the slave machine according to the preset PWM cycle through the FPGA interface, the clock line and the data communication line.
2. The ac power supply parallel operation method according to claim 1, wherein said voltage control loop calculating a current reference value comprises:
and the voltage control loop compares the output voltage value with the reference voltage and obtains a current reference value according to a comparison result and a preset closed-loop control relation.
3. The alternating current power supply parallel operation method according to claim 1, wherein after the master machine sends the current reference value to the slave machine through the FPGA interface and the differential signal data line when detecting that the motors of the multiple alternating current power supplies are connected in parallel, the alternating current power supply parallel operation method further comprises:
the host current control loop acquires host output current, generates a host signal to be modulated according to the current reference value and the host output current, and sends the host signal to be modulated to the host PWM modulator;
and after the host PWM modulator carries out pulse width modulation on the host signal to be modulated, the host PWM modulator outputs a host modulated signal.
4. The alternating current power supply parallel operation method according to claim 1, wherein the slave comprises a slave current control loop and a slave PWM modulator, and the slave performs modulation output according to the current reference value, and comprises the following steps:
the slave machine collects slave machine output current and inputs the current reference value and the slave machine output current into a slave machine current control loop;
the slave current control loop generates a slave to-be-modulated signal according to the current reference value and the slave output current, and outputs the slave to-be-modulated signal to the slave PWM modulator;
and after the slave PWM modulator performs pulse width modulation on the slave to-be-modulated signal, the slave PWM modulator outputs a slave modulated signal.
5. An ac power parallel operation apparatus, comprising: a master and a slave, wherein,
the master machine is used for sending the current reference value to the slave machine through the FPGA interface and the differential signal data line when the motors of a plurality of alternating current power supplies are detected to be connected in parallel;
the slave machine is used for carrying out modulation output according to the current reference value;
the master machine comprises a reference voltage generating unit, a voltage control ring, a master machine current control ring and a master machine PWM modulator, and the slave machine comprises a slave machine current control ring; the host comprises a reference voltage generating unit and a voltage control loop; wherein the content of the first and second substances,
the host is also used for collecting output voltage and output current after parallel connection when the motors of the multiple alternating current power supplies are detected to be connected in parallel;
the host is also used for acquiring the reference voltage output by the reference voltage generating unit;
the reference voltage generating unit is used for inputting the output voltage and the reference voltage to the voltage control loop;
the voltage control loop is used for calculating to obtain a current reference value, and sending the current reference value to the slave machine according to a preset PWM cycle through an FPGA interface and a differential signal data line;
the master machine is further used for sending the current reference value to the slave machine according to a preset PWM cycle through the FPGA interface and the asynchronous communication line, or sending the current reference value to the slave machine according to the preset PWM cycle through the FPGA interface, the clock line and the data communication line.
6. The ac power combiner apparatus of claim 5, wherein the main machine further comprises a main machine current control loop and a main machine PWM modulator; wherein the content of the first and second substances,
the host current control loop is used for acquiring host output current, generating a host signal to be modulated according to the current reference value and the host output current, and sending the host signal to be modulated to the host PWM modulator;
and the host PWM modulator is used for outputting a host modulated signal after the host to-be-modulated signal is subjected to pulse width modulation.
7. The ac power combiner apparatus of claim 5 wherein said slave includes a slave current control loop and a slave PWM modulator; wherein the content of the first and second substances,
the slave is also used for collecting slave output current and inputting the current reference value and the slave output current into the slave current control loop;
the slave current control loop is used for generating a slave to-be-modulated signal according to the current reference value and the slave output current and outputting the slave to-be-modulated signal to the slave PWM modulator;
and the slave PWM modulator is used for outputting a slave modulated signal after the slave to-be-modulated signal is subjected to pulse width modulation.
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| CN100356654C (en) * | 2005-07-08 | 2007-12-19 | 浙江大学 | Automatic master-slave parallel apparatus for inverter |
| JP4847058B2 (en) * | 2005-07-11 | 2011-12-28 | 株式会社ダイヘン | Parallel operation method of inverter device |
| CN102510120B (en) * | 2011-11-23 | 2014-02-26 | 中国科学院电工研究所 | Micro-grid inverter voltage and current double-ring hanging control method based on virtual impedance |
| CN103972909B (en) * | 2014-05-26 | 2017-12-15 | 山东德佑电气股份有限公司 | TSC systems and its RS485 communication means based on FPGA |
| CN104538986B (en) * | 2014-12-31 | 2017-01-18 | 阳光电源股份有限公司 | Parallel inverter control method, host, slave machines and system |
| CN105391089B (en) * | 2015-12-21 | 2018-06-26 | 中国西电电气股份有限公司 | The control method for parallel and circuit of a kind of inverter |
| CN110245103B (en) * | 2019-06-20 | 2020-12-04 | 北京机械设备研究所 | Synchronous signal bus circuit, synchronous system and synchronous method for parallel connection of modules |
| CN111711224B (en) * | 2020-05-20 | 2023-05-26 | 深圳科士达科技股份有限公司 | Synchronous processing method for output voltage and carrier signal when AC power supplies are connected in parallel |
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