CN112087152A

CN112087152A - Multi-interface power adapter circuit

Info

Publication number: CN112087152A
Application number: CN202010954470.7A
Authority: CN
Inventors: 范海峰; 陈桃根
Original assignee: Shenzhen DFS Technology Co ltd
Current assignee: Shenzhen DFS Technology Co ltd
Priority date: 2020-09-11
Filing date: 2020-09-11
Publication date: 2020-12-15
Also published as: WO2022052415A1

Abstract

The embodiment of the invention discloses a multi-interface power adapter circuit, which comprises: one or more power supply circuits connected to an external power supply for converting an external voltage into the charging voltage; a master control circuit connected to the one or more power circuits for providing the charging voltage to an external device; and the decoding circuit is connected with the main control circuit and is used for acquiring whether the external equipment is connected and generating a corresponding prompt signal. According to the multi-interface power adapter circuit provided by the embodiment of the invention, the plurality of external devices are simultaneously connected, and the states of the connected external devices are acquired in real time, so that the problem that the connection state of the power adapter circuit cannot be acquired when the power adapter circuit is simultaneously connected with the plurality of devices in the prior art is solved, and the safety and the stability of simultaneously connecting the plurality of external devices are realized.

Description

Multi-interface power adapter circuit

Technical Field

The embodiment of the invention relates to the technology of adapters, in particular to a multi-interface power adapter circuit.

Background

A power adapter (Poweradapter) is a power supply conversion device for small portable electronic equipment and electronic appliances, generally comprises a shell, a power transformer and a rectification circuit, and can be divided into an alternating current output type and a direct current output type according to the output type; according to the connection mode, the device can be divided into a wall-inserting type and a desktop type. The system is widely matched with equipment such as a telephone master-slave machine, a game machine, a language repeater, a walkman, a notebook computer, a cellular phone and the like, and a user needs to operate according to parameter requirements in the using process to prevent accidents.

Along with the continuous improvement that people required, original on-vehicle charger has been unable to satisfy people's various handheld terminal equipment's use, and cell-phone and the external function of charging of panel computer have been given to present power adapter more, let people's trip comfortable convenient more, and present on-vehicle charger still has very big promotion space now, for example in the aspect of the adapter heat dissipation, in the aspect of the USB adapter commonality, in the aspect of the adapter size, let it under the prerequisite that satisfies the life requirement, more do benefit to the use.

Disclosure of Invention

The invention provides a multi-interface power adapter circuit, which realizes the safety and stability of simultaneously connecting a plurality of external devices.

The embodiment of the invention provides a multi-interface power adapter circuit, which comprises:

one or more power supply circuits connected to an external power supply for converting an external voltage into the charging voltage;

a master control circuit connected to the one or more power circuits for providing the charging voltage to an external device;

and the decoding circuit is connected with the main control circuit and is used for acquiring whether the external equipment is connected and generating a corresponding prompt signal.

Optionally, the one or more power circuits comprise: a terminal CON1, a capacitor C1', a capacitor C3', a capacitor C4', a chip U1', a resistor R1', an inductor L1', a resistor R5', a resistor R2', a resistor R3', a capacitor C3', and a capacitor C3', wherein a first end of the capacitor C3' is connected to the 1 st pin of the terminal CON 3, a second end of the capacitor C3' is connected to ground, a first end of the capacitor C3' is connected to the voltage input terminal VCC _ IN, a second end of the capacitor C3' is connected to the 1 st pin of the chip U3 ', a first end of the resistor R3' is connected to the 2 nd pin of the chip U3 ', a second end of the resistor R3' is connected to the second pin of the chip U367 ', and a first end of the inductor L3 ' is connected to the first end of the resistor L3, a second end of the inductor L1 'is connected to the first end of the resistor R5', a second end of the resistor R5 'is connected to the first end of the resistor R2', a second end of the resistor R2 'is connected to the first end of the resistor R3', a second end of the resistor R3 'is grounded, a first end of the capacitor C5' is connected to the 8 th pin of the chip U1', a second end of the capacitor C5' is grounded, a first end of the capacitor C6 'is connected to the 6 th pin of the chip U1', a second end of the capacitor C6 'is connected to the first end of the resistor R4', a second end of the resistor R4 'is grounded, a first end of the capacitor C7' is connected to the 6 th pin of the chip U1', a second end of the capacitor C7' is grounded, a first end of the capacitor C8 'is connected to the voltage input terminal _ OUT, and a second end of the capacitor C8' is grounded, the first terminal of the capacitor C2' is connected to the voltage input terminal VCC _ OUT, and the second terminal of the capacitor C2 is connected to ground.

Optionally, the main control circuit includes: chip U4, electric capacity C9, resistance R7, resistance R44, resistance R45 and electric capacity C18, electric capacity C9's first end ground, electric capacity C9's second end is connected to resistance R7's first end, resistance R7's second end is connected to voltage input VCC, resistance R45's first end is connected to voltage input VCC, resistance R45's second end is connected to electric capacity C18's first end, electric capacity C18's second end ground, resistance R44's first end is connected to chip U4's 24 th pin, resistance R44's second end is connected to resistance R45's second end.

Optionally, the decoding circuit includes: a chip U1, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a capacitor C4, a crystal Y4, a capacitor C4 and a capacitor C4, wherein a first end of the inductor L4 is connected to a signal input terminal ANT 4, a second end of the inductor L4 is connected to a first end of the capacitor C4, a second end of the capacitor C4 is connected to the second pin 13 of the chip U4, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the first end of the resistor R4, a second end of the resistor R4 is grounded, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a first end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a second end of the capacitor C4 is connected to the second end of the chip U3619, the second terminal of the capacitor C7 is connected to ground.

Optionally, the portable electronic device further comprises an alarm circuit, the alarm circuit is connected to the main control circuit and is configured to generate an alarm signal, and the alarm circuit includes: a capacitor C14, a buzzer SP1, a capacitor C15, a capacitor C16, a resistor R25, a MOS transistor Q3 and an interface J1, wherein a first end of the capacitor C14 is connected to the voltage input terminal VBAT1, a second end of the capacitor C14 is grounded, a first end of the capacitor C15 is connected to the 2 nd pin of the buzzer SP1, a second end of the capacitor C15 is grounded, a first end of the capacitor C16 is connected to the 1 st pin of the buzzer SP1, a second end of the capacitor C16 is grounded, a first end of the resistor R25 is connected to the main control circuit, a second end of the resistor R25 is connected to the drain of the MOS transistor Q3, a gate of the MOS transistor Q3 is grounded, and a base of the MOS transistor Q3 is connected to the 5 th pin of the interface J1.

Optionally, the battery system further includes a battery circuit, the battery circuit is connected to the main control circuit and configured to provide a battery voltage, and the battery circuit includes: battery JP2, resistor R11, chip U3, resistor R13, capacitor C11, resistor R86, MOS transistor Q2, resistor R9, resistor R10, MOS transistor Q1 and resistor R8, a first terminal of the resistor R11 is connected to the battery JP2, a second terminal of the resistor R11 is connected to the 3 rd pin of the chip U3, the first end of the resistor R13 is connected to the 5 th pin of the chip U3, the second end of the resistor R13 is grounded, the first end of the capacitor C11 is connected to the No. 3 pin of the chip U3, the second end of the capacitor C11 is grounded, a first terminal of the resistor R86 is connected to the battery JP2, a second terminal of the resistor R86 is connected to a second terminal of the resistor R10, the first end of the resistor R10 is connected to the first end of the resistor R9, the second end of the resistor R9 is connected to the base stage of the MOS transistor Q1, the gate of the MOS transistor Q1 is grounded, and the drain of the MOS transistor Q1 is connected to the second terminal of the resistor R8.

Optionally, still include voltage stabilizing circuit, voltage stabilizing circuit with master control circuit connects for will stabilize and adjust charging voltage, voltage stabilizing circuit includes: a capacitor C8, a chip U2, a capacitor C10, a resistor R166, a capacitor E1, a switch SW1, a resistor R12, a capacitor C12, a capacitor C13, a resistor R16, a resistor R15, a capacitor E15, a diode D15, a resistor F15, and a resistor F15, wherein a first end of the capacitor C15 is connected to the 2 nd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the capacitor C15 is connected to the 3 rd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the resistor R166 is grounded, a second end of the resistor R166 is connected to the first end of the capacitor E15, a second end of the capacitor E15 is grounded, a first end of the switch SW 15 is connected to the second end of the resistor R166, a second end of the resistor SW 72 is connected to the first end of the capacitor C15, and a second end of the capacitor C15 is grounded, a first end of the capacitor C13 is connected to the second end of the resistor R12, a second end of the capacitor C13 is grounded, a first end of the resistor R16 is connected to the second end of the resistor R12, a second end of the resistor R16 is connected to the first end of the resistor R15, a second end of the resistor R15 is grounded, a first end of the resistor R17 is connected to the second end of the resistor R12, a second end of the resistor R12 is connected to the first end of the capacitor E2, a second end of the capacitor E2 is grounded, a cathode of the diode D4 is connected to the second end of the resistor R12, a cathode of the diode D66 is connected to the second end of the resistor R12, a first end of the resistor F1 is connected to the second end of the resistor R17, and a first end of the resistor F2 is connected to the second end of the resistor R17.

Optionally, the electronic device further includes an LED circuit, the LED circuit is connected to the main control circuit and is configured to display a connection status of the external device, and the LED circuit includes: an LED1, an LED2, an LED3, an LED4, an LED5, an LED6, an LED7, a resistor R7 and a resistor R7, a first end of the LED7 is connected to the one or more power circuits, a second end of the LED7 is connected to a first end of the resistor R7, a second end of the resistor R7 is connected to a voltage input terminal VCC, a first end of the LED7 is connected to the one or more power circuits, a second end of the LED7 is connected to a first end of the resistor R7, a second end of the resistor R7 is connected to the voltage input terminal VCC, a first end of the LED7 is connected to the one or more power circuits, and a second end of the resistor R7 is connected to the second end of the one or more power circuits, a second terminal of the resistor R24 is connected to a voltage input VCC, a first terminal of the LED5 is connected to the one or more power circuits, a second terminal of the LED5 is connected to a first terminal of the resistor R52, a second terminal of the resistor R52 is connected to a voltage input VCC, a first terminal of the LED6 is connected to the one or more power circuits, a second terminal of the LED6 is connected to a first terminal of the resistor R53, a second terminal of the resistor R53 is connected to a voltage input VCC, a first terminal of the LED7 is connected to the one or more power circuits, a second terminal of the LED7 is connected to a first terminal of the resistor R54, a second terminal of the resistor R54 is connected to a voltage input VCC, a first terminal of the LED8 is connected to the one or more power circuits, a second terminal of the LED8 is connected to a first terminal of the resistor R55, and a second terminal of the resistor R55 is connected to a voltage input VCC.

Optionally, the external device is a smart phone.

Optionally, the external power supply is 12V.

Drawings

Fig. 1 is a block diagram of a multi-interface power adapter circuit according to an embodiment of the present invention;

FIG. 2 is a circuit diagram of one or more power circuits according to one embodiment of the present invention;

FIG. 3 is a circuit diagram of a main control circuit according to an embodiment of the present invention;

FIG. 4 is a circuit diagram of a decoding circuit according to an embodiment of the present invention;

fig. 5 is a block diagram of a multi-interface power adapter circuit according to a second embodiment of the present invention;

FIG. 6 is a circuit diagram of an alarm circuit according to a second embodiment of the present invention;

FIG. 7 is a circuit diagram of a battery circuit and a voltage regulator circuit according to a second embodiment of the present invention;

fig. 8 is a circuit diagram of an LED circuit according to a second embodiment of the invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the steps as a sequential process, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps may be rearranged. A process may be terminated when its operations are completed, but may have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc.

Furthermore, the terms "first," "second," and the like may be used herein to describe various orientations, actions, steps, elements, or the like, but the orientations, actions, steps, or elements are not limited by these terms. These terms are only used to distinguish one direction, action, step or element from another direction, action, step or element. For example, the first end may be referred to as the second end, and similarly, the second end may be referred to as the first end, without departing from the scope of the present application. Both the first end and the second end are ends, but they are not the same end. The terms "first", "second", etc. are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

Example one

Fig. 1 is a block connection diagram of a multi-interface power adapter circuit according to an embodiment of the present invention, where the embodiment is suitable for connecting multiple external devices, the multi-interface power adapter circuit according to the embodiment includes: one or more power supply circuits 1, a master control circuit 2 and a decoding circuit 3.

Referring to fig. 2, fig. 2 is a circuit diagram of one or more power circuits 1 in the present embodiment, where the one or more power circuits 1 are connected to an external power source and are configured to convert an external voltage into the charging voltage; in this embodiment, one power supply circuit 1 is taken as an example for explanation, and the one or more power supply circuits 1 include: a terminal CON1, a capacitor C1', a capacitor C3', a capacitor C4', a chip U1', a resistor R1', an inductor L1', a resistor R5', a resistor R2', a resistor R3', a capacitor C3', and a capacitor C3', wherein a first end of the capacitor C3' is connected to the 1 st pin of the terminal CON 3, a second end of the capacitor C3' is connected to ground, a first end of the capacitor C3' is connected to the voltage input terminal VCC _ IN, a second end of the capacitor C3' is connected to the 1 st pin of the chip U3 ', a first end of the resistor R3' is connected to the 2 nd pin of the chip U3 ', a second end of the resistor R3' is connected to the second pin of the chip U367 ', and a first end of the inductor L3 ' is connected to the first end of the resistor L3, a second end of the inductor L1 'is connected to the first end of the resistor R5', a second end of the resistor R5 'is connected to the first end of the resistor R2', a second end of the resistor R2 'is connected to the first end of the resistor R3', a second end of the resistor R3 'is grounded, a first end of the capacitor C5' is connected to the 8 th pin of the chip U1', a second end of the capacitor C5' is grounded, a first end of the capacitor C6 'is connected to the 6 th pin of the chip U1', a second end of the capacitor C6 'is connected to the first end of the resistor R4', a second end of the resistor R4 'is grounded, a first end of the capacitor C7' is connected to the 6 th pin of the chip U1', a second end of the capacitor C7' is grounded, a first end of the capacitor C8 'is connected to the voltage input terminal _ OUT, and a second end of the capacitor C8' is grounded, the first terminal of the capacitor C2' is connected to the voltage input terminal VCC _ OUT, and the second terminal of the capacitor C2 is connected to ground.

In this embodiment, the chip U2 of the power circuit 1 is a power management chip, which is a synchronous rectification buck converter of type TD2778 with a rated current of 2.2A and a rated voltage of 32V, and integrates two 90m Ω MOSFETs to provide a continuous load current of 2.2A in a wide input voltage range of 4.75V to 32V. Current mode control provides fast transient response and cycle-by-cycle current limiting. The adjustable soft start prevents inrush current from dropping to 1 mua in the off mode. In practical application, a plurality of power supply circuits 1 may be set according to actual requirements, and each power supply circuit 1 may be connected to an external device, in this embodiment, the external device is a smart phone. The external power supply is 12V, the charging voltage is 5V, exemplarily, the number of the power supply circuits 1 can be 8, each power supply circuit is independent of the other power supply circuits, the power supply circuits are not interfered, and meanwhile, the power supply circuits can be connected with 8 smart phones for charging.

Fig. 3 is a circuit diagram of the main control circuit 2 in this embodiment, and the main control circuit 2 is connected to the one or more power circuits 1 and is configured to provide the charging voltage to an external device. The master control circuit 2 includes: chip U4, electric capacity C9, resistance R7, resistance R44, resistance R45 and electric capacity C18, electric capacity C9's first end ground, electric capacity C9's second end is connected to resistance R7's first end, resistance R7's second end is connected to voltage input VCC, resistance R45's first end is connected to voltage input VCC, resistance R45's second end is connected to electric capacity C18's first end, electric capacity C18's second end ground, resistance R44's first end is connected to chip U4's 24 th pin, resistance R44's second end is connected to resistance R45's second end.

In this embodiment, the main control circuit 2 is an MCU controller with a Chip model of MSP430G2553, which is also called a Single Chip Microcomputer (Single Chip Microcomputer) or a Single Chip Microcomputer, and is a Chip-level computer formed by appropriately reducing the frequency and specification of a Central Processing Unit (CPU) and integrating peripheral interfaces such as a memory (memory), a counter (Timer), a USB, an a/D conversion, a UART, a PLC, a DMA, and even an LCD driving circuit on a Single Chip, and performing different combination control for different applications. This MCU receives the 5V charging voltage that power supply circuit 1 provided, the female seat of MICRO on the rethread MCU gives corresponding external equipment power supply, can connect a plurality of external equipment simultaneously, exemplarily, in the cell-phone shop, a many interface power adapter circuit that provides through this embodiment, can connect many show cell-phones simultaneously, and charge for many show cell-phones simultaneously, the cell-phone is in electrified state when having guaranteed that customer purchases the cell-phone, and a plurality of equipment of adapter connection have saved the space.

Fig. 4 is a circuit diagram of the decoding circuit 3 in this embodiment, where the decoding circuit 3 is connected to the main control circuit 2 and is configured to obtain whether the external device is connected to generate a corresponding prompt signal. The decoding circuit 3 includes: a chip U1, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a capacitor C4, a crystal Y4, a capacitor C4 and a capacitor C4, wherein a first end of the inductor L4 is connected to a signal input terminal ANT 4, a second end of the inductor L4 is connected to a first end of the capacitor C4, a second end of the capacitor C4 is connected to the second pin 13 of the chip U4, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the first end of the resistor R4, a second end of the resistor R4 is grounded, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a first end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a second end of the capacitor C4 is connected to the second end of the chip U3619, the second terminal of the capacitor C7 is connected to ground.

In this embodiment, the decoding circuit 3 is configured to detect a state of a connected external device, and when detecting that the connected device is in a disconnected state, generate a prompt signal to remind the MCU of a change in connection state. Illustratively, when a plurality of display mobile phones are connected simultaneously in a mobile phone store, if one of the display mobile phones is disconnected suddenly, the decoding circuit 3 will generate a prompt signal to the MCU, and the MCU controls other LEDs or the buzzer to prompt the worker that an abnormal condition occurs, thereby avoiding the situation that the display mobile phone is lost.

Example two

Fig. 5 is a block connection diagram of a multi-interface power adapter circuit according to a second embodiment of the present invention, where this embodiment is suitable for a case where multiple external devices are connected, and in this embodiment, other functional circuits are added on the basis of the first embodiment, and the multi-interface power adapter circuit according to this embodiment includes: the LED lamp comprises one or more power circuits 1, a main control circuit 2, a decoding circuit 3, an alarm circuit 4, a battery circuit 5, a voltage stabilizing circuit 6 and an LED circuit 7.

A circuit diagram of one or more power supply circuits 1, the one or more power supply circuits 1 being connected to an external power supply for converting an external voltage into the charging voltage; in this embodiment, one power supply circuit 1 is taken as an example for explanation, and the one or more power supply circuits 1 include: a terminal CON1, a capacitor C1', a capacitor C3', a capacitor C4', a chip U1', a resistor R1', an inductor L1', a resistor R5', a resistor R2', a resistor R3', a capacitor C3', and a capacitor C3', wherein a first end of the capacitor C3' is connected to the 1 st pin of the terminal CON 3, a second end of the capacitor C3' is connected to ground, a first end of the capacitor C3' is connected to the voltage input terminal VCC _ IN, a second end of the capacitor C3' is connected to the 1 st pin of the chip U3 ', a first end of the resistor R3' is connected to the 2 nd pin of the chip U3 ', a second end of the resistor R3' is connected to the second pin of the chip U367 ', and a first end of the inductor L3 ' is connected to the first end of the resistor L3, a second end of the inductor L1 'is connected to the first end of the resistor R5', a second end of the resistor R5 'is connected to the first end of the resistor R2', a second end of the resistor R2 'is connected to the first end of the resistor R3', a second end of the resistor R3 'is grounded, a first end of the capacitor C5' is connected to the 8 th pin of the chip U1', a second end of the capacitor C5' is grounded, a first end of the capacitor C6 'is connected to the 6 th pin of the chip U1', a second end of the capacitor C6 'is connected to the first end of the resistor R4', a second end of the resistor R4 'is grounded, a first end of the capacitor C7' is connected to the 6 th pin of the chip U1', a second end of the capacitor C7' is grounded, a first end of the capacitor C8 'is connected to the voltage input terminal _ OUT, and a second end of the capacitor C8' is grounded, the first terminal of the capacitor C2' is connected to the voltage input terminal VCC _ OUT, and the second terminal of the capacitor C2 is connected to ground.

The main control circuit 2 is connected to the one or more power supply circuits 1, and is configured to provide the charging voltage to an external device. The master control circuit 2 includes: chip U4, electric capacity C9, resistance R7, resistance R44, resistance R45 and electric capacity C18, electric capacity C9's first end ground, electric capacity C9's second end is connected to resistance R7's first end, resistance R7's second end is connected to voltage input VCC, resistance R45's first end is connected to voltage input VCC, resistance R45's second end is connected to electric capacity C18's first end, electric capacity C18's second end ground, resistance R44's first end is connected to chip U4's 24 th pin, resistance R44's second end is connected to resistance R45's second end.

The decoding circuit 3 is connected with the main control circuit 2 and is used for acquiring whether the external equipment is connected or not and generating a corresponding prompt signal. The decoding circuit 3 includes: a chip U1, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a capacitor C4, a crystal Y4, a capacitor C4 and a capacitor C4, wherein a first end of the inductor L4 is connected to a signal input terminal ANT 4, a second end of the inductor L4 is connected to a first end of the capacitor C4, a second end of the capacitor C4 is connected to the second pin 13 of the chip U4, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the first end of the resistor R4, a second end of the resistor R4 is grounded, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a first end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a second end of the capacitor C4 is connected to the second end of the chip U3619, the second terminal of the capacitor C7 is connected to ground.

Referring to fig. 6, fig. 6 is a circuit diagram of the alarm circuit 4 in this embodiment, the alarm circuit 4 is connected to the main control circuit 2 and is configured to generate an alarm signal, and the alarm circuit 4 includes: a capacitor C14, a buzzer SP1, a capacitor C15, a capacitor C16, a resistor R25, a MOS transistor Q3 and an interface J1, wherein a first end of the capacitor C14 is connected to the voltage input terminal VBAT1, a second end of the capacitor C14 is grounded, a first end of the capacitor C15 is connected to the 2 nd pin of the buzzer SP1, a second end of the capacitor C15 is grounded, a first end of the capacitor C16 is connected to the 1 st pin of the buzzer SP1, a second end of the capacitor C16 is grounded, a first end of the resistor R25 is connected to the main control circuit 2, a second end of the resistor R25 is connected to the drain of the MOS transistor Q3, a gate of the MOS transistor Q3 is grounded, and a base of the MOS transistor Q3 is connected to the 5 th pin of the interface J1.

In this embodiment, the function of the alarm circuit 4 is mainly executed by the buzzer SP1, the alarm circuit 4 is connected to the main control circuit 2, and when the main control circuit 2 receives the prompt signal generated by the decoding circuit 3, the main control circuit 2 controls the buzzer in the alarm circuit 4 to alarm and remind a worker.

Referring to fig. 7, fig. 7 is a circuit diagram of a battery circuit 5 and a voltage stabilizing circuit 6 in this embodiment, where the battery circuit 5 is connected to the main control circuit 2 for providing a battery voltage, and the battery circuit 5 includes: battery JP2, resistor R11, chip U3, resistor R13, capacitor C11, resistor R86, MOS transistor Q2, resistor R9, resistor R10, MOS transistor Q1 and resistor R8, a first terminal of the resistor R11 is connected to the battery JP2, a second terminal of the resistor R11 is connected to the 3 rd pin of the chip U3, the first end of the resistor R13 is connected to the 5 th pin of the chip U3, the second end of the resistor R13 is grounded, the first end of the capacitor C11 is connected to the No. 3 pin of the chip U3, the second end of the capacitor C11 is grounded, a first terminal of the resistor R86 is connected to the battery JP2, a second terminal of the resistor R86 is connected to a second terminal of the resistor R10, the first end of the resistor R10 is connected to the first end of the resistor R9, the second end of the resistor R9 is connected to the base stage of the MOS transistor Q1, the gate of the MOS transistor Q1 is grounded, and the drain of the MOS transistor Q1 is connected to the second terminal of the resistor R8.

The voltage stabilizing circuit 6 is connected with the main control circuit 2 and used for stabilizing and adjusting the charging voltage, and the voltage stabilizing circuit 6 comprises: a capacitor C8, a chip U2, a capacitor C10, a resistor R166, a capacitor E1, a switch SW1, a resistor R12, a capacitor C12, a capacitor C13, a resistor R16, a resistor R15, a capacitor E15, a diode D15, a resistor F15, and a resistor F15, wherein a first end of the capacitor C15 is connected to the 2 nd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the capacitor C15 is connected to the 3 rd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the resistor R166 is grounded, a second end of the resistor R166 is connected to the first end of the capacitor E15, a second end of the capacitor E15 is grounded, a first end of the switch SW 15 is connected to the second end of the resistor R166, a second end of the resistor SW 72 is connected to the first end of the capacitor C15, and a second end of the capacitor C15 is grounded, a first end of the capacitor C13 is connected to the second end of the resistor R12, a second end of the capacitor C13 is grounded, a first end of the resistor R16 is connected to the second end of the resistor R12, a second end of the resistor R16 is connected to the first end of the resistor R15, a second end of the resistor R15 is grounded, a first end of the resistor R17 is connected to the second end of the resistor R12, a second end of the resistor R12 is connected to the first end of the capacitor E2, a second end of the capacitor E2 is grounded, a cathode of the diode D4 is connected to the second end of the resistor R12, a cathode of the diode D66 is connected to the second end of the resistor R12, a first end of the resistor F1 is connected to the second end of the resistor R17, and a first end of the resistor F2 is connected to the second end of the resistor R17.

In this embodiment, the battery circuit 5 is connected to an external battery for supplying the voltage of the external battery to the main control circuit 2, typically a battery voltage of 12V. The voltage stabilizing circuit 6 is used for reducing the voltage in the main control circuit 2 to about 5V and providing the voltage to the power supply module to be provided to the external equipment for charging, and the stability and the safety of a circuit system are maintained by adjusting the circuit voltage through the voltage stabilizing circuit 6.

Referring to fig. 8, fig. 8 is a circuit diagram of the LED circuit 7 in this embodiment, the LED circuit 7 is connected to the main control circuit 2 and is configured to display a connection condition of the external device, and the LED circuit 7 includes: an LED1, an LED2, an LED3, an LED4, an LED5, an LED6, an LED7, an LED8, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R52, a resistor R53, a resistor R54 and a resistor R55, a first end of the LED1 is connected to the one or more power supply circuits 1, a second end of the LED1 is connected to a first end of the resistor R21, a second end of the resistor R21 is connected to a voltage input terminal VCC, a first end of the LED2 is connected to the one or more power supply circuits 1, a second end of the LED2 is connected to a first end of the resistor R22, a second end of the resistor R22 is connected to a voltage input terminal VCC, a first end of the LED3 is connected to the one or more power supply circuits 1, a second end of the LED3 is connected to a first end of the resistor R23, a second end of the resistor R23 is connected to the voltage input terminal VCC, a first end of the LED4 is connected to the one or more power, a second terminal of the LED4 is connected to the first terminal of the resistor R24, a second terminal of the resistor R24 is connected to the voltage input terminal VCC, a first terminal of the LED5 is connected to the one or more power circuits 1, a second terminal of the LED5 is connected to the first terminal of the resistor R52, a second terminal of the resistor R52 is connected to the voltage input terminal VCC, a first terminal of the LED6 is connected to the one or more power circuits 1, a second terminal of the LED6 is connected to the first terminal of the resistor R53, a second terminal of the resistor R53 is connected to the voltage input terminal VCC, a first terminal of the LED7 is connected to the one or more power circuits 1, a second terminal of the LED7 is connected to the first terminal of the resistor R54, a second terminal of the resistor R54 is connected to the voltage input terminal VCC, a first terminal of the LED8 is connected to the one or more power circuits 1, and a second terminal of the LED8 is connected to the first terminal of the resistor R55, the second terminal of the resistor R55 is connected to the voltage input terminal VCC.

In this embodiment, taking 8 power modules as an example, each LED is connected to a different power module to correspondingly display the charging condition of each power module connected to an external mobile phone, and when the power module is connected to the mobile phone, the LED is in an off state, and when the power module is not connected to the mobile phone, the LED is in a light-on state, which may prompt a worker that the connected mobile phone is disconnected.

The embodiment of the invention discloses a multi-interface power adapter circuit, which comprises: one or more power supply circuits connected to an external power supply for converting an external voltage into the charging voltage; a master control circuit connected to the one or more power circuits for providing the charging voltage to an external device; the decoding circuit is connected with the main control circuit and is used for acquiring whether the external equipment is connected or not and generating a corresponding prompt signal; according to the multi-interface power adapter circuit provided by the embodiment of the invention, the plurality of external devices are simultaneously connected, and the states of the connected external devices are acquired in real time, so that the problem that the connection state of the power adapter circuit cannot be acquired when the power adapter circuit is simultaneously connected with the plurality of devices in the prior art is solved, and the safety and the stability of simultaneously connecting the plurality of external devices are realized.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A multi-interface power adapter circuit, comprising:

2. The multi-interface power adapter circuit of claim 1, wherein said one or more power circuits comprise: a terminal CON1, a capacitor C1', a capacitor C3', a capacitor C4', a chip U1', a resistor R1', an inductor L1', a resistor R5', a resistor R2', a resistor R3', a capacitor C3', and a capacitor C3', wherein a first end of the capacitor C3' is connected to the 1 st pin of the terminal CON 3, a second end of the capacitor C3' is connected to ground, a first end of the capacitor C3' is connected to the voltage input terminal VCC _ IN, a second end of the capacitor C3' is connected to the 1 st pin of the chip U3 ', a first end of the resistor R3' is connected to the 2 nd pin of the chip U3 ', a second end of the resistor R3' is connected to the second pin of the chip U367 ', and a first end of the inductor L3 ' is connected to the first end of the resistor L3, a second end of the inductor L1 'is connected to the first end of the resistor R5', a second end of the resistor R5 'is connected to the first end of the resistor R2', a second end of the resistor R2 'is connected to the first end of the resistor R3', a second end of the resistor R3 'is grounded, a first end of the capacitor C5' is connected to the 8 th pin of the chip U1', a second end of the capacitor C5' is grounded, a first end of the capacitor C6 'is connected to the 6 th pin of the chip U1', a second end of the capacitor C6 'is connected to the first end of the resistor R4', a second end of the resistor R4 'is grounded, a first end of the capacitor C7' is connected to the 6 th pin of the chip U1', a second end of the capacitor C7' is grounded, a first end of the capacitor C8 'is connected to the voltage input terminal _ OUT, and a second end of the capacitor C8' is grounded, the first terminal of the capacitor C2' is connected to the voltage input terminal VCC _ OUT, and the second terminal of the capacitor C2 is connected to ground.

3. The multi-interface power adapter circuit of claim 1, wherein said master control circuit comprises: chip U4, electric capacity C9, resistance R7, resistance R44, resistance R45 and electric capacity C18, electric capacity C9's first end ground, electric capacity C9's second end is connected to resistance R7's first end, resistance R7's second end is connected to voltage input VCC, resistance R45's first end is connected to voltage input VCC, resistance R45's second end is connected to electric capacity C18's first end, electric capacity C18's second end ground, resistance R44's first end is connected to chip U4's 24 th pin, resistance R44's second end is connected to resistance R45's second end.

4. The multi-interface power adapter circuit of claim 1, wherein said decoding circuit comprises: a chip U1, an inductor L1, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a capacitor C4, a crystal Y4, a capacitor C4 and a capacitor C4, wherein a first end of the inductor L4 is connected to a signal input terminal ANT 4, a second end of the inductor L4 is connected to a first end of the capacitor C4, a second end of the capacitor C4 is connected to the second pin 13 of the chip U4, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the first end of the resistor R4, a second end of the resistor R4 is grounded, a first end of the capacitor C4 is grounded, a second end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a first end of the capacitor C4 is connected to the second end of the crystal Y4, a first end of the capacitor C4 is connected to the ground, a second end of the capacitor C4 is connected to the second end of the chip U3619, the second terminal of the capacitor C7 is connected to ground.

5. The multi-interface power adapter circuit of claim 1, further comprising an alarm circuit, connected to said master control circuit, for generating an alarm signal, said alarm circuit comprising: a capacitor C14, a buzzer SP1, a capacitor C15, a capacitor C16, a resistor R25, a MOS transistor Q3 and an interface J1, wherein a first end of the capacitor C14 is connected to the voltage input terminal VBAT1, a second end of the capacitor C14 is grounded, a first end of the capacitor C15 is connected to the 2 nd pin of the buzzer SP1, a second end of the capacitor C15 is grounded, a first end of the capacitor C16 is connected to the 1 st pin of the buzzer SP1, a second end of the capacitor C16 is grounded, a first end of the resistor R25 is connected to the main control circuit, a second end of the resistor R25 is connected to the drain of the MOS transistor Q3, a gate of the MOS transistor Q3 is grounded, and a base of the MOS transistor Q3 is connected to the 5 th pin of the interface J1.

6. The multi-interface power adapter circuit of claim 1, further comprising a battery circuit, said battery circuit connected to said master control circuit for providing a battery voltage, said battery circuit comprising: battery JP2, resistor R11, chip U3, resistor R13, capacitor C11, resistor R86, MOS transistor Q2, resistor R9, resistor R10, MOS transistor Q1 and resistor R8, a first terminal of the resistor R11 is connected to the battery JP2, a second terminal of the resistor R11 is connected to the 3 rd pin of the chip U3, the first end of the resistor R13 is connected to the 5 th pin of the chip U3, the second end of the resistor R13 is grounded, the first end of the capacitor C11 is connected to the No. 3 pin of the chip U3, the second end of the capacitor C11 is grounded, a first terminal of the resistor R86 is connected to the battery JP2, a second terminal of the resistor R86 is connected to a second terminal of the resistor R10, the first end of the resistor R10 is connected to the first end of the resistor R9, the second end of the resistor R9 is connected to the base stage of the MOS transistor Q1, the gate of the MOS transistor Q1 is grounded, and the drain of the MOS transistor Q1 is connected to the second terminal of the resistor R8.

7. The multi-interface power adapter circuit of claim 1, further comprising a voltage regulator circuit, said voltage regulator circuit connected to said master control circuit for stabilizing and regulating said charging voltage, said voltage regulator circuit comprising: a capacitor C8, a chip U2, a capacitor C10, a resistor R166, a capacitor E1, a switch SW1, a resistor R12, a capacitor C12, a capacitor C13, a resistor R16, a resistor R15, a capacitor E15, a diode D15, a resistor F15, and a resistor F15, wherein a first end of the capacitor C15 is connected to the 2 nd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the capacitor C15 is connected to the 3 rd pin of the chip U15, a second end of the capacitor C15 is grounded, a first end of the resistor R166 is grounded, a second end of the resistor R166 is connected to the first end of the capacitor E15, a second end of the capacitor E15 is grounded, a first end of the switch SW 15 is connected to the second end of the resistor R166, a second end of the resistor SW 72 is connected to the first end of the capacitor C15, and a second end of the capacitor C15 is grounded, a first end of the capacitor C13 is connected to the second end of the resistor R12, a second end of the capacitor C13 is grounded, a first end of the resistor R16 is connected to the second end of the resistor R12, a second end of the resistor R16 is connected to the first end of the resistor R15, a second end of the resistor R15 is grounded, a first end of the resistor R17 is connected to the second end of the resistor R12, a second end of the resistor R12 is connected to the first end of the capacitor E2, a second end of the capacitor E2 is grounded, a cathode of the diode D4 is connected to the second end of the resistor R12, a cathode of the diode D66 is connected to the second end of the resistor R12, a first end of the resistor F1 is connected to the second end of the resistor R17, and a first end of the resistor F2 is connected to the second end of the resistor R17.

8. The multi-interface power adapter circuit of claim 1, further comprising an LED circuit, connected to the master control circuit, for displaying the connection status of the external device, the LED circuit comprising: an LED1, an LED2, an LED3, an LED4, an LED5, an LED6, an LED7, a resistor R7 and a resistor R7, a first end of the LED7 is connected to the one or more power circuits, a second end of the LED7 is connected to a first end of the resistor R7, a second end of the resistor R7 is connected to a voltage input terminal VCC, a first end of the LED7 is connected to the one or more power circuits, a second end of the LED7 is connected to a first end of the resistor R7, a second end of the resistor R7 is connected to the voltage input terminal VCC, a first end of the LED7 is connected to the one or more power circuits, and a second end of the resistor R7 is connected to the second end of the one or more power circuits, a second terminal of the resistor R24 is connected to a voltage input VCC, a first terminal of the LED5 is connected to the one or more power circuits, a second terminal of the LED5 is connected to a first terminal of the resistor R52, a second terminal of the resistor R52 is connected to a voltage input VCC, a first terminal of the LED6 is connected to the one or more power circuits, a second terminal of the LED6 is connected to a first terminal of the resistor R53, a second terminal of the resistor R53 is connected to a voltage input VCC, a first terminal of the LED7 is connected to the one or more power circuits, a second terminal of the LED7 is connected to a first terminal of the resistor R54, a second terminal of the resistor R54 is connected to a voltage input VCC, a first terminal of the LED8 is connected to the one or more power circuits, a second terminal of the LED8 is connected to a first terminal of the resistor R55, and a second terminal of the resistor R55 is connected to a voltage input VCC.

9. The multi-interface power adapter circuit of claim 1, wherein the external device is a smartphone.

10. The multi-interface power adapter circuit of claim 1, wherein said external power supply is 12V.