CN112086125A - SSD test platform and test method - Google Patents
SSD test platform and test method Download PDFInfo
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Abstract
The application provides an SSD test platform and a test method, which are applied to the technical field of solid state disk test, wherein the platform consists of a PC end, a processing circuit and a test circuit; the PC end outputs test data to the processing circuit, the test data are processed by the processing circuit to generate test instructions and output the test instructions to the test circuit, the test circuit tests the SSD according to the test instructions and feeds back test results to the processing circuit, and finally the PC end obtains the test results of the SSD; a single master control is designed to control a plurality of test modules to carry out testing and data transmission, so that the test circuit is efficiently simplified, and the resource utilization rate is greatly improved.
Description
Technical Field
The present invention relates to the field of solid state disk testing technologies, and in particular, to a SSD testing platform and a testing method.
Background
A Solid State Disk (SSD), which is a computer storage device mainly using a Flash memory (NAND Flash) as a permanent memory. The solid state disk consists of a control unit and a storage unit (a FLASH chip and a DRAM chip), and is widely applied to the fields of industrial control, video monitoring, network terminals, navigation equipment and the like; in order to meet the requirements in the process of testing and developing the SSD, a platform for verifying the SSD needs to be realized so as to achieve the purpose of testing the SSD;
in the existing test platform and method for the SSD, an external power supply is used for a voltage transformation circuit, then the voltage transformation circuit is designed to supply 3.3V electricity to a main control chip of the test platform, and 4.5V and 5.5V electricity are designed for the test circuit of the SSD, so as to test the SSD;
however, the existing power supply mode of the test platform has the following disadvantages:
(1) the power supply mode is single, and the test range is insufficient;
(2) the voltage, the current and the power value of the electric signal supplied to the SSD are single, and the comparison operation cannot be carried out, so that the influence of different electric signals on the SSD cannot be determined;
(3) the test board generated by adopting the multi-transformer chip is too large under the condition of requiring various electric signals to test the SSD, the resource utilization rate is too low, and the cost is too high;
(4) the testing efficiency is low because the testing of a plurality of SSDs cannot be performed.
In view of the above problems, the present application provides an SSD test platform and a test method.
Disclosure of Invention
The application provides an SSD test platform and a test method, the output power supply of a power supply conversion circuit is adjustable, and can be automatically switched in a master control mode, so that the aim of testing various power supply signals is fulfilled, and the problem of single power supply and electric signal switching method of a test module is solved; and a single master control is designed to control 14 test modules for testing and data transmission, so that the test circuit is high in efficiency and simplified, and the resource utilization rate is greatly improved.
The application adopts the following technical means for solving the technical problems:
the SSD test platform consists of a PC end, a processing circuit and a test circuit; the PC end outputs test data to the processing circuit, the test data are processed by the processing circuit to generate test instructions and output the test instructions to the test circuit, the test circuit tests the SSD according to the test instructions and feeds back test results to the processing circuit, and finally the PC end obtains the test results of the SSD;
the processing circuit comprises a main control circuit, a power supply circuit, a first voltage conversion circuit, a second voltage conversion circuit and a data transmission circuit; the test circuit comprises a plurality of test modules for testing the SSD, and each test module comprises an analog-to-digital conversion circuit, an electric signal amplification circuit, an SSD socket circuit and a voltage transformation and voltage switching circuit;
the power supply circuit outputs 12V electricity to the first voltage conversion circuit and the voltage transformation and switching circuit respectively, and comprises a first branch and a second branch as follows:
the first branch-the first voltage conversion circuit carries out voltage conversion on 12V electricity to generate 6V electricity which is respectively output to the analog-digital conversion circuit, the data transmission circuit and the second voltage conversion circuit, the second voltage conversion circuit converts the 6V electricity into 3.3V electricity and outputs the electricity to the main control circuit, and the data transmission circuit establishes a data interaction channel between the main control circuit and the PC end through the 6V electricity;
the second branch, the voltage transformation and voltage switching circuit, according to 12V electricity, can perform various voltage transformation switching adjustments to output electrical signals of different voltages, currents and power values to the electrical signal amplification circuit and the SSD socket circuit, the SSD socket circuit tests the SSD through the electrical signals, the electrical signal amplification circuit amplifies the electrical signals and outputs the amplified electrical signals to the analog-to-digital conversion circuit, and the main control circuit obtains the electrical signals in the analog-to-digital conversion circuit to perform analog-to-digital conversion to calculate the values of the currents, the voltages and the powers supplied for the SSD test.
Further, the transformation and voltage switching circuit comprises a processing chip U1, a 2 nd pin and a 7 th pin of the processing chip U1 are connected with a power circuit to access 12V power, wherein the 2 nd pin is a voltage input pin, and the 7 th pin is connected with an enable switch S1 in series and is a chip enable pin;
the 5 th pin of the processing chip U1 is connected in series with a plurality of resistors and a transformation switch group SW1, and each group of switches of the transformation switch group SW1 is also connected in series with the corresponding resistor;
and the 3 rd pin of the processing chip U1 outputs an electric signal to an electric signal amplifying circuit and an SSD socket circuit.
Further, the electric signal amplifying circuit comprises a processing chip U4, and the voltage transforming and switching circuit outputs an electric signal to the 10 th pin of the processing chip U4 for supplying power to the processing chip U4;
the 16 th pin of the processing chip U4 receives the electric signal output by the voltage transformation and voltage switching circuit, and the voltage signal carrying the current information by the 9 th pin is amplified by the processing chip U4 and then sent to the analog-to-digital conversion circuit.
Further, the analog-to-digital conversion circuit comprises a processing chip U7, the 8 th pin of the processing chip U7 receives 6V power input by the first voltage conversion circuit for power supply, and the 1 st pin, the 5 th pin, the 6 th pin and the 7 th pin of the processing chip U7 are all connected with the main control circuit.
Furthermore, the SSD socket circuit, the electric signal amplifying circuit, the analog-to-digital conversion circuit and the voltage transformation and voltage switching circuit can be the same in number and are provided with a plurality of circuits, and the SSD socket circuit, the electric signal amplifying circuit, the analog-to-digital conversion circuit and the voltage transformation and voltage switching circuit are used for testing a plurality of corresponding SSDs.
Further, the first voltage conversion circuit comprises a processing chip U3, and a 2 nd pin and a 7 th pin of the processing chip U3 are connected with a power circuit to access 12V power, wherein the 2 nd pin is a voltage input pin, and the 7 th pin is connected with an enable switch S3 in series and is a chip enable pin;
the 5 th pin of the processing chip U3 is connected in series with resistors R9 and R20, and the 3 rd pin of the processing chip outputs 6V electricity to a data transmission circuit, a second voltage conversion circuit and an analog-to-digital conversion circuit.
Furthermore, the processing circuit further comprises a burning and monitoring circuit, and the burning and monitoring circuit is respectively connected with the PC end and the main control circuit.
Furthermore, the processing circuit further comprises a reset circuit, and the reset circuit is connected with the main control circuit.
The testing method for the SSD testing platform, which is provided by the application, is executed according to the SSD testing platform, and comprises the following steps:
s1, the power supply circuit outputs 12V electricity to the first voltage conversion circuit and the voltage transformation and voltage switching circuit respectively;
s2, the first voltage conversion circuit converts the 12V electricity into 6V electricity, and outputs the 6V electricity to the analog-to-digital conversion circuit, the second voltage conversion circuit and the data transmission circuit respectively, so as to supply power to the analog-to-digital conversion circuit and the data transmission circuit;
s3, the second voltage conversion circuit converts the 6V electricity into 3.3V electricity and outputs the electricity to the main control circuit so as to supply power to the main control circuit;
s4, the main control circuit collects the electric signal data in the analog-to-digital conversion circuit, generates a test result reflecting the SSD test condition according to the electric signal data, and feeds the test result back to the PC end through the data transmission circuit;
wherein,
before the step S4 of the master control circuit acquiring the electrical signal data in the analog-to-digital conversion circuit, the method includes:
s100, the power supply circuit outputs 12V power to the transformation and voltage switching circuit;
s200, the voltage transformation and switching circuit outputs first electric signals with different voltages, currents and power values to the electric signal amplification circuit and the SSD socket circuit according to the 12V electricity, and the SSD socket circuit tests the SSD according to the first electric signals;
s300, the electric signal amplifying circuit performs signal amplification processing on the first electric signal to generate a second electric signal, and outputs the first electric signal and the second electric signal to the analog-to-digital conversion circuit;
s400, the analog-to-digital conversion circuit performs analog-to-digital conversion on the first electrical signal and the second electrical signal to form electrical signal data, and then performs the step S4.
Further, according to the SSD testing platform described above, the step of the transforming and voltage switching circuit outputting the first electrical signals with different voltages, currents, and power values to the electrical signal amplifying circuit and the SSD socket circuit according to the 12V electricity includes:
the method comprises the following steps of generating first electric signals with different voltage, current and power values by adopting a preset switch bank voltage transformation method, wherein the switch bank voltage transformation method comprises the following steps:
in the first method, all switches of the voltage transformation switch group SW1 are turned off, and the signal received by the 5 th pin of the processing chip U1 is determined by R4 and R22, and the output voltage is 4.888V and is supplied to the SSD test;
in the second method, only switch 2 of the transforming switch group SW1 is closed, and the signal received by the 5 th pin of the processing chip U1 is determined by R4, R22 and R11, and the output voltage is 4.5V and is supplied to the SSD test;
in the third method, the voltage transformation switch group SW1 only closes the switch 4, and the signal received by the 5 th pin of the processing chip U1 is only determined by R4, R22 and R24, and then the output voltage is 5.5V and is supplied to the SSD test;
the method four comprises the following steps: and the switch 4 and the switch 2 of the transformation switch group SW1 are closed, the signals received by the transformation switch group of the processing chip U1 are only determined by R4, R22, R11 and R24, and the output voltage is 5V and is supplied to the SSD test.
The method five comprises the following steps: the voltage transformation switch group only closes the switch 3 of the SW1, and the main control circuit controls whether the MOS tube Q1 is conducted to achieve the purpose of controlling whether the R25 resistor is used, so that the main control circuit controls whether the MOS tube Q4, the R12 and the R22 are combined to generate 4.5V voltage or generate 5V test voltage by using R4, R11, R22 and R25 by closing the switch 3 of the voltage transformation switch group SW1, and then the voltage of 4.5V and 5.5V is rapidly switched back and forth in the test process.
The application provides an SSD test platform and a test method, which have the following beneficial effects:
1. the unique flexible switching power supply method is combined with the test platform contained in the invention, and then five flexibly switchable power supply modes can be carried out to carry out SSD power supply test;
2. the test module can collect the voltage, current and power values of the different electric signals supplied to the SSD in the invention, and further can analyze the influence of the different electric signals on the SSD by comparing the test results displayed during the SSD test;
3. the invention provides a unique, simple and reasonable way for providing electric signals, adopts different combinations of a voltage transformation chip, a switch and a resistor, and further provides 5 kinds of electric signal output, thereby solving the dilemma that one voltage transformation chip only generates one kind of electric signal;
4. the special SSD power supply mode solves the problems of overlarge test board, overlow resource utilization rate and overhigh cost caused by adopting a multi-transformer chip under the condition of requiring various electric signals to test the SSD;
5. the invention adopts a unique voltage transformation technology, namely the configuration of 14 test modules, so that one SSD test platform can test 14 SSD boards at one time, and can provide stable energy supply without insufficient power supply, thereby greatly improving the test efficiency and the test cost.
6. According to the invention, the independent fuses are added in each test module and each voltage transformation module, so that the phenomenon that other modules are burnt down in case of short circuit can be avoided, and the safety of the test platform is greatly improved.
Drawings
FIG. 1 is a block diagram illustrating the structure of an embodiment of an SSD test platform of the present application;
FIG. 2 is a schematic diagram of a voltage transformation and switching circuit according to an embodiment of the present application SSD test platform;
FIG. 3 is a schematic diagram of an electrical signal amplification circuit according to an embodiment of the present application SSD test platform;
FIG. 4 is a schematic diagram of an analog-to-digital conversion circuit according to an embodiment of the present application SSD test platform;
FIG. 5 is a schematic diagram of a power circuit according to an embodiment of the present application SSD test platform;
FIG. 6 is a schematic diagram of a first voltage conversion circuit according to an embodiment of the present application SSD test platform;
FIG. 7 is a schematic diagram of a second voltage conversion circuit according to an embodiment of the present application SSD test platform;
FIG. 8 is a schematic diagram of a host circuit according to an embodiment of the present application SSD test platform;
FIG. 9 is a schematic flowchart of an embodiment of a testing method for an SSD testing platform according to the present application;
fig. 10 is a flowchart illustrating an embodiment of a testing method of the SSD testing platform according to the present application.
The implementation, functional features and advantages of the present application will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It is noted that the terms "comprises," "comprising," and "having" and any variations thereof in the description and claims of this application and the drawings described above are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. In the claims, the description and the drawings of the specification of the present application, relational terms such as "first" and "second", and the like, may be used solely to distinguish one entity/action/object from another entity/action/object without necessarily requiring or implying any actual such relationship or order between such entities/actions/objects.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1-8, shown are block diagrams of SSD test platforms in an embodiment of the present application;
an SSD test platform consists of a PC terminal 1, a processing circuit 2 and a test circuit 3; the PC end 1 outputs test data to the processing circuit 2, the test data are processed by the processing circuit 2 to generate test instructions and output the test instructions to the test circuit 3, the test circuit 3 tests a plurality of SSDs according to the test instructions and feeds back test results to the processing circuit 2, and finally the test results of the plurality of SSDs are obtained by the PC end 1;
the processing circuit 2 comprises a main control circuit 21, a power supply circuit 22, a first voltage conversion circuit 23, a second voltage conversion circuit 24 and a data transmission circuit 25; the test circuit 3 comprises a plurality of test modules for testing the SSD, and each test module comprises an analog-to-digital conversion circuit 34, an electric signal amplification circuit 32, an SSD socket circuit 33 and a voltage transformation and voltage switching circuit 31;
the power supply circuit 22 outputs 12V to the first voltage conversion circuit 23 and the voltage transformation and switching circuit 31, respectively, and has a first branch and a second branch as follows:
the first branch-first voltage conversion circuit 23 is used for carrying out voltage conversion on 12V electricity to generate 6V electricity which is respectively output to the analog-digital conversion circuit 34, the data transmission circuit 25 and the second voltage conversion circuit 24, the second voltage conversion circuit 24 is used for converting the 6V electricity into 3.3V electricity which is output to the main control circuit 21, and the data transmission circuit 25 is used for establishing a data interaction channel between the main control circuit 21 and the PC terminal 1 through the 6V electricity;
the second branch-voltage transformation and switching circuit 31 can perform various voltage transformation switching adjustments according to 12V electricity to output electric signals with different voltages, currents and power values to the electric signal amplification circuit 32 and the SSD socket circuit 33, the SSD socket circuit 33 tests the SSD through the electric signals, the electric signal amplification circuit 32 amplifies the electric signals and outputs the amplified electric signals to the analog-to-digital conversion circuit 34, and the main control circuit 21 obtains the electric signals in the analog-to-digital conversion circuit 34 to perform analog-to-digital conversion to calculate the values of the currents, the voltages and the powers supplied for the SSD test.
The connection relationship of the SSD test platform is:
the power circuit 22 is respectively connected with the first voltage conversion circuit 23 and the transformation and voltage switching circuit 31 of the test module;
the first voltage conversion circuit 23 is respectively connected with the second voltage conversion circuit 24, the data transmission circuit 25 and the analog-to-digital conversion circuit 34 of the test module;
the second voltage conversion circuit 24 is connected with the main control circuit 21;
the main control circuit 21 is connected with the PC end 1 through the data transmission circuit 25, and the main control circuit 21 is connected with the analog-to-digital conversion circuit 34;
the voltage transformation and switching circuit 31 is respectively connected with the electric signal amplification circuit 32 and the SSD socket circuit 33;
the electric signal amplifying circuit 32 is connected to an analog-to-digital conversion circuit 34.
In particular, the method comprises the following steps of,
the SSD test platform provided by the application arranges the power supply circuit 22 in the platform to realize power supply in the platform; the test circuit 3 may include a plurality of test modules, the number of the test modules is preferably 14, and 14 test modules are respectively connected to the processing circuit 2, so as to test 14 SSDs.
Any one of the 14 test modules comprises an analog-to-digital conversion circuit 34, an electric signal amplification circuit 32, an SSD socket circuit 33 and a transformation and voltage switching circuit 31, wherein the transformation and voltage switching circuit 31 receives 12V electricity of the power supply circuit 22 and can respectively output electric signals with different voltages, currents and power values to the electric signal amplification circuit 32 and the SSD socket circuit 33;
the SSD socket circuit 33 is connected with the SSD, so that the SSD can be tested by adopting the electric signals with different voltage, current and power values;
the electrical signal is further output to the electrical signal amplifying circuit 32, and further subjected to electrical signal amplification processing, and finally the original electrical signal (first electrical signal) and the amplified electrical signal (second electrical signal) are output to the analog-to-digital conversion circuit 34, and finally acquired and calculated by the main control circuit 21.
The main control circuit 21 is composed of two crystal oscillators connected with a resonance capacitor, a singlechip main control circuit and a filtering voltage-stabilizing capacitor, and the two crystal oscillators Y1 and Y2 are connected with the respective resonance capacitors to respectively provide 25MHZ crystal oscillator signals and 32.768KHZ crystal oscillator signals for the singlechip main control circuit. The main control circuit 21 is connected with the data transmission circuit 25 for receiving test data of the PC and transmitting test result data; the main control circuit 21 is connected with the test circuit 3 to cooperatively work to provide test signals required for testing the SSD and obtain test result data after testing.
In one embodiment, referring to fig. 2, the transforming and voltage switching circuit 31 includes a processing chip U1, and the 2 nd pin and the 7 th pin of the processing chip U1 are connected to the power circuit 22 to switch in 12V power, wherein the 2 nd pin is a voltage input pin, and the 7 th pin is connected in series to the enable switch S1 as a chip enable pin;
the 5 th pin of the processing chip U1 is connected in series with a plurality of resistors and a transformation switch group SW1, and each group of switches of the transformation switch group SW1 is also connected in series with the corresponding resistor;
Specifically, the 3 rd pin of the processing chip U1 is used for outputting an electrical signal, and the 5 th pin adjusts the voltage, current and power values of the electrical signal output by the 3 rd pin through the voltage transformation switch group SW 1.
The processing chip U1 is connected in series with the voltage transformation switch group SW1, and a circuit formed by connecting the processing chip U1 in series with the voltage transformation switch group SW1 is provided with R4 and R22 connected in series with the 5 th pin.
The transformation switch group is divided into 4 paths, so the 5 th pin of the processing chip U1 is divided into 4 wire branches through the transformation switch group SW1, wherein the 1 st path of the transformation switch group SW1 is open circuit, the 2 nd path is connected with the 5 th pin in series after the R11 is connected with the 5 th pin in series, the 3 rd path is connected with the R12 and the R25, the Q1 are connected with the 5 th pin in series, and the 4 th path is connected with the R24 and the 5 th pin in series. Finally, the output of different voltage, current and power values of the regulated electric signal is realized by regulating each switch of the transformation switch group SW 1.
In one embodiment, referring to fig. 3, the electrical signal amplifying circuit 32 includes a processing chip U4, and the transforming and voltage switching circuit 31 outputs an electrical signal to the 10 th pin of the processing chip U4 for powering the processing chip U4;
the 16 th pin of the processing chip U4 receives the electrical signal output by the voltage transforming and switching circuit 31, and the voltage signal carrying the current information from the 9 th pin is amplified by the processing chip U4 and then sent to the analog-to-digital conversion circuit 34.
Specifically, a 10 th pin of the processing chip U4 is connected to an electrical signal input by the voltage transformation and switching circuit 31 for supplying power, a 16 th pin receives the electrical signal and performs electrical signal amplification, a 9 th pin is used for outputting the electrical signal (the second electrical signal) after the electrical signal amplification to the analog-to-digital conversion circuit 34, and a 1 st pin is used for outputting the electrical signal (the first electrical signal) without the electrical signal amplification to the analog-to-digital conversion circuit 34, so that the analog-to-digital conversion circuit 34 obtains two electrical signals.
In one embodiment, referring to fig. 4, the analog-to-digital conversion circuit 34 includes a processing chip U7, the 8 th pin of the processing chip U7 receives 6V power input by the first voltage conversion circuit 23 for power supply, the 1 st pin, the 5 th pin, the 6 th pin and the 7 th pin of the processing chip U7 are all connected with the main control circuit 21, and the 2 st pin and the 3 rd pin transmit electric signals, the chip performs analog electric signal conversion into digital signal, and the 6 th pin transmits the digital signal to the processing chip U1 of the main control circuit 21 for collection of test electric signal.
Specifically, the main control circuit 21 performs analog-to-digital conversion on the 1 st pin, the 5 th pin, and the 7 th pin of the control processing chip U7 to output two electrical signals (i.e., a first electrical signal and a second electrical signal) to the main control circuit through the 6 th pin, so as to calculate the values of the current, the voltage, and the power supplied to the SSD for testing, thereby obtaining the data obtained by the testing.
In one embodiment, referring to fig. 5-6, the first voltage conversion circuit 23 includes a processing chip U3, and the 2 nd pin and the 7 th pin of the processing chip U3 turn on the power circuit 22 to connect 12V power, wherein the 2 nd pin is a voltage input pin, and the 7 th pin is a serial enable switch S3 which is a chip enable pin;
the 5 th pin of the processing chip U3 is connected in series with resistors R9 and R20, and the 3 rd pin of the processing chip outputs 6V power to the data transmission circuit 25, the second voltage conversion circuit 24 and the analog-to-digital conversion circuit 34.
As can be seen from the above, the power supply circuit 22 outputs the 12V power to the first voltage conversion circuit 23, and the J1 of the power supply circuit 22 takes the 12V power and outputs it to the first voltage conversion circuit 23 through the switch S16.
After passing through the fuse F3, the 12V power is output to the 2 nd pin and the 7 th pin of the processing chip U3, and after voltage conversion, the 1 st pin and the 3 rd pin output the 6V power to the second voltage conversion circuit 24, the data transmission circuit 25, and the analog-to-digital conversion circuit 34 of the test module.
Whether or not to output 6V power is judged by the light emitting diode R33 in the process of outputting 6V power.
In one embodiment, the processing circuit 2 further includes a recording and monitoring circuit 26, and the recording and monitoring circuit 26 is respectively connected to the PC terminal 1 and the main control circuit 21.
In one embodiment, the processing circuit 2 further comprises a reset circuit, which is connected to the main control circuit 21.
Referring to fig. 9-10, a testing method for an SSD testing platform, the testing method performed by the SSD testing platform includes:
s1, the power supply circuit 22 outputs 12V to the first voltage conversion circuit 23 and the voltage transformation and switching circuit 31, respectively;
s2, the first voltage conversion circuit 23 converts the 12V electricity into 6V electricity, and outputs the 6V electricity to the analog-to-digital conversion circuit 34, the second voltage conversion circuit 24 and the data transmission circuit 25 respectively, so as to supply power to the analog-to-digital conversion circuit 34 and the data transmission circuit 25;
s3, the second voltage converting circuit 24 converts the 6V power into 3.3V power and outputs the 3.3V power to the main control circuit 21, so as to supply power to the main control circuit 21;
s4, the main control circuit 21 collects the electric signal data in the analog-to-digital conversion circuit 34, generates a test result reflecting the SSD test condition according to the electric signal data, and feeds the test result back to the PC end 1 through the data transmission circuit 25;
wherein,
before the step S4 of the main control circuit 21 acquiring the electrical signal data in the analog-to-digital conversion circuit 34, the method includes:
s100, the power circuit 22 outputs 12V power to the transformation and voltage switching circuit 31;
s200, the voltage transformation and switching circuit 31 outputs first electric signals with different voltages, currents and power values to the electric signal amplification circuit 32 and the SSD socket circuit 33 according to the 12V electricity, and the SSD socket circuit 33 tests the SSD according to the first electric signals;
s300, the electrical signal amplifying circuit 32 performs signal amplification processing on the first electrical signal to generate a second electrical signal, and outputs the first electrical signal and the second electrical signal to the analog-to-digital conversion circuit 34;
s400, the analog-to-digital conversion circuit 34 performs analog-to-digital conversion on the first electrical signal and the second electrical signal to form electrical signal data, and then performs the step S4.
In one embodiment, the step of the voltage transforming and switching circuit 31 outputting the first electrical signals with different voltages, currents and power values to the electrical signal amplifying circuit 32 and the SSD socket circuit 33 according to the 12V electrical signals includes:
the method comprises the following steps of generating first electric signals with different voltage, current and power values by adopting a preset switch bank voltage transformation method, wherein the switch bank voltage transformation method comprises the following steps:
in the first method, all switches of the voltage transformation switch group SW1 are turned off, and the signal received by the 5 th pin of the processing chip U1 is determined by R4 and R22, and the output voltage is 4.888V and is supplied to the SSD test;
in the second method, only switch 2 of the transforming switch group SW1 is closed, and the signal received by the 5 th pin of the processing chip U1 is determined by R4, R22 and R11, and the output voltage is 4.5V and is supplied to the SSD test;
in the third method, the voltage transformation switch group SW1 only closes the switch 4, and the signal received by the 5 th pin of the processing chip U1 is only determined by R4, R22 and R24, and then the output voltage is 5.5V and is supplied to the SSD test;
the method four comprises the following steps: and the switch 4 and the switch 2 of the transformation switch group SW1 are closed, the signals received by the transformation switch group of the processing chip U1 are only determined by R4, R22, R11 and R24, and the output voltage is 5V and is supplied to the SSD test.
The method five comprises the following steps: the voltage transformation switch group only closes the switch 3 of the SW1, and the main control circuit 21 controls whether the MOS tube Q1 is conducted to achieve the purpose of controlling whether the R25 resistor is used, so that the main control circuit 21 controls whether the MOS tube Q4 is conducted to generate 4.5V voltage by using the combination of R4, R12 and R22 or generate 5V test voltage by using R4, R11, R22 and R25 by closing the switch 3 of the voltage transformation switch group SW1, and then quickly switches the 4.5V voltage and the 5.5V voltage back and forth in the test process.
Although embodiments of the present application have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the application, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
1. An SSD test platform is characterized by consisting of a PC end, a processing circuit and a test circuit; the PC end outputs test data to the processing circuit, the test data are processed by the processing circuit to generate test instructions and output the test instructions to the test circuit, the test circuit tests the SSD according to the test instructions and feeds back test results to the processing circuit, and finally the PC end obtains the test results of the SSD;
the processing circuit comprises a main control circuit, a power supply circuit, a first voltage conversion circuit, a second voltage conversion circuit and a data transmission circuit; the test circuit comprises a plurality of test modules for testing the SSD, and each test module comprises an analog-to-digital conversion circuit, an electric signal amplification circuit, an SSD socket circuit and a voltage transformation and voltage switching circuit;
the power supply circuit outputs 12V electricity to the first voltage conversion circuit and the voltage transformation and switching circuit respectively, and comprises a first branch and a second branch as follows:
the first branch-the first voltage conversion circuit carries out voltage conversion on 12V electricity to generate 6V electricity which is respectively output to the analog-digital conversion circuit, the data transmission circuit and the second voltage conversion circuit, the second voltage conversion circuit converts the 6V electricity into 3.3V electricity and outputs the electricity to the main control circuit, and the data transmission circuit establishes a data interaction channel between the main control circuit and the PC end through the 6V electricity;
the second branch, the voltage transformation and voltage switching circuit, according to 12V electricity, can perform various voltage transformation switching adjustments to output electrical signals of different voltages, currents and power values to the electrical signal amplification circuit and the SSD socket circuit, the SSD socket circuit tests the SSD through the electrical signals, the electrical signal amplification circuit amplifies the electrical signals and outputs the amplified electrical signals to the analog-to-digital conversion circuit, and the main control circuit obtains the electrical signals in the analog-to-digital conversion circuit to perform analog-to-digital conversion to calculate the values of the currents, the voltages and the powers supplied for the SSD test.
2. The SSD test platform of claim 1, wherein the transforming and voltage switching circuit comprises a processing chip U1, wherein pins 2 and 7 of the processing chip U1 are connected to a power circuit to switch on 12V power, wherein pin 2 is a voltage input pin, and pin 7 is connected in series with an enable switch S1 to be a chip enable pin;
the 5 th pin of the processing chip U1 is connected in series with a plurality of resistors and a transformation switch group SW1, and each group of switches of the transformation switch group SW1 is also connected in series with the corresponding resistor;
and the 3 rd pin of the processing chip U1 outputs an electric signal to an electric signal amplifying circuit and an SSD socket circuit.
3. The SSD test platform of claim 1, wherein the electrical signal amplification circuit comprises a processing chip U4, the transformation and voltage switching circuit outputting an electrical signal to pin 10 of processing chip U4 for powering processing chip U4;
the 16 th pin of the processing chip U4 receives the electric signal output by the voltage transformation and voltage switching circuit, and the voltage signal carrying the current information by the 9 th pin is amplified by the processing chip U4 and then sent to the analog-to-digital conversion circuit.
4. The SSD test platform of claim 1, wherein the analog-to-digital conversion circuit comprises a processing chip U7, wherein a pin 8 of the processing chip U7 receives 6V of power input by a first voltage conversion circuit for power supply, and pins 1, 5, 6 and 7 of the processing chip U7 are all connected with a main control circuit.
5. The SSD test platform of claim 1, wherein the SSD socket circuit, the electrical signal amplification circuit, the analog-to-digital conversion circuit, and the voltage transformation and switching circuit can be the same in number with a number of them for testing a corresponding number of SSDs.
6. The SSD test platform of claim 1, wherein the first voltage conversion circuit comprises a processing chip U3, and a 2 nd pin and a 7 th pin of the processing chip U3 are connected to a power circuit to switch in 12V power, wherein the 2 nd pin is a voltage input pin, and the 7 th pin is connected in series with an enable switch S3 to be a chip enable pin;
the 5 th pin of the processing chip U3 is connected in series with resistors R9 and R20, and the 3 rd pin of the processing chip outputs 6V electricity to a data transmission circuit, a second voltage conversion circuit and an analog-to-digital conversion circuit.
7. The SSD test platform of claim 1, wherein the processing circuit further comprises a burning and monitoring circuit, the burning and monitoring circuit is connected to the PC terminal and the master control circuit, respectively.
8. The SSD test platform of claim 1, wherein the processing circuitry further comprises reset circuitry, the reset circuitry being connected to the master circuitry.
9. A testing method for an SSD testing platform, the SSD testing platform according to any of claims 1-8 performing the testing method, comprising:
s1, the power supply circuit outputs 12V electricity to the first voltage conversion circuit and the voltage transformation and voltage switching circuit respectively;
s2, the first voltage conversion circuit converts the 12V electricity into 6V electricity, and outputs the 6V electricity to the analog-to-digital conversion circuit, the second voltage conversion circuit and the data transmission circuit respectively, so as to supply power to the analog-to-digital conversion circuit and the data transmission circuit;
s3, the second voltage conversion circuit converts the 6V electricity into 3.3V electricity and outputs the electricity to the main control circuit so as to supply power to the main control circuit;
s4, the main control circuit collects the electric signal data in the analog-to-digital conversion circuit, generates a test result reflecting the SSD test condition according to the electric signal data, and feeds the test result back to the PC end through the data transmission circuit;
wherein,
before the step S4 of the master control circuit acquiring the electrical signal data in the analog-to-digital conversion circuit, the method includes:
s100, the power supply circuit outputs 12V power to the transformation and voltage switching circuit;
s200, the voltage transformation and switching circuit outputs first electric signals with different voltages, currents and power values to the electric signal amplification circuit and the SSD socket circuit according to the 12V electricity, and the SSD socket circuit tests the SSD according to the first electric signals;
s300, the electric signal amplifying circuit performs signal amplification processing on the first electric signal to generate a second electric signal, and outputs the first electric signal and the second electric signal to the analog-to-digital conversion circuit;
s400, the analog-to-digital conversion circuit performs analog-to-digital conversion on the first electrical signal and the second electrical signal to form electrical signal data, and then performs the step S4.
10. The SSD test platform of claim 9, wherein the SSD test platform of claim 2 performs the test method, and the step of the transforming and voltage switching circuit outputting the first electrical signal with different voltage, current and power values to the electrical signal amplifying circuit and the SSD socket circuit according to the 12V comprises:
the method comprises the following steps of generating first electric signals with different voltage, current and power values by adopting a preset switch bank voltage transformation method, wherein the switch bank voltage transformation method comprises the following steps:
in the first method, all switches of the voltage transformation switch group SW1 are turned off, and the signal received by the 5 th pin of the processing chip U1 is determined by R4 and R22, and the output voltage is 4.888V and is supplied to the SSD test;
in the second method, only switch 2 of the transforming switch group SW1 is closed, and the signal received by the 5 th pin of the processing chip U1 is determined by R4, R22 and R11, and the output voltage is 4.5V and is supplied to the SSD test;
in the third method, the voltage transformation switch group SW1 only closes the switch 4, and the signal received by the 5 th pin of the processing chip U1 is only determined by R4, R22 and R24, and then the output voltage is 5.5V and is supplied to the SSD test;
the method four comprises the following steps: the switch 4 and the switch 2 of the transformation switch group SW1 are closed, the signals received by the transformation switch group of the processing chip U1 are only determined by R4, R22, R11 and R24, and the output voltage is 5V and is supplied to an SSD test;
the method five comprises the following steps: the voltage transformation switch group only closes the switch 3 of the SW1, and the main control circuit controls whether the MOS tube Q1 is conducted to achieve the purpose of controlling whether the R25 resistor is used, so that the main control circuit controls whether the MOS tube Q4, the R12 and the R22 are combined to generate 4.5V voltage or generate 5V test voltage by using R4, R11, R22 and R25 by closing the switch 3 of the voltage transformation switch group SW1, and then the voltage of 4.5V and 5.5V is rapidly switched back and forth in the test process.
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