CN112084132A - Small-size multi-functional general information processing unit - Google Patents
Small-size multi-functional general information processing unit Download PDFInfo
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- CN112084132A CN112084132A CN202010909557.2A CN202010909557A CN112084132A CN 112084132 A CN112084132 A CN 112084132A CN 202010909557 A CN202010909557 A CN 202010909557A CN 112084132 A CN112084132 A CN 112084132A
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- 238000007781 pre-processing Methods 0.000 claims description 12
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
- B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
- B60R16/023—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements for transmission of signals between vehicle parts or subsystems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter
Abstract
The invention discloses a small-sized multifunctional general information processing unit, which relates to the technical field of image recognition and navigation control, in particular to a small-sized multifunctional general information processing unit. Based on the design concept of miniaturization and modularization, the invention designs a highly integrated low-cost general information processing unit by utilizing intelligent information processing and high-precision control technology and SIP packaging technology, and reduces the occupied space of electrical hardware in a circuit, thereby greatly reducing the hardware cost and realizing the characteristics of miniaturization, light weight and multiple functions.
Description
Technical Field
The invention relates to the technical field of image recognition and navigation control, in particular to a small multifunctional general information processing unit.
Background
With the great popularization of automobiles, the automatic driving technology is gradually paid more attention, and therefore, image recognition and navigation control become research hotspots of experts, scholars and research institutions of various countries. At present, the vehicle-mounted image recognition and navigation control units respectively use independent controllers to respectively execute respective work tasks, but in the process of image recognition and navigation control of the whole vehicle, hardware cost is high, the size is large, power consumption is large, and popularization of an automatic driving technology is severely restricted. The invention relates to a small multifunctional general information processing unit based on a DSP, an FPGA, an ARM and various sensors, which is used for realizing the miniaturization of image recognition and navigation control and meeting the actual use requirement.
Disclosure of Invention
Technical problem to be solved
In view of the deficiencies of the prior art, the present invention provides a small, multi-functional general information processing unit that solves the problems set forth in the background above.
In order to achieve the purpose, the invention is realized by the following technical scheme: a small-sized multifunctional general information processing unit comprises an application layer, a system layer, a drive layer and a physical layer;
the application layer comprises an image recognition unit, a combined navigation task unit, an electric control unit, an ignition control unit, a bus scheduling and arbitration unit and a software management and online upgrade module, and is configured to call various function drivers of a driving layer through a multi-task real-time operating system arranged inside the system layer so as to call the hardware of the physical layer;
the driving layer comprises a CAN-FD bus driving function, an FMC driving function, an EMIF16 driving function, an SPI bus driving function, an RS422 bus driving function, an ADC driving function, a TIMER driving function, a DSP power supply configuration function, a DSP clock configuration function, an SDRAM configuration function, a UART bus driving function, a CAN bus driving function, a 1533B bus driving function, an ARINC429 bus driving function, an IO configuration function and an inertial navigation device driving function;
the driving layer is configured to receive an instruction of a multi-task real-time operating system, and then calls each hardware in the physical layer;
the physical layer comprises a power supply module, a data parallel processing module FPGA, an algorithm operation module DSP, a bus arbitration and control module ARM, an SDRAM storage module, a FLASH storage module, an E2PROM storage module, a three-axis accelerometer, a three-axis gyroscope, a three-axis geomagnetic and temperature sensor;
the physical layer is configured to receive calling information of the driving layer and call corresponding hardware equipment according to the information type to realize corresponding control on each unit in the application layer;
the ARM is configured to complete dispatching of a CAN-FD bus in the driving layer, analog quantity collection and digital quantity collection and collection are completed by using an ADC (analog to digital converter), a DAC (digital to analog converter) and an IO (input/output) unit which are arranged in the driving layer, then the analog quantity and the digital quantity are transmitted to the FPGA (field programmable gate array) through the FMC bus, and data preprocessing such as data splicing and compression is performed together with data collected by the FPGA.
Optionally, the image recognition task unit is configured to recognize the vehicle posture during the vehicle driving process, convert the recognition information into a data function signal, and transmit the data function signal to the ARM bus arbitration and control module for data splicing and preprocessing after being called by the CAN-FD bus driving function.
Optionally, the data parallel processing module FPGA is configured to process acquisition control and data preprocessing of data of each sensor and bus in the general information processing unit at the same time, and transmit the processed data to the DSP through the EMIF for data analysis, resolution and processing.
Optionally, the DSP algorithm operation module is configured to utilize a built-in data processing algorithm to complete information processing collected by all the FPGAs and the ARM, generate a navigation control instruction, transmit the navigation control instruction to each peripheral controlled object through each external bus interface of the ARM and the FPGA, and instruct each peripheral controlled object to perform position discrimination and safe driving according to the navigation control instruction.
(III) advantageous effects
The invention provides a small-sized multifunctional general information processing unit, which has the following beneficial effects:
1. based on the design concept of miniaturization and modularization, the invention designs a highly integrated low-cost general information processing unit by utilizing intelligent information processing and high-precision control technology and SIP packaging technology, and reduces the occupied space of electrical hardware in a circuit, thereby greatly reducing the hardware cost and realizing the characteristics of miniaturization, light weight and multiple functions.
2. The invention integrates the main control processor and the inertia measurement unit into a whole, and highly integrates functional modules such as a multi-core DSP, an FPGA of a million-level gate array resource, a high-performance ARM processor, a storage unit, an inertia measurement unit and the like in the interior, thereby realizing the functions of complex algorithm operation, data parallel processing, arbitration of bus communication and inertia navigation, and improving the practical value of the invention.
3. The invention adopts a layered design, the software and the hardware cooperate to complete the navigation control work together, the physical layer is realized by adopting the hardware design, the application layer is a top functional unit, and the calling of the physical layer hardware is realized by calling various functional drivers of the driving layer in the multi-task real-time operating system of the system layer, so that various functions required by the system are realized, the flow is simplified, and the intelligent control and maintenance are realized.
Drawings
FIG. 1 is a functional block diagram of the system of the present invention;
FIG. 2 is a block diagram of the physical layer components of the system of the present invention;
FIG. 3 is a block diagram of the hardware components of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Referring to fig. 1 to 3, the present invention provides a technical solution: a small-sized multifunctional general information processing unit comprises an application layer, a system layer, a drive layer and a physical layer;
the application layer comprises an image recognition unit, a combined navigation task unit, an electric control unit, an ignition control unit, a bus scheduling and arbitration unit and a software management and online upgrade module, and is configured to call various function drivers of a driving layer through a multi-task real-time operating system arranged inside the system layer so as to call the hardware of the physical layer; the image recognition task unit is configured to recognize the vehicle posture in the vehicle driving process, convert the recognition information into a data function signal, and transmit the data function signal to the ARM bus arbitration and control module for data splicing and preprocessing after being called by the CAN-FD bus driving function;
the driving layer comprises a CAN-FD bus driving function, an FMC driving function, an EMIF16 driving function, an SPI bus driving function, an RS422 bus driving function, an ADC driving function, a TIMER driving function, a DSP power supply configuration function, a DSP clock configuration function, an SDRAM configuration function, a UART bus driving function, a CAN bus driving function, a 1533B bus driving function, an ARINC429 bus driving function, an IO configuration function and an inertial navigation device driving function;
the driving layer is configured to receive an instruction of a multi-task real-time operating system, and then calls each hardware in the physical layer;
the physical layer comprises a power supply module, a data parallel processing module FPGA, an algorithm operation module DSP, a bus arbitration and control module ARM, an SDRAM storage module, a FLASH storage module, an E2PROM storage module, a three-axis accelerometer, a three-axis gyroscope, a three-axis geomagnetic and temperature sensor; the data parallel processing module FPGA is configured to simultaneously process acquisition control and data preprocessing of data of each sensor and each bus in the general information processing unit, and transmits the processed data to the DSP through EMIF for data analysis, calculation and processing; the DSP algorithm operation module is configured to complete information processing collected by the FPGA and the ARM by using a built-in data processing algorithm, generate a navigation control instruction, transmit the navigation control instruction to each peripheral controlled object through each external bus interface of the ARM and the FPGA, and command each peripheral controlled object to perform position judgment and safe driving according to the navigation control instruction;
the physical layer is configured to receive calling information of the driving layer and call corresponding hardware equipment according to the information type to realize corresponding control on each unit in the application layer;
the ARM is configured to complete dispatching of a CAN-FD bus in the driving layer, analog quantity collection and digital quantity collection and collection are completed by using an ADC (analog to digital converter), a DAC (digital to analog converter) and an IO (input/output) unit which are arranged in the driving layer, then the analog quantity and the digital quantity are transmitted to the FPGA (field programmable gate array) through the FMC bus, and data preprocessing such as data splicing and compression is performed together with data collected by the FPGA.
In the general information processing unit, ARM is a CAN/CAN-FD bus arbitration and scheduling control unit of the information processing unit, and is used for completing scheduling of the CAN/CAN-FD bus in the general information processing unit, simultaneously completing acquisition and generation of analog quantity and acquisition and generation of digital quantity by using built-in ADC, DAC and IO units, and the information acquired by ARM is sent to FPGA through FMC bus, and is spliced and compressed together with the data acquired by FPGA to perform data preprocessing such as data preprocessing. The FPGA is an acquisition control and data preprocessing unit of data of each sensor and each bus in the whole general information processing unit, the parallel acquisition of the data of the 3-axis accelerometer, the 3-axis gyroscope and the 3-axis magnetometer and the parallel acquisition of data transmitted by the 1553B, ARINC429 bus and the RS422 bus are realized by utilizing the parallel high-speed characteristic of the FPGA, the data information is spliced and compressed, and then the processed data is transmitted to the DSP through EMIF for data analysis, resolving and processing. The DSP is an information processing core unit of the whole processing unit, and the DSP completes the processing of all data information acquired by the FPGA and the ARM by utilizing a built-in data processing algorithm, generates a navigation control instruction and transmits the navigation control instruction to each peripheral controlled object through each external bus interface of the ARM and the FPGA. In the general information processing unit, after data information of the 3-axis accelerometer, the 3-axis gyroscope and the 3-axis geomagnetism is sent to the DSP, the DSP processes the data according to a navigation algorithm in the DSP, calculates the position and motion posture related information of a carrier carried by the current general information processing unit, and transmits the information out through each bus by the FPGA and the ARM. Meanwhile, according to different requirements of application scenes, the DSP also generates corresponding control instructions according to the attitude and position information obtained by the calculation, transmits corresponding control execution through external bus interfaces of the FPGA and the ARM, executes the control execution including power supply monitoring, ignition control and the like, integrates inertial measurement devices such as an accelerometer, a gyroscope, a geomagnetic sensor and the like, can be used for measuring the angular velocity and acceleration information of the vehicle, realizes the function of inertial navigation and completes instruction control on each external controlled unit. In order to meet the use requirements of various application scenes, SDRAM and E2PROM memory units are designed outside the DSP, wherein the SDRAM is used for meeting the use requirements of the memory space for carrying out the image processing algorithm in the DSP after the image information collected by the FPGA is sent to the DSP, and the E2PROM is used for storing each configuration parameter information required by the navigation control algorithm in the DSP.
The working principle and the beneficial effects of the invention are as follows: based on the design concept of miniaturization and modularization, the invention designs a highly integrated low-cost general information processing unit by utilizing intelligent information processing and high-precision control technology and SIP packaging technology, reduces the occupied space of electrical hardware in a circuit, thereby greatly reducing the hardware cost and realizing the characteristics of miniaturization, light weight and multiple functions, integrates a main control processor and an inertia measurement unit into a whole, and highly integrates functional modules such as a multi-core DSP, a FPGA with tens of millions of gate array resources, a high-performance ARM processor, a storage unit, an inertia measurement unit and the like in the interior, thereby realizing the functions of complex algorithm operation, data parallel processing, arbitration of bus communication and inertia navigation, improving the practical value of the invention, adopting a layered design, cooperatively matching software and hardware to complete navigation control work, adopting a hardware design in a physical layer, the application layer is a top functional unit, and calls various function drivers of the driver layer in a multi-task real-time operating system of the system layer to realize the calling of physical layer hardware and various functions required by the system, thereby simplifying the flow and realizing intelligent control and maintenance.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (4)
1. A small multifunction general-purpose information processing unit characterized by: the system comprises an application layer, a system layer, a drive layer and a physical layer;
the application layer comprises an image recognition unit, a combined navigation task unit, an electric control unit, an ignition control unit, a bus scheduling and arbitration unit and a software management and online upgrade module, and is configured to call various function drivers of a driving layer through a multi-task real-time operating system arranged inside the system layer so as to call the hardware of the physical layer;
the driving layer comprises a CAN-FD bus driving function, an FMC driving function, an EMIF16 driving function, an SPI bus driving function, an RS422 bus driving function, an ADC driving function, a TIMER driving function, a DSP power supply configuration function, a DSP clock configuration function, an SDRAM configuration function, a UART bus driving function, a CAN bus driving function, a 1533B bus driving function, an ARINC429 bus driving function, an IO configuration function and an inertial navigation device driving function;
the driving layer is configured to receive an instruction of a multi-task real-time operating system, and then calls each hardware in the physical layer;
the physical layer comprises a power supply module, a data parallel processing module FPGA, an algorithm operation module DSP, a bus arbitration and control module ARM, an SDRAM storage module, a FLASH storage module, an E2PROM storage module, a three-axis accelerometer, a three-axis gyroscope, a three-axis geomagnetic and temperature sensor;
the physical layer is configured to receive calling information of the driving layer and call corresponding hardware equipment according to the information type to realize corresponding control on each unit in the application layer;
the ARM is configured to complete dispatching of a CAN-FD bus in the driving layer, analog quantity collection and digital quantity collection and collection are completed by using an ADC (analog to digital converter), a DAC (digital to analog converter) and an IO (input/output) unit which are arranged in the driving layer, then the analog quantity and the digital quantity are transmitted to the FPGA (field programmable gate array) through the FMC bus, and data preprocessing such as data splicing and compression is performed together with data collected by the FPGA.
2. A small form factor multi-purpose general information processing unit as recited in claim 1, wherein: the image recognition task unit is configured to recognize the vehicle posture in the vehicle driving process, convert the recognition information into a data function signal, and transmit the data function signal to the ARM bus arbitration and control module for data splicing and preprocessing after being called by the CAN-FD bus driving function.
3. A small form factor multi-purpose general information processing unit as recited in claim 1, wherein: the data parallel processing module FPGA is configured to process acquisition control and data preprocessing of data of each sensor and each bus in the general information processing unit at the same time, and transmits the processed data to the DSP through EMIF for data analysis, calculation and processing.
4. A small form factor multi-purpose general information processing unit as recited in claim 1, wherein: the DSP algorithm operation module is configured to complete information processing collected by the FPGA and the ARM by using a built-in data processing algorithm, generate a navigation control instruction, transmit the navigation control instruction to each peripheral controlled object through each external bus interface of the ARM and the FPGA, and command each peripheral controlled object to perform position judgment and safe driving according to the navigation control instruction.
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Cited By (2)
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| CN114745222A (en) * | 2022-06-08 | 2022-07-12 | 成都飞亚航空设备应用研究所有限公司 | Multifunctional communication module |
| CN115327973A (en) * | 2022-07-21 | 2022-11-11 | 阿波罗智能技术(北京)有限公司 | Cleaning device, equipment, electronic equipment and automatic driving vehicle |
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