CN112072938A - Apparatus and method for improving output voltage load regulation rate of switching power supply - Google Patents
Apparatus and method for improving output voltage load regulation rate of switching power supply Download PDFInfo
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- CN112072938A CN112072938A CN202010958413.6A CN202010958413A CN112072938A CN 112072938 A CN112072938 A CN 112072938A CN 202010958413 A CN202010958413 A CN 202010958413A CN 112072938 A CN112072938 A CN 112072938A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
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Abstract
The present disclosure relates to an apparatus and method for improving an output voltage load regulation rate of a switching power supply. An apparatus for improving an output voltage load regulation rate of a switching power supply includes: sample-and-hold logic to generate a sample-and-hold logic signal based on a Pulse Width Modulation (PWM) signal from a power transistor in the switching power supply; a sample-and-hold circuit to sample based on the sample-and-hold logic signal to generate a sampled voltage; and a voltage-to-current conversion circuit for generating an output bias current based on the sampled voltage to feed to a voltage divider circuit in the switching power supply.
Description
Technical Field
The present disclosure relates to techniques for improving the output voltage load regulation of switching power supplies, and more particularly, to apparatus and methods for improving the output voltage load regulation of non-isolated floating earth alternating current-direct current (AC-DC) converters (e.g., buck converters, and buck-boost converters, etc.).
Background
Switching power supplies (e.g., non-isolated, high-integration, and low-cost Pulse Width Modulation (PWM) power switching power supplies) may be used for circuits (e.g., off-line buck circuits, and buck-boost circuits, etc.) needed in application scenarios such as small appliances and auxiliary power supplies, as well as for alternative power supplies to linear power supplies. In practical applications, it is desirable that such a switching power supply be capable of outputting a voltage with high accuracy. However, the conventional switching power supply (e.g., the conventional non-isolated floating AC-DC converter) has problems of discontinuity of output voltage regulation, long setup time of a circuit for controlling the output voltage load regulation rate, and complicated structure of the circuit.
Disclosure of Invention
In view of the above-described problems, the present disclosure provides a novel apparatus and method for improving an output voltage load regulation rate of a switching power supply.
According to an aspect of embodiments of the present disclosure, there is provided an apparatus for improving an output voltage load regulation rate of a switching power supply, including: sample-and-hold logic to generate a sample-and-hold logic signal based on a Pulse Width Modulation (PWM) signal from a power transistor in the switching power supply; a sample-and-hold circuit to sample based on the sample-and-hold logic signal to generate a sampled voltage; and a voltage-to-current conversion circuit for generating an output bias current based on the sampled voltage to feed to a voltage divider circuit in the switching power supply.
In one example embodiment, the sampled voltage is proportional to an off-time of the power tube, and the output bias current is proportional to the sampled voltage.
In one example embodiment, the sample-and-hold circuit includes a capacitor, a switch, and an input bias current, wherein the switch is turned on and off based on the sample-and-hold logic signal.
In one example embodiment, the sample and hold logic signal comprises a first sample and hold logic signal, a second sample and hold logic signal, and a third sample and hold logic signal, and the switches comprise a first switch, a second switch, and a third switch, wherein the first switch is turned on and off based on the first sample and hold logic signal, the second switch is turned on and off based on the second sample and hold logic signal, and the third switch is turned on and off based on the third sample and hold logic signal.
In one example embodiment, the capacitance includes a first capacitance and a second capacitance, and the sampled voltage is calculated based on the input bias current, the first capacitance, and an off-time of the power tube.
According to another aspect of embodiments of the present disclosure, there is provided a method for improving an output voltage load regulation rate of a switching power supply, including: generating a sample-and-hold logic signal based on a Pulse Width Modulation (PWM) signal from a power tube in the switching power supply; sampling based on the sample-and-hold logic signal to generate a sampled voltage; and a voltage divider circuit that generates an output bias current based on the sampled voltage to feed into the switching power supply.
In one example embodiment, the sampled voltage is proportional to an off-time of the power tube, and the output bias current is proportional to the sampled voltage.
In one example embodiment, the sample-and-hold logic signals include a first sample-and-hold logic signal, a second sample-and-hold logic signal, and a third sample-and-hold logic signal.
The apparatus and method for improving the output voltage load regulation rate of the switching power supply according to the embodiments of the present disclosure have advantages of stable output voltage, short setup time of a circuit for controlling the output voltage load regulation rate, and simple structure of the circuit.
Drawings
The disclosure may be better understood from the following description of specific embodiments thereof taken in conjunction with the accompanying drawings, in which:
fig. 1 illustrates a schematic structural diagram of an apparatus for improving an output voltage load regulation rate of a switching power supply according to an embodiment of the present disclosure;
fig. 2 shows a schematic structural diagram of an example application of an apparatus for improving an output voltage load regulation rate of a switching power supply according to an embodiment of the present disclosure;
fig. 3 shows a schematic diagram of the timing of relevant signals in an example application of an apparatus for improving the output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure;
fig. 4 shows a schematic diagram of an output voltage in an example application of an apparatus for improving an output voltage load regulation ratio of a switching power supply according to an embodiment of the present disclosure; and
fig. 5 shows a flow diagram of a method for improving an output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure.
Detailed Description
Features and exemplary embodiments of various aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. Example implementations can be embodied in many forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example implementations to those skilled in the art. In the drawings, the size of regions and components may be exaggerated for clarity. Further, in the drawings, the same reference numerals denote the same or similar structures, and thus detailed descriptions thereof will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the disclosure can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the primary technical ideas of the disclosure.
Example embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
Fig. 1 shows a schematic structural diagram of an apparatus 100 for improving an output voltage load regulation rate of a switching power supply according to an embodiment of the present disclosure. As shown in fig. 1, an apparatus 100 for improving an output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure may include a sample-and-hold logic 101, a sample-and-hold circuit 102, and a voltage-to-current conversion circuit 103.
Sample and hold logic 101 may be used to generate a sample and hold logic signal based on a Pulse Width Modulation (PWM) signal from a power transistor in a switching power supply. As an example, the sample-and-hold logic signal may be generated based on a PWM signal from a gate of a power tube in a switching power supply. In one embodiment, the sample-and-hold logic signals may include a first sample-and-hold logic signal Sq, a second sample-and-hold logic signal Sd, and a third sample-and-hold logic signal Sc. As an example, fig. 3 shows the timing of the PWM signal of the gate of the power tube in the switching power supply and the sample-and-hold logic signals Sq, Sd, and Sc generated by the sample-and-hold logic 101, where Toff _ min represents the minimum off time of the power tube in the switching power supply. In one embodiment, the switching power supply may be a non-isolated floating earth alternating current-direct current (AC-DC) converter (e.g., a buck converter, a buck-boost converter, etc.). In one embodiment, the power transistor in the switching power supply may be an N-channel type metal oxide semiconductor field effect (MOS) transistor.
The sample-and-hold circuit 102 may be used to sample based on the sample-and-hold logic signal generated by the sample-and-hold logic 101 to generate a sampled voltage. In one embodiment, the sample-and-hold circuit 102 may include a capacitor, a switch, and an input bias current, where the switch may be turned on and off based on the sample-and-hold logic signal. As an example, the switches may include a first switch, a second switch, and a third switch, wherein the first switch may be turned on and off based on the first sample-and-hold logic signal Sq, the second switch may be turned on and off based on the second sample-and-hold logic signal Sd, and the third switch may be turned on and off based on the third sample-and-hold logic signal Sc. As an example, the capacitance may include a first capacitance and a second capacitance, and the sampling voltage may be calculated based on the input bias current, the first capacitance, and an off-time Toff of the power tube, wherein the sampling voltage is proportional to the off-time Toff of the power tube.
The voltage-to-current conversion circuit 103 may be used to generate an output bias current based on the sampled voltage generated by the sample-and-hold circuit 102 for feeding to a voltage divider circuit in the switching power supply. The output bias current generated by the voltage-current conversion circuit 103 is proportional to the sampling voltage generated by the sample-and-hold circuit 102. As described above, since the sampling voltage generated by the sample-and-hold circuit 102 is proportional to the off-time Toff of the power tube, the output bias current generated by the voltage-current conversion circuit 103 is proportional to the off-time Toff of the power tube.
The apparatus 100 for improving the output voltage load regulation of a switching power supply as shown in fig. 1 is shown and described in more detail by way of an application example in connection with fig. 2. Specifically, fig. 2 shows a schematic diagram 200 of the apparatus 100 for improving the output voltage load regulation rate of the switching power supply according to an embodiment of the present disclosure as shown in fig. 1, applied to a non-isolated floating AC-DC buck converter.
As shown in fig. 2, the input AC voltage may be rectified and filtered by a rectifying and filtering circuit 210 (e.g., a rectifier bridge) of the non-isolated floating-ground AC-DC buck converter to convert to a DC voltage Vin _ hv. In one embodiment, the rectifying and filtering circuit 210 may include a fuse, a rectifying diode, and a filtering capacitor for rectifying and filtering the input ac power. As an example, as shown in fig. 2, the rectifying and filtering circuit 210 may include a fuse, a first rectifying diode, a second rectifying diode, a third rectifying diode, a fourth rectifying diode, and a filter capacitor Cin. The first rectifying diode and the third rectifying diode may be connected in series to form a first series circuit, the second rectifying diode and the fourth rectifying diode may be connected in series to form a second series circuit, and the first series circuit, the second series circuit, and the filter capacitor Cin may be connected in parallel to each other.
A first input terminal of the rectifying and smoothing circuit 210 may be connected to an anode of the alternating current power AC and may be connected to a common terminal of the first rectifying diode and the third rectifying diode via a fuse, and a second input terminal of the rectifying and smoothing circuit 210 may be connected to a cathode of the alternating current power AC and may be connected to a common terminal of the second rectifying diode and the fourth rectifying diode. An output terminal of the rectifying and filtering circuit 210 may be connected to cathodes of the first and second rectifying diodes and a first terminal of the filter capacitor Cin, and anodes of the third and fourth rectifying diodes and a second terminal of the filter capacitor Cin may be grounded.
It should be appreciated that although fig. 2 illustrates that the rectifying and filtering circuit 210 of the non-isolated floating-ground AC-DC buck converter may include four rectifying diodes, in other embodiments, the rectifying and filtering circuit 210 may include any suitable number of rectifying diodes (e.g., two rectifying diodes). In addition, the fuse of the rectifying and filtering circuit 210 may be replaced by a fuse resistor, a winding resistor, or an inductor. That is, the rectifying and filtering circuit 210 shown in fig. 2 is merely an example for convenience of explanation and explanation. The present invention does not limit the specific components and connections of the rectifying and smoothing circuit 210 of the non-isolated floating-ground AC-DC buck converter to which the apparatus 100 for improving the output voltage load regulation of the switching power supply can be applied, as long as the rectifying and smoothing circuit 210 can perform the function of rectifying and smoothing the input AC power.
The DC voltage Vin _ hv may be processed by the controller 220 of the non-isolated floating AC-DC buck converter to generate the regulated voltage Vdd. As an example, as shown in fig. 2, the controller 220 may include a high voltage start-up circuit, a voltage dividing circuit (including a Vdd feedback voltage dividing resistor string including resistors Rfb1, Rfb2, and Rfb3 connected in series), a comparator, an RS flip-flop, a driving circuit, and a power transistor MN 0. The inverting input terminal (e.g., "-" input terminal shown in fig. 2) of the comparator may be connected to the common terminal (voltage is Vfb) of the resistors Rfb2 and Rfb3 of the Vdd feedback voltage dividing resistor string of the voltage dividing circuit, and the non-inverting input terminal (e.g., "+" input terminal shown in fig. 2) of the comparator may be input with the reference voltage Vref. When the input voltage Vfb of the "-" input end of the comparator is smaller than the reference voltage Vref of the "+" input end of the comparator, the RS trigger is set, the power tube MN0 is conducted, and the current of the inductor L is increased; when the current of the inductor L reaches the peak current Ipeak, the RS trigger is reset, the power tube MN0 is turned off, the current of the inductor L is reduced, and the process is repeated.
The ICG signal generated by the controller 220 (a chip ground reference signal of the controller 220, which is extracted from a common terminal of the resistor Rfb1 of the Vdd feedback voltage-dividing resistor string of the voltage-dividing circuit and the source of the power transistor MN 0) is filtered by an LC filter (including an inductor L and a capacitor Cout) of the step-down circuit 230 of the non-isolated floating-ground AC-DC buck converter to generate an output voltage Vout, wherein the output voltage Vout depends on the adjustment voltage Vdd (e.g., the output voltage Vout is positively correlated with the adjustment voltage Vdd). As shown in fig. 2, the voltage dropping circuit 230 may further include a freewheeling diode D1, a charging diode D2, a stabilizing capacitor C0, and a load resistor Rload. Similarly, the present invention is not limited to the specific components and connections of the controller 220 and the step-down circuit 230 of the non-isolated floating-ground AC-DC buck converter to which the apparatus 100 for improving the output voltage load regulation of the switching power supply can be applied.
The output voltage Vout increases with an increase in the load resistance Rload, i.e., the output voltage Vout increases with a decrease in the load current Iload, i.e., the output voltage Vout is inversely proportional to the load current Iload. Therefore, the output voltage Vout varies with the load variation, so that the output voltage load regulation ratio is not ideal. A conventional circuit for controlling the output voltage load regulation of a non-isolated floating AC-DC converter determines whether to compensate the output voltage Vout accordingly, for example, by directly detecting the load current Iload. For example, if a decrease in the load current Iload is detected, it indicates that the output voltage Vout increases as the load current decreases, and therefore, in order to keep the output voltage stable, it is necessary to compensate the output voltage Vout accordingly, so that the output voltage Vout decreases by the portion of the output voltage Vout that increases as the load current decreases. However, directly detecting the load current Iload is complicated, and such a conventional circuit for controlling the load regulation rate of the output voltage in a manner of directly detecting the load current Iload has a long setup time and a complicated structure.
The apparatus 100 for improving the load regulation rate of the output voltage of the switching power supply according to an embodiment of the present disclosure can compensate for the variation of the output voltage Vout with the load without directly detecting the load current Iload, and has advantages of stable output voltage, short setup time of a circuit for controlling the load regulation rate of the output voltage, and simple structure of the circuit. As described in detail below in conjunction with fig. 2.
When the non-isolated floating-ground AC-DC buck converter operates in discontinuous mode (DCM), the following equation can be obtained from the inductive volt-second balance:
where F is the frequency of the PWM signal of the power transistor MN0, Iload is the load current passing through the load resistor Rload, Ipeak is the peak current threshold of the load current Iload, Vout is the output voltage, L is the inductance in the LC filter of the voltage step-down circuit 230, and Vin _ hv is the input dc voltage. In addition, the frequency F of the PWM signal of the power tube MN0 also satisfies the following equation:
where Tper is the period of the PWM signal of the power transistor MN0, Ton is the on-time of the power transistor MN0, and Toff is the off-time of the power transistor MN 0. Since Vin _ hv > Vout and Toff>>Ton, which can be obtained by simplifying the above two equations:
therefore, it can be seen that when Ipeak, Vout and L are fixed, 1/Tper and 1/Toff are both proportional to Iload, i.e. the period Tper of the PWM signal of power transistor MN0 and the off-time Toff of power transistor MN0 are both inversely proportional to Iload. Therefore, the load current Iload, which is inversely proportional to the off-time Toff of the power transistor MN0, may be calculated by sampling the period Tper of the PWM signal or the off-time Toff of the power transistor MN0 without directly detecting the load current Iload.
As shown in fig. 2, an apparatus 100 for improving an output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure may be included in a controller 220 of a non-isolated floating AC-DC buck converter, and may include a sample-and-hold logic 101, a sample-and-hold circuit 102, and a voltage-to-current conversion circuit 103.
The sample-and-hold logic 101 may be used to generate a sample-and-hold logic signal based on a PWM signal from a power tube MN0 in the controller 220 of the non-isolated floating AC-DC buck converter. As an example, the sample-and-hold logic signal may be generated based on a PWM signal from the gate of the power tube MN 0. In one embodiment, the sample-and-hold logic signals may include a first sample-and-hold logic signal Sq, a second sample-and-hold logic signal Sd, and a third sample-and-hold logic signal Sc. As an example, fig. 3 shows the timing of the PWM signal of the gate of the power tube MN0 and the sample-and-hold logic signals Sq, Sd, and Sc generated by the sample-and-hold logic 101, where Toff _ min represents the minimum off-time of the power tube MN 0. In one embodiment, the power transistor MN0 may be an N-channel metal oxide semiconductor field effect (MOS) transistor.
Sample-and-hold circuit 102 may be used to sample based on the sample-and-hold logic signal generated by sample-and-hold logic 101 to generate sample voltage Vc 2. In one embodiment, as shown in fig. 2, the sample-and-hold circuit 102 may include a capacitor, a switch, and an input bias current Ib, wherein the switch may be turned on and off based on the sample-and-hold logic signal. As an example, as shown in fig. 2, the switches may include a first switch, a second switch, and a third switch, wherein the first switch may be turned on and off based on the first sample-and-hold logic signal Sq, the second switch may be turned on and off based on the second sample-and-hold logic signal Sd, and the third switch may be turned on and off based on the third sample-and-hold logic signal Sc. As an example, as shown in fig. 2, the capacitors may include a first capacitor C1 and a second capacitor C2, and the sampled voltage Vc2 may be calculated based on the input bias current Ib, the first capacitor C1, and the off-time Toff of the power tube MN0, specifically,
therefore, the sampled voltage Vc2 is proportional to the off-time Toff of the power tube MN 0. Fig. 3 shows the timing of sampling the voltage Vc2 and the voltage Vc1 (the voltage of the common terminal of the first switch, the second switch, the third switch, and the capacitor C1).
The voltage-to-current conversion circuit 103 may be used to generate an output bias current IBfb to feed to a voltage divider circuit in the non-isolated floating-ground AC-DC buck converter based on the sampled voltage Vc2 generated by the sample-and-hold circuit 102. The output bias current IBfb generated by the voltage-to-current conversion circuit 103 is proportional to the sample voltage Vc2 generated by the sample-and-hold circuit 102, specifically, IBfb ═ Vc 2/Rb. As described above, since the sampled voltage Vc2 generated by the sample-and-hold circuit 102 is proportional to the off-time Toff of the power transistor MN0, the output bias current IBfb generated by the voltage-current conversion circuit 103 is proportional to the off-time Toff of the power transistor MN 0. Further, the adjustment voltage Vdd satisfies the following equation:
therefore, as the off-time Toff of the power transistor MN0 increases, the output bias current IBfb increases, and the regulated voltage Vdd decreases, i.e., the off-time Toff of the power transistor MN0 is inversely proportional to the regulated voltage Vdd. As mentioned above, the load current Iload is inversely proportional to the off-time Toff of the power transistor MN0, and therefore, the load current Iload is proportional to the regulated voltage Vdd.
Therefore, the apparatus 100 for improving the output voltage load regulation of the switching power supply according to an embodiment of the present disclosure may convert the off-time Toff of the power transistor MN0 into the output bias current IBfb, and feed the output bias current IBfb back to the Vdd feedback voltage-dividing resistor string of the voltage-dividing circuit in the non-isolated floating-ground AC-DC buck converter, so as to adjust the regulation voltage Vdd (the off-time Toff of the power transistor MN0 is inversely proportional to the regulation voltage Vdd), and further adjust the output voltage Vout (because the output voltage Vout depends on the regulation voltage Vdd as described above, for example, the output voltage Vout is positively correlated to the regulation voltage Vdd). As described above, since the load current Iload is inversely proportional to the off-time Toff of the power transistor MN0 and the off-time Toff of the power transistor MN0 is inversely proportional to the regulated voltage Vdd, the load current Iload is proportional to the regulated voltage Vdd. Therefore, when the output voltage Vout increases with a decrease in the load current Iload, the adjustment voltage Vdd decreases with a decrease in the load current Iload, so that the output voltage Vout decreases (because the output voltage Vout depends on the adjustment voltage Vdd as described above, for example, the output voltage Vout is positively correlated with the adjustment voltage Vdd), thereby making it possible to compensate for a variation in the output voltage Vout with the load (i.e., compensate for a portion of the output voltage Vout that increases with a decrease in the load current Iload). Assuming that the freewheeling diode D1 and the charging diode D2 in the step-down circuit 230 have the same voltage drop when the load resistance Rload changes, the apparatus 100 for improving the output voltage load regulation of the switching power supply according to an embodiment of the present disclosure can completely compensate the change of the output voltage Vout with the load, thereby improving the output voltage load regulation of the non-isolated floating AC-DC step-down converter.
It should be noted that, for convenience of explanation and description, fig. 2 shows a schematic structural diagram of an example application of the apparatus 100 for improving the output voltage load regulation rate of the switching power supply according to an embodiment of the present disclosure to the non-isolated floating AC-DC buck converter, and it is understood that this is only exemplary and not limiting, and the apparatus 100 for improving the output voltage load regulation rate of the switching power supply according to an embodiment of the present disclosure may be equally applied to other switching power supplies, such as the non-isolated floating AC-DC buck-boost converter and the like.
Fig. 4 shows a schematic diagram of an output voltage of an example application in which the apparatus 100 for improving an output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure is applied to a non-isolated floating-ground AC-DC buck converter. As shown in fig. 4, the dotted line represents the case where the device for improving the load regulation of the output voltage according to the embodiment of the present disclosure is not applied to the non-isolated floating AC-DC buck converter to compensate the output voltage (i.e., no compensation is applied to the output voltage, which will be referred to as no compensation in the following and in fig. 4), and the solid line represents the case where the device for improving the load regulation of the output voltage according to the embodiment of the present disclosure is applied to the non-isolated floating AC-DC buck converter to compensate the output voltage (i.e., compensation is applied to the output voltage, which will be referred to as compensation in the following and in fig. 4). As can be seen from fig. 4, in the case of no compensation, the regulated voltage Vdd is constant as the load current Iload changes, and the output voltage Vout increases as the load current Iload decreases, so that the output voltage load regulation ratio is not ideal. While with compensation, the adjustment voltage Vdd decreases with a decrease in the load current Iload as the load current Iload changes, so that the output voltage Vout that would increase with a decrease in the load current Iload without compensation (because the output voltage Vout depends on the adjustment voltage Vdd as described before, e.g., the output voltage Vout is positively correlated with the adjustment voltage Vdd) can be compensated such that the output voltage Vout does not change with the load current Iload, i.e., the output voltage Vout can remain constant. Therefore, as can be seen from fig. 4, in the case of applying the apparatus for improving the output voltage load regulation rate of the switching power supply according to the embodiment of the present disclosure, the output voltage is stable, and the regulation voltage (such as the regulation voltage Vdd) can be reduced at a light load (i.e., a relatively small load), so that the output voltage load regulation rate in the full load range is effectively improved. In addition, the apparatus for improving the output voltage load regulation rate of the switching power supply according to the embodiment of the present disclosure also has advantages of short setup time of the circuit for controlling the output voltage load regulation rate, simple structure of the circuit, and the like.
Fig. 5 shows a flow diagram of a method for improving an output voltage load regulation rate of a switching power supply according to one embodiment of the present disclosure. As shown in fig. 5, in step 501, a sample-and-hold logic signal is generated based on a PWM signal from a power tube in a switching power supply. As an example, the sample-and-hold logic signal may be generated based on a PWM signal from a gate of a power tube in a switching power supply. In one embodiment, the sample-and-hold logic signals may include a first sample-and-hold logic signal Sq, a second sample-and-hold logic signal Sd, and a third sample-and-hold logic signal Sc. As an example, fig. 3 shows the timing of the PWM signal and the sample-and-hold logic signals Sq, Sd, and Sc of the gate of the power tube in the switching power supply, where Toff _ min represents the minimum off time of the power tube in the switching power supply. In one embodiment, the switching power supply may be a non-isolated floating earth alternating current-direct current (AC-DC) converter (e.g., a buck converter, a buck-boost converter, etc.). In one embodiment, the power transistor in the switching power supply may be an N-channel type metal oxide semiconductor field effect (MOS) transistor.
In step 502, sampling is performed based on the sample-and-hold logic signal to generate a sampled voltage. The sampling voltage is proportional to the off-time Toff of the power tube.
In step 503, an output bias current is generated based on the sampled voltage to feed to a voltage divider circuit in the switching power supply. The output bias current is proportional to the sampling voltage. As mentioned above, since the sampling voltage is proportional to the off-time Toff of the power tube, the output bias current is proportional to the off-time Toff of the power tube. The method for improving the output voltage load regulation rate of the switching power supply according to one embodiment of the present disclosure corresponds to the apparatus for improving the output voltage load regulation rate of the switching power supply according to one embodiment of the present disclosure as described in detail above in conjunction with fig. 1-4, and certain details will not be repeated for the sake of brevity.
Therefore, according to the method for improving the load regulation rate of the output voltage of the switching power supply according to an embodiment of the present disclosure, the off-time Toff of the power transistor may be converted into the output bias current, and the output bias current is fed back to the regulation voltage of the voltage dividing circuit in the switching power supply (for example, the regulation voltage Vdd as described above in conjunction with fig. 2) and fed back to the voltage dividing resistor string, so that the regulation voltage may be adjusted (the off-time Toff of the power transistor is inversely proportional to the regulation voltage), and the output voltage may be further adjusted (for example, the output voltage Vout as described above in conjunction with fig. 2). As previously described, since the load current (e.g., the load current Iload described above in connection with fig. 2) is inversely proportional to the off-time Toff of the power tube, and the off-time Toff of the power tube is inversely proportional to the regulation voltage, the load current is proportional to the regulation voltage. Therefore, when the output voltage increases with a decrease in the load current, the regulation voltage decreases with a decrease in the load current, so that the output voltage decreases (because the output voltage depends on the regulation voltage as described above, for example, the output voltage is positively correlated with the regulation voltage), whereby it is possible to compensate for a variation in the output voltage with the load (i.e., compensate for a portion in which the output voltage increases with a decrease in the load current), thereby improving the output voltage load regulation rate of the switching power supply.
The present disclosure may be embodied in other specific forms without departing from its spirit or essential characteristics. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the disclosure being defined by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Claims (8)
1. An apparatus for improving an output voltage load regulation rate of a switching power supply, comprising:
sample-and-hold logic to generate a sample-and-hold logic signal based on a Pulse Width Modulation (PWM) signal from a power transistor in the switching power supply;
a sample-and-hold circuit to sample based on the sample-and-hold logic signal to generate a sampled voltage; and
a voltage-to-current conversion circuit to generate an output bias current based on the sampled voltage to feed to a voltage divider circuit in the switching power supply.
2. The apparatus of claim 1, wherein the sampled voltage is proportional to an off-time of the power tube and the output bias current is proportional to the sampled voltage.
3. The apparatus of claim 1, wherein the sample-and-hold circuit comprises a capacitance, a switch, and an input bias current, wherein the switch is turned on and off based on the sample-and-hold logic signal.
4. The apparatus of claim 3, wherein the sample-and-hold logic signal comprises a first sample-and-hold logic signal, a second sample-and-hold logic signal, and a third sample-and-hold logic signal, and the switches comprise a first switch, a second switch, and a third switch, wherein the first switch is turned on and off based on the first sample-and-hold logic signal, the second switch is turned on and off based on the second sample-and-hold logic signal, and the third switch is turned on and off based on the third sample-and-hold logic signal.
5. The apparatus of claim 4, wherein the capacitance comprises a first capacitance and a second capacitance, and the sampled voltage is calculated based on the input bias current, the first capacitance, and an off-time of the power tube.
6. A method for improving an output voltage load regulation rate of a switching power supply, comprising:
generating a sample-and-hold logic signal based on a Pulse Width Modulation (PWM) signal from a power tube in the switching power supply;
sampling based on the sample-and-hold logic signal to generate a sampled voltage; and
generating an output bias current based on the sampled voltage for feeding to a voltage divider circuit in the switching power supply.
7. The method of claim 6, wherein the sampled voltage is proportional to an off-time of the power tube and the output bias current is proportional to the sampled voltage.
8. The method of claim 6, wherein the sample-and-hold logic signal comprises a first sample-and-hold logic signal, a second sample-and-hold logic signal, and a third sample-and-hold logic signal.
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| CN202010958413.6A CN112072938B (en) | 2020-09-14 | 2020-09-14 | Apparatus and method for improving output voltage load regulation rate of switching power supply |
| TW109136945A TWI749824B (en) | 2020-09-14 | 2020-10-23 | Device and method for improving output voltage load regulation rate of switching power supply |
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| CN112072938B (en) | 2022-03-08 |
| TWI749824B (en) | 2021-12-11 |
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