CN112072615A - Topological structure of motor high-side power supply control circuit and fault positioning method thereof - Google Patents

Abstract

The invention provides a topological structure of a high-side power supply control circuit of a motor and a fault positioning method thereof, which can meet the safety shutdown function of a load motor in an upper power output state, an overvoltage state, an overcurrent state and a system internal fault through the topological structure, and can monitor the running state of the load motor in real time. In addition, the motor control system has the advantages of simple circuit structure, less components, low cost, strong compatibility, high safety and reliability, and can meet the working requirements of motors with different loads by replacing components with different parameters, and can be suitable for motor control systems in the fields of industrial automation and vehicle-mounted motors.

Description

Topological structure of motor high-side power supply control circuit and fault positioning method thereof

Technical Field

The invention relates to the field of power supplies, in particular to a topological structure of a motor high-side power supply control circuit and a fault positioning method thereof.

Background

With the continuous development of society and the emergence of new technologies, the product design concept of green energy conservation, safety and reliability is continuously popularized, and a plurality of new energy technologies are rapidly developed to gradually replace fossil energy, such as the development of new energy automobiles. In addition, along with the development of new energy, higher and wider requirements are placed on the energy-saving safety of electric equipment.

The motor control technology developed by the green energy-saving, safe and reliable concepts goes deep into various fields of human life, and the stability and the safety of a high-side power supply control circuit of a motor influence the life and property safety of product users. However, the existing motor high-side power control has the problems of single function and single fault safety monitoring and protecting function.

Disclosure of Invention

The invention aims to solve the defects in the prior art, and provides a topological structure of a motor high-side power supply control circuit and a fault positioning method thereof.

In order to achieve the purpose, the invention adopts the following technical scheme: a motor high-side power supply control circuit topological structure is characterized in that a main circuit module is used for supplying power to a load, an overvoltage protection and release module is used for realizing power-off protection when voltage is overhigh and releasing the power-off protection function after the voltage is normal, and an overcurrent protection and release module is used for power-off protection when current is overhigh and releasing the power-off protection function after the voltage is normal;

the main circuit module and the overvoltage protection and release module are connected through a power supply end Vin and a No. 1 end of a diode D1, the No. 1 end of a resistor R4 and the No. 1 end of a resistor R6 of the main circuit module are connected with an overvoltage protection and release module triode Q1 and an overcurrent protection and release module triode Q2 to realize on-off, and the No. 1 end and the No. 2 end of a sampling resistor RS of the main circuit module are respectively connected with a No. 2 end of an overcurrent protection and release module resistor R13 and a No. 2 end of a resistor R14, so that the connection of three functional modules is realized;

the No. 2 end of the main circuit module resistor R5, the No. 1 end of the overvoltage protection and removal module capacitor C1, the E end of the overvoltage protection and removal module triode Q1, the E end of the overcurrent protection and removal module triode Q2 and the No. 1 end of the overcurrent protection and removal module resistor R9 are all grounded.

Furthermore, when the main circuit module and the power management chip have faults, the load needs to be subjected to emergency power-off processing, when one of the MCU control output end and the power management fault function output end outputs a low level in such a situation, the output port 3 of the and gate logic chip U1 outputs a low level, since no potential difference is formed between the resistors R4 and R5, the potential applied to the port 1 of the resistor R6 is low, the potential connected to the port B of the triode Q3 through the port 2 of the resistor R6 is low, the triode Q3 is in a closed state, so that the pole E and the pole C of the triode Q3 are not connected, since a current loop is not formed, the potential of the port D of the P-channel fet Q5 is equal to the potential of the port G, the voltage does not reach the turn-on voltage of the resistor Q5, the fet Q5 is turned off, and the load current cannot act on the load resistor through the transistor Q5, so that the load cannot work normally.

Further, the overvoltage protection and release module comprises a Zener diode Z1 in conduction state when the voltage Vin at the output end exceeds the specified voltage value, the current forms a loop through D1, Z1, R1 and R2, because the current flows through R2 and forms a potential difference between port 1 and port 2 of a resistor R2 to act on port 3 of a resistor R3, so that the voltage of port B connected with a triode Q1 through port 1 of a resistor R3 is larger than the turn-on voltage of a triode Q1, the E pole and the C pole of a triode Q1 are conducted, the port 1 of a resistor R6 connected with port C of the triode Q1 is pulled down, the triode Q3 is in a turn-off state, the E pole and the C pole of the triode Q3 are not conducted, because the current loop is not formed, the potential of the port D and the port G of a P-channel field effect transistor Q5 is equal to the turn-on voltage of Q5, when the field effect transistor Q5 is turned off, the load current can not act on the load resistor RL through the Q5, so that the load can not work normally;

when the supply voltage Vin returns from the abnormal state to the normal state, the zener diode Z1 is not turned on, and the transistor Q1 is in the off state.

Further, the overcurrent protection and release module comprises a voltage stabilizing diode Z2 which is turned on when a current signal passes through the sampling resistor RS, the resistors R13 and R14 and a voltage signal converted by the differential operational amplifier U2 exceeds a specified value, the triode Q2 is turned on, the field effect transistor Q5 is turned off, and a load current cannot act on the load resistor RL through the Q5, so that the load cannot normally work.

Further, an RC filter circuit is formed by the resistor R1, the capacitor C1 and the resistor R2, and the influence of the Vin on the product stability due to a false triggering phenomenon caused by transient voltage interference is eliminated.

Further, reverse connection protection of the circuit topology is achieved through reverse connection prevention of the diode D1 and a body diode inside the N-channel field effect transistor Q4.

The structure circuit fault positioning method comprises the following steps: on the basis of the circuit topological structure, a resistor R15, a resistor R16 and a power supply voltage acquisition 1 are sequentially connected to a power supply Vin, a resistor R17, a resistor R18 and a power supply voltage acquisition 2 are sequentially connected to the S end of a P-channel field-effect transistor Q5, a resistor R17, a resistor R18 and a power supply line current acquisition are sequentially connected to a voltage stabilizing diode Z2, and on the basis, the power supply voltage acquisition 1, the power supply voltage acquisition 2, the power supply current acquisition and MCU control output and power supply management system function safety output are compared to jointly position a fault area. And the fault area is jointly positioned by comparing power supply voltage acquisition 1, power supply voltage acquisition 2, power supply current acquisition and MCU control output and power supply management system function safety output.

(1) When a short circuit fault occurs in the Z1 regulator in zone 1:

the voltage collected by the power supply voltage collection 1 can be analyzed to be lower than the normal range by the norton current theorem. When a short circuit occurs in Z1, the voltage of the B electrode of the transistor Q1 reaches the on voltage of the transistor, the E electrode of the transistor Q1 is conducted with the C electrode, the voltage at the port 1 side of the resistor R4 is pulled low, although the power current collection and MCU control output and the power management system function safety output are high at this time, the U1 and gate output port are high, the B electrode of the transistor Q3 is pulled low, so that the C electrode and the E electrode of the transistor Q3 are not conducted, the G electrode potential of the P-MOSFET is equal to the S electrode potential, and the P-MOSFET is in a closed state, so that the voltage collected by the power voltage collection 2 is 0, and the current cannot form a loop due to the P-MOSFET being closed, so that the power current collection is 0, and thus the device in the location area 1Z1 fails.

(2) When the B pole and the C pole of the transistor Q2 in the area 2 generate short-circuit fault:

at the moment, the power current acquisition and MCU control output and the power management system function safety output are high, the U1 and the gate output port are high, the voltage of the port 1 of the acting and resistor R4 is high, and the port 1 of the acting and resistor R8 is high level through the C pole and the B pole of the triode Q2. The voltage is divided by the voltage of R8 and R9 and acts on the No. 2 port of the voltage regulator tube Z2, and the voltage of the No. 1 port acting on the resistor R10 through the voltage regulator tube Z2 is larger than the voltage in the normal range. At this time, since the port 1 of the R6 is always at a high level, the voltage of the B electrode of the triode Q3 is greater than the turn-on voltage, the C electrode and the E electrode of the triode Q3 are conducted, the P-MOSFET is conducted, and the output of the power supply voltage acquisition 2 is a high level.

(3) When a failure occurs inside the U2 chip of region 3:

regardless of how the output is controlled to be always level.

(4) Failure of zone 4:

if the chip of the AND gate U1 breaks down, the No. 3 output end of the U1 is always at low level, so that the P-MOSFET is turned off;

if the D pole and the S pole of the P-MOSFET have short-circuit faults, although the power supply voltage acquisition 1, the power supply voltage acquisition 2 and the power supply current acquisition are in normal ranges, the P-MOSFET cannot be controlled by the MCU control output and the power supply management system function safety output.

Compared with the prior art, the invention has the advantages and positive effects that: the problem of present motor high side power control have the function singleness, fail safe monitoring and protect function singleness is improved, realized cutting off the high side power under the power supply is unusual, motor operation is unusual, the inside abnormal condition of control unit, effectively prevent the later stage load because the short circuit causes the power consumption to increase even the accident of starting a fire to take place, also improve product maintenance efficiency and reduction product single point monitoring fault rate simultaneously greatly.

Drawings

FIG. 1 is a block diagram of a high-side power control circuit of the motor of the present invention;

FIG. 2 is a block diagram of a high-side power control circuit of the motor in a reverse connection state according to the present invention;

FIG. 3 is a fault partition block diagram of the motor high side power control circuit of the present invention;

illustration of the drawings: R1-R18 are resistors, C1 is a capacitor, D1 is a diode, Z1-Z3 is a zener diode, Q1-Q3 is an NPN-type triode, Q4 is an N-enhancement channel fet, Q5 is a P-channel enhancement fet, U1 is an and logic chip, RS is a sampling resistor, RL is a load resistor, and U2 is a differential operational amplifier (in this topology, a differential operational amplifier of type INA195 dbaqvrq 1 is used).

Detailed Description

In order that the above objects, features and advantages of the present invention can be more clearly understood, the present invention will be further described with reference to the accompanying drawings and examples. It should be noted that the embodiments and features of the embodiments of the present application may be combined with each other without conflict.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those specifically described herein, and thus the present invention is not limited to the specific embodiments of the present disclosure.

Embodiment 1, as shown in fig. 1 to 3, the present invention provides a topology structure of a high-side power control circuit of a motor and a fault location method thereof, where a main circuit module is used for supplying power to a load, an overvoltage protection and release module is used to implement power-off protection when voltage is too high and release a power-off protection function when voltage is normal, and an overcurrent protection and release module is used to perform power-off protection when current is too high and release a power-off protection function when voltage is normal;

the main circuit module and the overvoltage protection and release module are connected through a power supply end Vin and a No. 1 end of a diode D1, the No. 1 end of a resistor R4 and the No. 1 end of a resistor R6 of the main circuit module are connected with an overvoltage protection and release module triode Q1 and an overcurrent protection and release module triode Q2 to realize on-off, and the No. 1 end and the No. 2 end of a sampling resistor RS of the main circuit module are respectively connected with a No. 2 end of an overcurrent protection and release module resistor R13 and a No. 2 end of a resistor R14, so that the connection of three functional modules is realized;

the No. 2 end of the main circuit module resistor R5, the No. 1 end of the overvoltage protection and removal module capacitor C1, the E end of the overvoltage protection and removal module triode Q1, the E end of the overcurrent protection and removal module triode Q2 and the No. 1 end of the overcurrent protection and removal module resistor R9 are all grounded.

Furthermore, when the main circuit module and the power management chip have faults, the load needs to be subjected to emergency power-off processing, when one of the MCU control output end and the power management fault function output end outputs a low level in such a situation, the output port 3 of the and gate logic chip U1 outputs a low level, since no potential difference is formed between the resistors R4 and R5, the potential applied to the port 1 of the resistor R6 is low, the potential connected to the port B of the triode Q3 through the port 2 of the resistor R6 is low, the triode Q3 is in a closed state, so that the pole E and the pole C of the triode Q3 are not connected, since a current loop is not formed, the potential of the port D of the P-channel fet Q5 is equal to the potential of the port G, the voltage does not reach the turn-on voltage of the resistor Q5, the fet Q5 is turned off, and the load current cannot act on the load resistor through the transistor Q5, so that the load cannot work normally.

Further, the overvoltage protection and release module comprises a Zener diode Z1 in conduction state when the voltage Vin at the output end exceeds the specified voltage value, the current forms a loop through D1, Z1, R1 and R2, because the current flows through R2 and forms a potential difference between port 1 and port 2 of a resistor R2 to act on port 3 of a resistor R3, so that the voltage of port B connected with a triode Q1 through port 1 of a resistor R3 is larger than the turn-on voltage of a triode Q1, the E pole and the C pole of a triode Q1 are conducted, the port 1 of a resistor R6 connected with port C of the triode Q1 is pulled down, the triode Q3 is in a turn-off state, the E pole and the C pole of the triode Q3 are not conducted, because the current loop is not formed, the potential of the port D and the port G of a P-channel field effect transistor Q5 is equal to the turn-on voltage of Q5, when the field effect transistor Q5 is turned off, the load current can not act on the load resistor RL through the Q5, so that the load can not work normally;

when the supply voltage Vin returns from the abnormal state to the normal state, the zener diode Z1 is not turned on, and the transistor Q1 is in the off state.

Further, the overcurrent protection and release module comprises a voltage stabilizing diode Z2 which is turned on when a current signal passes through the sampling resistor RS, the resistors R13 and R14 and a voltage signal converted by the differential operational amplifier U2 exceeds a specified value, the triode Q2 is turned on, the field effect transistor Q5 is turned off, and a load current cannot act on the load resistor RL through the Q5, so that the load cannot normally work.

Further, an RC filter circuit is formed by the resistor R1, the capacitor C1 and the resistor R2, and the influence of the Vin on the product stability due to a false triggering phenomenon caused by transient voltage interference is eliminated.

Further, reverse connection protection of the circuit topology is achieved through reverse connection prevention of the diode D1 and a body diode inside the N-channel field effect transistor Q4.

Aiming at the circuit structure diagram, the fault location method can be further explained by combining a fault location table in table 1 and a power supply management system in fig. 3, on the basis of the circuit topological structure, a resistor R15, a resistor R16 and a power supply voltage acquisition 1 are sequentially connected to a power supply Vin, a resistor R17, a resistor R18 and a power supply voltage acquisition 2 are sequentially connected to the S end of a P-channel field effect transistor Q5, a resistor R17, a resistor R18 and a power supply line current acquisition are sequentially connected to a voltage stabilizing diode Z2, and on the basis, the power supply voltage acquisition 1, the power supply voltage acquisition 2, the power supply current acquisition and MCU control output and the power supply management system function safety output are compared to jointly locate a fault area.

(1) When a short circuit fault occurs in the Z1 regulator in zone 1:

the voltage collected by the power supply voltage collection 1 can be analyzed to be lower than the normal range by the norton current theorem. When a short circuit occurs in Z1, the voltage of the B electrode of the transistor Q1 reaches the on voltage of the transistor, the E electrode of the transistor Q1 is conducted with the C electrode, the voltage at the port 1 side of the resistor R4 is pulled low, although the power current collection and MCU control output and the power management system function safety output are high at this time, the U1 and gate output port are high, the B electrode of the transistor Q3 is pulled low, so that the C electrode and the E electrode of the transistor Q3 are not conducted, the G electrode potential of the P-MOSFET is equal to the S electrode potential, and the P-MOSFET is in a closed state, so that the voltage collected by the power voltage collection 2 is 0, and the current cannot form a loop due to the P-MOSFET being closed, so that the power current collection is 0, and thus the device in the location area 1Z1 fails.

(2) When the B pole and the C pole of the transistor Q2 in the area 2 generate short-circuit fault:

at the moment, the power current acquisition and MCU control output and the power management system function safety output are high, the U1 and the gate output port are high, the voltage of the port 1 of the acting and resistor R4 is high, and the port 1 of the acting and resistor R8 is high level through the C pole and the B pole of the triode Q2. The voltage is divided by the voltage of R8 and R9 and acts on the No. 2 port of the voltage regulator tube Z2, and the voltage of the No. 1 port acting on the resistor R10 through the voltage regulator tube Z2 is larger than the voltage in the normal range. At this time, since the port 1 of the R6 is always at a high level, the voltage of the B electrode of the triode Q3 is greater than the turn-on voltage, the C electrode and the E electrode of the triode Q3 are conducted, the P-MOSFET is conducted, and the output of the power supply voltage acquisition 2 is a high level.

(3) When a failure occurs inside the U2 chip of region 3:

regardless of how the output is controlled to be always level.

(4) Failure of zone 4:

if the chip of the AND gate U1 breaks down, the No. 3 output end of the U1 is always at low level, so that the P-MOSFET is turned off;

if the D pole and the S pole of the P-MOSFET have short-circuit faults, although the power supply voltage acquisition 1, the power supply voltage acquisition 2 and the power supply current acquisition are in normal ranges, the P-MOSFET cannot be controlled by the MCU control output and the power supply management system function safety output.

In conclusion, the method can accurately judge the fault area of the topological structure of the high-side power supply control circuit of the motor.

Table 1: fault area table for circuit topology

The above description is only a preferred embodiment of the present invention, and not intended to limit the present invention in other forms, and any person skilled in the art may apply the above modifications or changes to the equivalent embodiments with equivalent changes, without departing from the technical spirit of the present invention, and any simple modification, equivalent change and change made to the above embodiments according to the technical spirit of the present invention still belong to the protection scope of the technical spirit of the present invention.

Claims (8)

1. A topological structure of a high-side power supply control circuit of a motor comprises a main circuit module, an overvoltage protection and release module and an overcurrent protection and release module, and is characterized in that the main circuit module is used for supplying power to a load, the overvoltage protection and release module is used for realizing power-off protection when the voltage is overhigh and releasing the power-off protection function when the voltage is normal, and the overcurrent protection and release module is used for realizing power-off protection when the current is overhigh and releasing the power-off protection function when the voltage is normal;

the main circuit module and the overvoltage protection and release module are connected through a power supply end Vin and a No. 1 end of a diode D1, the No. 1 end of a resistor R4 and the No. 1 end of a resistor R6 of the main circuit module are connected with an overvoltage protection and release module triode Q1 and an overcurrent protection and release module triode Q2 to realize on-off, and the No. 1 end and the No. 2 end of a sampling resistor RS of the main circuit module are respectively connected with a No. 2 end of an overcurrent protection and release module resistor R13 and a No. 2 end of a resistor R14, so that the connection of three functional modules is realized;

the No. 2 end of the main circuit module resistor R5, the No. 1 end of the overvoltage protection and removal module capacitor C1, the E end of the overvoltage protection and removal module triode Q1, the E end of the overcurrent protection and removal module triode Q2 and the No. 1 end of the overcurrent protection and removal module resistor R9 are all grounded.

2. The motor high-side power control circuit topology of claim 1, wherein: when the main circuit module normally operates, when the MCU controls the output end and the output port of the power management fault function to be set high, the output port 3 of the AND logic chip U1 is in high level and is connected with the port 2 of the resistor R4, so that the potential after the voltage division by the R4 and the R5 acts on the port 1 of the resistor R6, the port 2 of the resistor R6 is connected with the port B of the triode Q3, the voltage input to the port B of the triode Q3 is greater than the turn-on voltage of the triode Q3, the electrode E and the electrode C of the triode Q3 are conducted, the voltage is connected with the port G of the P-channel field effect tube Q5 through the resistor R7, because the voltage difference between the port D and the port G of the Q5 is greater than the turn-on voltage of the Q5, the port D of the Q5 is conducted with the port S, the current Vin passes through the input end and acts on the port 2 of the load resistor RL through the FET Q4, the P5 and the sampling resistor, whereby the load is operated.

3. The motor high-side power control circuit topology of claim 1, wherein: when the internal of the main circuit module and the power management chip are in fault, the load needs to be subjected to emergency power-off processing, when one of the MCU control output end and the power management fault function output end outputs low level under the condition, the output end 3 of the AND gate logic chip U1 outputs low level, since no potential difference is formed between the resistors R4 and R5, the potential at the port No. 1 applied to the resistor R6 is low, the potential connected with the port No. 2 of the resistor R6 and the port No. B of the triode Q3 is low potential, the triode Q3 is in a closed state, so that the electrode E and the electrode C of the triode Q3 are not conducted, because no current loop is formed, the potentials of the port D and the port G of the P-channel field-effect transistor Q5 are equal, the voltage does not reach the turn-on voltage of Q5, the field-effect transistor Q5 is turned off, and the load current cannot act on the load resistor RL through the Q5, so that the load cannot work normally.

4. The motor high-side power control circuit topology of claim 1, wherein: the overvoltage protection and release module comprises a voltage stabilizing diode Z1 which is in a conducting state when the voltage Vin at the output end exceeds a specified voltage value, current forms a loop through D1, Z1, R1 and R2, because the current flows through a loop formed by R2 and formed by a port 1 and a port 2 of a resistor R2, the potential difference is formed and acts on a port 3 of a resistor R3, the voltage of a port B connected with a triode Q1 through the port 1 of a resistor R3 is larger than the turn-on voltage of a triode Q1, an electrode E and an electrode C of the triode Q1 are conducted, the port 1 of a resistor R6 connected with the port C of the triode Q1 is pulled down, the triode Q3 is in a turn-off state, the electrode E and the electrode C of the triode Q3 are not conducted, because the current loop is not formed, the potential of the port D and the port G of a P-channel field effect transistor Q5 is equal to the turn-on voltage of 685Q 5, and the field effect transistor Q5 is, the load current cannot act on the load resistor RL through the Q5, so that the load cannot work normally;

when the supply voltage Vin returns from the abnormal state to the normal state, the zener diode Z1 is not turned on, and the transistor Q1 is in the off state.

5. The motor high-side power control circuit topology of claim 1, wherein: the overcurrent protection and release module comprises a voltage stabilizing diode Z2 which is conducted when a current signal passes through a sampling resistor RS, resistors R13 and R14 and a voltage signal converted by a differential operational amplifier U2 exceeds a specified value, a triode Q2 is conducted, a field effect transistor Q5 is closed, and a load current cannot act on a load resistor RL through Q5, so that the load cannot normally work.

6. The motor high-side power supply control circuit topology structure of claim 1 or 4, characterized in that: an RC filter circuit is formed by the resistor R1, the capacitor C1 and the resistor R2, and the influence of the false triggering phenomenon of Vin caused by transient voltage interference on the stability of a product is eliminated.

7. The motor high-side power control circuit topology of claim 1, 2, 3 or 4, wherein: reverse connection protection of the circuit topology is achieved through reverse connection prevention of the diode D1 and a body diode inside the N-channel field effect transistor Q4.

8. The topology structure of the high-side power supply control circuit of the motor and the fault location method thereof according to claim 1 are characterized in that: on the basis of the circuit topological structure, a resistor R15, a resistor R16 and a power supply voltage acquisition 1 are sequentially connected to a power supply Vin, a resistor R17, a resistor R18 and a power supply voltage acquisition 2 are sequentially connected to the S end of a P-channel field-effect transistor Q5, a resistor R17, a resistor R18 and a power supply line current acquisition are sequentially connected to a voltage stabilizing diode Z2, and on the basis, the power supply voltage acquisition 1, the power supply voltage acquisition 2, the power supply current acquisition and MCU control output and power supply management system function safety output are compared to jointly position a fault area.

(1) When a short circuit fault occurs in the Z1 regulator in zone 1:

the voltage collected by the power supply voltage collection 1 can be analyzed to be lower than the normal range by the norton current theorem. When a short circuit occurs in Z1, the voltage of the B electrode of the transistor Q1 reaches the on voltage of the transistor, the E electrode of the transistor Q1 is conducted with the C electrode, the voltage at the port 1 side of the resistor R4 is pulled low, although the power current collection and MCU control output and the power management system function safety output are high at this time, the U1 and gate output port are high, the B electrode of the transistor Q3 is pulled low, so that the C electrode and the E electrode of the transistor Q3 are not conducted, the G electrode potential of the P-MOSFET is equal to the S electrode potential, and the P-MOSFET is in a closed state, so that the voltage collected by the power voltage collection 2 is 0, and the current cannot form a loop due to the P-MOSFET being closed, so that the power current collection is 0, and thus the device in the location area 1Z1 fails.

(2) When the B pole and the C pole of the transistor Q2 in the area 2 generate short-circuit fault:

at the moment, the power current acquisition and MCU control output and the power management system function safety output are high, the U1 and the gate output port are high, the voltage of the port 1 of the acting and resistor R4 is high, and the port 1 of the acting and resistor R8 is high level through the C pole and the B pole of the triode Q2. The voltage is divided by the voltage of R8 and R9 and acts on the No. 2 port of the voltage regulator tube Z2, and the voltage of the No. 1 port acting on the resistor R10 through the voltage regulator tube Z2 is larger than the voltage in the normal range. At this time, since the port 1 of the R6 is always at a high level, the voltage of the B electrode of the triode Q3 is greater than the turn-on voltage, the C electrode and the E electrode of the triode Q3 are conducted, the P-MOSFET is conducted, and the output of the power supply voltage acquisition 2 is a high level.

(3) When a failure occurs inside the U2 chip of region 3:

regardless of how the output is controlled to be always level.

(4) Failure of zone 4:

if the chip of the AND gate U1 breaks down, the No. 3 output end of the U1 is always at low level, so that the P-MOSFET is turned off;

if the D pole and the S pole of the P-MOSFET have short-circuit faults, although the power supply voltage acquisition 1, the power supply voltage acquisition 2 and the power supply current acquisition are in normal ranges, the P-MOSFET cannot be controlled by the MCU control output and the power supply management system function safety output.

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