CN112071886B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN112071886B CN112071886B CN202010981268.3A CN202010981268A CN112071886B CN 112071886 B CN112071886 B CN 112071886B CN 202010981268 A CN202010981268 A CN 202010981268A CN 112071886 B CN112071886 B CN 112071886B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
- H10K59/65—OLEDs integrated with inorganic image sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
Abstract
The application discloses a display panel and a display device. The display device comprises a first display area, a second display area and a display control unit, wherein the first display area is a light-transmitting display area and comprises a first sub-display area and a second sub-display area; the display panel includes: the array substrate comprises a first signal line and a second signal line; a light emitting function layer including a first sub-pixel and a second sub-pixel; the first signal line is located in the first sub-display area and electrically connected with the first sub-pixel, the second signal line is located in the second sub-display area and electrically connected with the second sub-pixel, and at least one of the first signal line and the second signal line is a non-transparent wire, so that a first diffraction spot generated when the light passes through the first sub-display area is intersected with a second diffraction spot generated when the light passes through the second sub-display area. According to the embodiment of the application, the diffraction problem of shooting under the screen can be weakened, and the imaging quality is improved.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a display device.
Background
With the rapid development of electronic devices, the requirements of users on screen occupation ratio are higher and higher, so that the comprehensive screen display of the electronic devices is concerned more and more in the industry.
In the related art, the display panel can be divided into a main screen area and an auxiliary screen area, and the auxiliary screen area can be used for placing photosensitive elements under the screen and can also meet the display function. However, the secondary screen area still retains film layer structures such as light-emitting devices and wiring structures, so that the diffraction problem of the screen shooting is caused when the screen lower photosensitive element shoots through the secondary screen area, and the imaging quality is reduced.
Disclosure of Invention
The embodiment of the application provides a display panel and a display device, which can weaken the diffraction problem of shooting under a screen and improve the imaging quality.
In a first aspect, an embodiment of the present application provides a display panel, which has a first display area, where the first display area is a transparent display area, and the first display area includes a first sub-display area and a second sub-display area; the display panel includes: the array substrate comprises a first signal line and a second signal line; the light-emitting function layer is positioned on one side of the array substrate and comprises first sub-pixels and second sub-pixels, the first sub-pixels are positioned in the first sub-display area, and the second sub-pixels are positioned in the second sub-display area; the first signal line is located in the first sub-display area and electrically connected with the first sub-pixel, the second signal line is located in the second sub-display area and electrically connected with the second sub-pixel, and at least one of the first signal line and the second signal line is a non-transparent wire, so that a first diffraction spot generated when the light passes through the first sub-display area is intersected with a second diffraction spot generated when the light passes through the second sub-display area.
In a possible implementation manner of the first aspect, the first signal line and the second signal line are both non-transparent traces, and an extending direction of the first signal line intersects an extending direction of the second signal line.
In a possible implementation manner of the first aspect, the array substrate further includes: the third signal line is positioned in the first sub-display area and electrically connected with the first sub-pixel, and the extension direction of the third signal line is different from that of the first signal line; the fourth signal line is positioned in the second sub-display area and electrically connected with the second sub-pixel, and the extending direction of the fourth signal line is different from that of the second signal line; the third signal line and the fourth signal line are transparent wires.
In one possible implementation manner of the first aspect, the first sub-pixel and the second sub-pixel have the same orthographic projection shape on the array substrate and each have a first central line and a second central line which are perpendicular to each other, and the first central line of the orthographic projection shape of the first sub-pixel is parallel to the first central line of the orthographic projection shape of the second sub-pixel.
In a possible implementation manner of the first aspect, the first sub-pixel and the second sub-pixel have the same orthographic projection shape on the array substrate and both have a first central line and a second central line which are perpendicular to each other; the first signal line is a non-transparent wiring, and a first central line of the first sub-pixel orthographic projection shape is parallel to the first signal line; and/or the second signal line is a non-transparent routing line, and the first central line of the orthographic projection shape of the second sub-pixel is parallel to the second signal line.
In a possible implementation manner of the first aspect, the display panel further includes a second display area, and the light transmittance of the first display area is greater than that of the second display area; the light-emitting functional layer further comprises third sub-pixels, the third sub-pixels are located in the second display area, and the orthographic projection shapes of the first sub-pixels, the second sub-pixels and the third sub-pixels on the array substrate are the same.
In one possible implementation manner of the first aspect, the first sub-pixel includes a first electrode, a first light-emitting layer, and a second electrode, which are stacked, and the first light-emitting layer is located between the first electrode and the second electrode; the second sub-pixel comprises a third electrode, a second luminous layer and a fourth electrode which are arranged in a stacked mode, and the second luminous layer is located between the third electrode and the fourth electrode; the third sub-pixel comprises a fifth electrode, a third luminous layer and a sixth electrode which are arranged in a stacked mode, and the third luminous layer is located between the fifth electrode and the sixth electrode; the orthographic projection shape of the first sub-pixel on the array substrate comprises an orthographic projection shape of the first electrode on the array substrate, the orthographic projection shape of the second sub-pixel on the array substrate comprises an orthographic projection shape of the third electrode on the array substrate, and the orthographic projection shape of the third sub-pixel on the array substrate comprises an orthographic projection shape of the fifth electrode on the array substrate.
In a possible implementation manner of the first aspect, the array substrate includes a first pixel circuit and a second pixel circuit, the first pixel circuit is electrically connected to the first sub-pixel, and the second pixel circuit is electrically connected to the second sub-pixel; the first pixel circuit is located in the first sub-display area, the second pixel circuit is located in the second sub-display area, orthographic projection shapes of the first pixel circuit and the second pixel circuit on the array substrate are provided with a third central line and a fourth central line which are perpendicular to each other, the third central line of the orthographic projection shape of the first pixel circuit is parallel to the first central line of the orthographic projection shape of the target sub-pixel, and the third central line of the orthographic projection shape of the second pixel circuit is parallel to the first central line of the orthographic projection shape of the second sub-pixel.
In one possible implementation manner of the first aspect, the first signal line and the second signal line include any one or more of a scan signal line, a reference voltage signal line, a light emission control signal line, a data signal line, and a power supply signal line.
In a second aspect, an embodiment of the present application provides a display device, which includes a photosensitive component and the display panel according to any one of the embodiments of the first aspect, wherein each of the first sub-display area and the second sub-display area corresponds to one photosensitive component.
According to the display panel and the display device provided by the embodiment of the application, the first signal line is located in the first sub-display area, the second signal line is located in the second sub-display area, at least one of the first signal line and the second signal line is a non-transparent line, and a slit can be formed between the non-transparent lines, so that a first diffraction spot generated when light passes through the first sub-display area is intersected with a second diffraction spot generated when the light passes through the second sub-display area. Therefore, initial images can be obtained through the first sub-display area and the second sub-display area respectively, the diffraction spots generated by the two sub-display areas are intersected, so that the positions of the diffraction spots in the two initial images are different, the two initial images can be further compared and synthesized, the image information of the position of the diffraction spot in one initial image is replaced by the image information of the diffraction-free spot or the weak diffraction spot in the corresponding position in the other initial image, and the diffraction spots in the synthesized images can be weakened or disappear due to the intersection of the two diffraction spots. Therefore, the diffraction problem of shooting under the screen can be weakened, and the imaging quality is improved.
Drawings
Other features, objects, and advantages of the present application will become apparent from the following detailed description of non-limiting embodiments thereof, when read in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof, and which are not to scale.
FIG. 1 illustrates a schematic structural diagram of a display panel according to an embodiment of the present application;
FIG. 2 shows an exemplary top view schematic of the region Q of FIG. 1;
FIG. 3 shows a schematic top view of another example of the region Q of FIG. 1;
FIG. 4 shows a schematic top view of the Q region of FIG. 1 for yet another example;
FIG. 5 shows a schematic top view of a further example of the region Q of FIG. 1;
FIG. 6 shows a schematic top view of a further example of the region Q of FIG. 1;
fig. 7 shows a schematic structural diagram of a display panel according to another embodiment of the present application;
FIG. 8 shows a schematic top view of the area W of FIG. 7 in accordance with yet another example;
FIG. 9 shows an exemplary cross-sectional view taken along line A-A of FIG. 8;
FIG. 10 shows a schematic top view of a further example of the region Q of FIG. 1;
FIG. 11 illustrates a schematic top view of a display device according to an embodiment of the present application;
fig. 12 shows a schematic cross-sectional view along the direction B-B in fig. 11.
Detailed Description
Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
Embodiments of a display panel and a display device are described below with reference to the accompanying drawings.
Embodiments of the present disclosure provide a display panel, which may be an Organic Light Emitting Diode (OLED) display panel.
Fig. 1 illustrates a schematic structural diagram of a display panel according to an embodiment of the present application, and fig. 2 to 6 illustrate schematic top views of a Q region in fig. 1.
The display panel 100 has a first display area AA 1. The first display area AA1 is a light transmissive display area. For example, the display regions of the display panel 100 may all be the first display region AA1, that is, the display panel 100 may be a light-transmissive display panel.
Herein, it is preferable that the light transmittance of the first display area AA1 is greater than or equal to 15%. To ensure that the light transmittance of the first display area AA1 is greater than 15%, even greater than 40%, or even higher, the light transmittance of the functional film layer of the display panel 100 in this embodiment may be greater than 50%, and even at least a portion of the functional film layer may be greater than 90%.
According to the display panel 100 of the embodiment of the application, the first display area AA1 is a transparent display area, so that the display panel 100 can integrate a photosensitive component on the back of the first display area AA1, for example, the photosensitive component of a camera is integrated under a screen, and meanwhile, the first display area AA1 can display a picture, thereby improving the display area of the display panel 100 and realizing the overall screen design of the display device.
The first display area AA1 includes a first sub-display area AA11 and a second sub-display area AA 12. The light transmittance of the first sub-display area AA11 and the second sub-display area AA12 may be the same. As shown in fig. 1, the first sub-display area AA11 and the second sub-display area AA12 may also be distributed along the second direction Y. As shown in fig. 7, the first sub-display area AA11 and the second sub-display area AA12 may also be distributed along the first direction X. The first direction X and the second direction Y intersect. Illustratively, the first direction X and the second direction Y are perpendicular. The first direction X may be a row direction of the display panel and the second direction Y may be a column direction of the display panel, wherein the row direction and the column direction may be interchanged.
The display panel 100 includes an array substrate 01 and a light emitting function layer 02 on one side of the array substrate 01. The array substrate 01 includes first and second signal lines 10 and 20. The light emitting function layer 02 includes a first subpixel 110 and a second subpixel 210. The plurality of first sub-pixels 110 are located in the first sub-display area AA11, and the plurality of second sub-pixels 210 are located in the second sub-display area AA 12.
The first signal line 10 is located in the first sub-display area AA11 and electrically connected to the first sub-pixel 110. The second signal line 20 is located in the second sub-display area AA12 and electrically connected to the second sub-pixel 210.
At least one of the first signal line 10 and the second signal line 20 is a non-transparent trace, a slit can be formed between the non-transparent traces, and light can be diffracted when passing through the slit. That is, the routing structures of the first sub-display area AA11 and the second sub-display area AA12 are different, so that the first diffraction spot generated by the light passing through the first sub-display area AA11 intersects the second diffraction spot generated by the light passing through the second sub-display area AA 12.
In the embodiment of the application, a first diffraction spot generated by light passing through the first sub-display area AA11 intersects with a second diffraction spot generated by light passing through the second sub-display area AA12, that is, the first sub-display area AA11 and the second sub-display area AA12 generate two different diffraction conditions, that is, the diffraction spots generated by the first sub-display area AA11 and the second sub-display area AA12 are different, so that the initial images can be subsequently acquired by respectively passing through the first sub-display area AA11 and the second sub-display area AA12, the positions of the diffraction spots in the two initial images are different due to the intersection of the diffraction spots generated by the two sub-display areas, and thus the two initial images can be further compared and synthesized, and the image information of the position of the diffraction spot in one initial image is replaced by the image information of the non-diffraction spot or the weak-diffraction spot in the other initial image, since the two diffraction spots intersect, the diffraction spots in the synthesized image can be weakened or disappear. Therefore, the diffraction problem of shooting under the screen can be weakened, and the imaging quality is improved.
Illustratively, the first sub-display area AA11 includes first sub-pixels 110 of at least three colors, and the second sub-display area AA12 includes second sub-pixels 210 of at least three colors. In the drawings, the same color sub-pixels are represented by the same filling pattern, and it is shown that the first sub-display area AA11 includes a red first sub-pixel 110R, a green first sub-pixel 110G, and a blue first sub-pixel 110B, and the second sub-display area AA12 includes a red second sub-pixel 210R, a green second sub-pixel 210G, and a blue second sub-pixel 210B.
The kinds of colors of the sub-pixels included in the first and second sub-display areas AA11 and AA12 may be adjusted according to design requirements of the display panel 100, and thus are not limited to the examples of the above-described embodiments. In addition, the arrangement of the sub-pixels in the first sub-display area AA11 and the second sub-display area AA12 is not limited to the examples in the drawings of the present application.
In some alternative embodiments, the extending directions of the first signal line 10 and the second signal line 20 may be the same or different. One of the first signal line 10 and the second signal line 20 may be a non-transparent trace, and the other one may be a transparent trace, and at this time, the extending direction of the first signal line 10 and the second signal line 20 may not be limited. For example, the first signal line 10 is a non-transparent trace, and the second signal line 20 is a transparent trace; alternatively, the first signal line 10 is a transparent trace, and the second signal line 20 is a non-transparent trace. In addition, the first signal line 10 and the second signal line 20 may be non-transparent traces, and at this time, the extending directions of the first signal line 10 and the second signal line 20 are crossed, so as to ensure that the first diffraction spot generated by the light passing through the first sub-display area AA11 is crossed with the second diffraction spot generated by the light passing through the second sub-display area AA 12.
In some alternative embodiments, as shown in fig. 4, the array substrate 01 further includes a third signal line 30 and a fourth signal line 40. The third signal line 30 is located in the first sub-display area AA11 and electrically connected to the first sub-pixel 110, and the extending direction of the third signal line 30 is different from the extending direction of the first signal line 10. The fourth signal line 40 is located in the second sub-display area AA12 and electrically connected to the second sub-pixel 210, and the extending direction of the fourth signal line 40 is different from the extending direction of the second signal line 20. The third signal line 30 and the fourth signal line 40 are both transparent traces. Therefore, the diffraction influencing factors of the first sub-display area AA11 and the second sub-display area AA12 can be concentrated on the non-transparent lines, so that the first diffraction spots of the first sub-display area AA11 or the second diffraction spots of the second sub-display area AA12 can be prevented from having multiple directions, that is, no obvious difference exists between the diffraction spots generated by the first sub-display area AA11 and the second sub-display area AA 12.
For example, the display panel 100 generally includes a scan signal line (scan line), a reference voltage signal line (vref line), a light emission control signal line (emit line), a data signal line (data line), a power supply signal line (vdd line), and the like. The scan signal lines, the reference voltage signal lines, and the light emission control signal lines generally extend in a first direction X, and the data signal lines and the power signal lines generally extend in a second direction Y.
As described above, when one of the first signal line 10 and the second signal line 20 is a non-transparent trace, the extending direction of the first signal line 10 and the second signal line 20 may not be limited. For example, when the first signal line 10 extends in the first direction X, the first signal line 10 may be any one or more of a scanning signal line, a reference voltage signal line, and a light emission control signal line; when the first signal line 10 extends in the second direction Y, the first signal line 10 may be any one or more of a data signal line and a power signal line. The second signal line 10 is the same.
When the first signal line 10 and the second signal line 20 are both non-transparent wires, the extending directions of the first signal line 10 and the second signal line 20 intersect. For example, when the first signal line 10 extends in the first direction X, the first signal line 10 may be any one or more of a scanning signal line, a reference voltage signal line, and a light emission control signal line; when the second signal line 20 extends in the second direction Y, the second signal line 20 may be any one or more of a data signal line and a power signal line. Correspondingly, when the third signal line 30 extends along the second direction Y, the third signal line 30 may be any one or more of a data signal line and a power signal line; when the fourth signal line 40 extends in the first direction X, the fourth signal line 40 may be any one or more of a scanning signal line, a reference voltage signal line, and a light emission control signal line.
Illustratively, the non-transparent trace may be formed of a metal, such as molybdenum. The transparent wire may be formed of a transparent conductive material, such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).
In some alternative embodiments, the orthographic shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 are the same. For example, the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 are all rectangles, ellipses, triangles, circles, squares, irregular polygons and the like. As shown in fig. 4, the orthographic projection shape of the first sub-pixel 110 on the array substrate 01 has a center point O1, and has a first center line S11 and a second center line S12 perpendicular to each other passing through the center point O1 thereof. The orthographic projection shape of the second sub-pixel 210 on the array substrate 01 has a center point O2, and has a first center line S21 and a second center line S22 perpendicular to each other passing through the center point O2.
It should be understood that the first center line S11 and the second center line S12 may be perpendicular to each other through the center point O1 of the orthographic shape of the first sub-pixel 110 on the array substrate 01, and the orthographic shape of the first sub-pixel 110 may or may not be symmetrical about the first center line S11 or the second center line S12, which is not limited in this application. The first center line S21 and the second center line S22 of the orthographic shape of the second subpixel 210 are the same.
It should also be understood that the positions of the first center line S11 of the orthographic shape of the first sub-pixel 110 and the first center line S21 of the orthographic shape of the second sub-pixel 210 on the orthographic shape are the same, and similarly, the positions of the second center line S12 of the orthographic shape of the first sub-pixel 110 and the second center line S22 of the orthographic shape of the second sub-pixel 210 on the orthographic shape are also the same. For example, taking the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 as a rectangle, the first center lines S11, S21 may be a line perpendicular to the two short sides of the rectangle and passing through the center point of the rectangle, and the second center lines S12, S22 may be a line perpendicular to the two long sides of the rectangle and passing through the center point of the rectangle. For another example, taking the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 as an ellipse as an example, the first center lines S11 and S21 may be the major axis of the ellipse, and the second center lines S12 and S22 may be the minor axis of the ellipse.
The first center line S11 of the orthographic shape of the first subpixel 110 is parallel to the first center line S21 of the orthographic shape of the second subpixel 210. It is understood that the second center line S12 of the orthographic shape of the first sub-pixel 110 is also parallel to the second center line S22 of the orthographic shape of the second sub-pixel 210. That is, the first sub-pixel 110 and the second sub-pixel 210 have the same arrangement angle of the orthographic projection shape on the array substrate 01. The inventor of the present application finds that the main factors affecting diffraction include a trace structure and a pixel arrangement structure, and the present application sets the placement angles of the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 to be the same, so as to avoid diffraction interference caused by different arrangement of sub-pixels in the first sub-display area AA11 and the second sub-display area AA12, thereby concentrating the diffraction influence factors of the first sub-display area AA11 and the second sub-display area AA12 on a non-transparent trace, and avoiding that the first diffraction spot of the first sub-display area AA11 has multiple directions, or avoiding that the second diffraction spot of the second sub-display area AA12 has multiple directions, that is, avoiding that there is no obvious difference between the diffraction spots generated by the first sub-display area AA11 and the second sub-display area AA 12.
In fig. 4, taking the orthographic shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 as an example, the first center lines S11, S21 of the orthographic shapes of the first sub-pixel 110 and the second sub-pixel 210 may both extend along the second direction Y, and the second center lines S12, S22 of the orthographic shapes of the first sub-pixel 110 and the second sub-pixel 210 may both extend along the first direction X.
As shown in fig. 5, the first subpixel 110 and the second subpixel 210 may be rotated by a preset angle. Still taking the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 on the array substrate 01 as an example, the extending directions of the first central lines S11, S21 of the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 and the second direction Y may intersect, and similarly, the second central lines S12, S22 of the orthographic projection shapes of the first sub-pixel 110 and the second sub-pixel 210 and the first direction X may also intersect.
In some alternative embodiments, for example, the first signal line 10 is a non-transparent trace. As shown in fig. 6, the first center line S11 of the orthographic shape of the first subpixel 110 is parallel to the first signal line 10. In other alternative embodiments, for example, the second signal line 20 is a non-transparent trace. The first center line S21 of the orthographic shape of the second subpixel 210 is parallel to the second signal line 20.
As described above, the arrangement of the first sub-pixels 110 also affects the diffraction. The first center line S11 of the orthographic projection shape of the first sub-pixel 110 and/or the first center line S21 of the orthographic projection shape of the second sub-pixel 210 are set to be parallel to the non-transparent trace, that is, the extending direction of the slit formed between the adjacent first sub-pixels 110 is the same as the extending direction of the slit formed between the non-transparent trace, so that the diffraction spots of the first sub-display area AA11 and/or the second sub-display area AA12 can be prevented from having multiple directions, and the diffraction spots generated by the first sub-display area AA11 and the second sub-display area AA12 can be prevented from having a significant difference.
In some alternative embodiments, as shown in fig. 7 and 8, the display panel 100 may include the second display area AA2, and the light transmittance of the first display area AA1 is greater than that of the second display area AA 2.
As shown in fig. 8, the light-emitting function layer 02 further includes a third subpixel 310. A plurality of third sub-pixels 310 are located in the second display area AA 2. The orthographic projection shapes of the first sub-pixel 110, the second sub-pixel 210 and the third sub-pixel 310 on the array substrate 01 are the same. Therefore, the sub-pixels of different display areas can be formed by using the same mask, and the process cost can be reduced while two different diffraction spots are generated. In fig. 8, signal lines in each display region are shown hidden for clarity.
In some alternative embodiments, as shown in fig. 9, the light emitting function layer 02 further includes a pixel defining structure 03, and the pixel defining structure 03 includes a first pixel opening K1 located in the first sub-display area AA11, a second pixel opening K2 located in the second sub-display area AA12, and a third pixel opening K3 located in the second sub-display area AA 2.
The first subpixel 110 includes a first electrode 112, a first light emitting layer 111, and a second electrode 113, which are stacked. The first light emitting layer 111 is positioned in the first pixel opening K1, the first light emitting layer 111 is positioned between the first electrode 112 and the second electrode 113, and the first electrode 112 is positioned between the second electrode 113 and the array substrate 01. One of the first electrode 112 and the second electrode 113 is an anode, and the other is a cathode.
In some embodiments, the second sub-pixel 210 includes a third electrode 212, a second light emitting layer 211, and a fourth electrode 213, which are stacked. The second light emitting layer 211 is positioned in the second pixel opening K2, the second light emitting layer 211 is positioned between the third electrode 212 and the fourth electrode 213, and the third electrode 212 is positioned between the fourth electrode 213 and the array substrate 01. One of the third electrode 212 and the fourth electrode 213 is an anode, and the other is a cathode.
In some embodiments, the third sub-pixel 310 includes a fifth electrode 312, a third light emitting layer 311, and a sixth electrode 313, which are stacked. The third light emitting layer 311 is positioned in the third pixel opening K3, the third light emitting layer 311 is positioned between the fifth electrode 312 and the sixth electrode 313, and the fifth electrode 312 is positioned between the sixth electrode 313 and the array substrate 01. One of the fifth electrode 312 and the sixth electrode 313 is an anode, and the other is a cathode.
In this embodiment, the first electrode 112, the third electrode 212, and the fifth electrode 312 are anodes, the second electrode 113, the fourth electrode 213, and the sixth electrode 313 are cathodes, for example, and the description will be given. In some embodiments, the second electrode 113, the fourth electrode 213, and the sixth electrode 313 may be interconnected as a common electrode.
In general, the first light-emitting layer 111, the second light-emitting layer 211, the third light-emitting layer 311, the second electrode 113, the fourth electrode 213, and the sixth electrode 313 have high transmittance for light, and thus these layers have a weak influence on diffraction. The first electrode 112, the third electrode 212, and the fifth electrode 312 have relatively low transmittance to light, so these film layers have a strong influence on diffraction. Based on this, the orthographic projection shape of the first sub-pixel 110 on the array substrate 01 includes the orthographic projection shape of the first electrode 112 on the array substrate 01, the orthographic projection shape of the second sub-pixel 210 on the array substrate 01 includes the orthographic projection shape of the third electrode 212 on the array substrate 01, and the orthographic projection shape of the third sub-pixel 310 on the array substrate 01 includes the orthographic projection shape of the fifth electrode 312 on the array substrate 01.
For example, with continued reference to fig. 8, the pixel density (Pixels Per inc, PPI) of the first display area AA1 may be less than the pixel density of the second display area AA 2. The pixel density of the first sub-display area AA11 may be the same as the pixel density of the second sub-display area AA 12. In addition, in order to reduce a display difference between the first display area AA1 and the second display area AA2, the sizes of the first sub-pixel 110 and the second sub-pixel 210 in the first display area AA1 may be larger than the size of the third sub-pixel 310.
In some alternative embodiments, as shown in fig. 10, the array substrate 01 includes a first pixel circuit 50 and a second pixel circuit 60, the first pixel circuit 50 is electrically connected to the first sub-pixel 110, and the second pixel circuit 60 is electrically connected to the second sub-pixel 210. The first pixel circuit 50 is located in the first sub-display area AA11, and the second pixel circuit 60 is located in the second sub-display area AA 12.
In some embodiments, the circuit structures of the first pixel circuit 50 and the second pixel circuit 60 may be the same. The circuit structure is any one of a 2T1C circuit, a 7T1C circuit, a 7T2C circuit, or a 9T1C circuit. Herein, the "2T 1C circuit" refers to a pixel circuit including 2 thin film transistors (T) and 1 capacitor (C) in the pixel circuit, and the other "7T 1C circuit", "7T 2C circuit", "9T 1C circuit", and the like are analogized.
The orthographic projection shapes of the first pixel circuit 50 and the second pixel circuit 60 on the array substrate 01 can be the same. For example, the orthographic projection shapes of the first pixel circuit 50 and the second pixel circuit 60 on the array substrate 01 are all rectangular, oval, triangular, circular, square, irregular polygon and the like.
The orthographic projection shape of the first pixel circuit 50 on the array substrate 01 has a center point O3, and has a third center line S31 and a fourth center line S32 perpendicular to each other passing through the center point O3. The orthographic projection shape of the second pixel circuit 60 on the array substrate 01 has a center point O2, and has a third center line S41 and a fourth center line S42 perpendicular to each other passing through the center point O4 thereof.
Similarly, the third central line and the fourth central line pass through the central point of the orthographic projection shape of the pixel circuit and are perpendicular to each other, and the orthographic projection shape of the pixel circuit may be symmetrical or asymmetrical with respect to the third central line or the fourth central line, which is not limited in the present application.
The third center line S31 of the orthographic shape of the first pixel circuit 50 is parallel to the first center line S11 of the orthographic shape of the first subpixel 110. It is understood that the fourth center line S32 of the orthographic shape of the first pixel circuit 50 is also parallel to the second center line S12 of the orthographic shape of the first subpixel 110. That is, the first pixel circuit 50 and the first sub-pixel 110 have the same arrangement angle of the orthographic projection shape on the array substrate 01.
The third center line S41 of the orthographic shape of the second pixel circuit 60 is parallel to the first center line S21 of the orthographic shape of the second subpixel 210. It is understood that the fourth center line S42 of the orthographic shape of the second pixel circuit 60 is also parallel to the second center line S22 of the orthographic shape of the second subpixel 210. That is, the arrangement angles of the orthographic projection shapes of the second pixel circuit 60 and the second sub-pixel 210 on the array substrate 01 are the same.
The transmittance of the elements in the pixel circuit to light is relatively low, so that the influence of the pixel circuit to diffraction is relatively strong, and the placement angles of the orthographic projection shapes of the pixel circuit and the sub-pixels in the same sub-display area on the array substrate are set to be the same, so that diffraction spots of the first sub-display area AA11 and the second sub-display area AA12 can be prevented from having multiple directions, and therefore, the phenomenon that obvious difference exists between the diffraction spots generated by the first sub-display area AA11 and the second sub-display area AA12 cannot be avoided.
For example, the display panel 100 may further include an encapsulation layer, and a polarizer and a cover plate located above the encapsulation layer, or the cover plate may be directly disposed above the encapsulation layer, without disposing a polarizer, or at least the cover plate may be directly disposed above the encapsulation layer of the first display area AA1, without disposing a polarizer, so as to avoid the polarizer from affecting the light collection amount of the photosensitive element disposed below the first display area AA1, and of course, the polarizer may also be disposed above the encapsulation layer of the first display area AA 1.
The embodiment of the present application further provides a display device, which may include a photosensitive assembly and the display panel 100 of any of the above embodiments. The following description will be given taking as an example a display device of an embodiment including the display panel 100 of the above-described embodiment.
Fig. 11 is a schematic top view and fig. 12 is a cross-sectional view taken along line B-B of fig. 11 of a display device according to an embodiment of the present application. In the display device 1000 of the present embodiment, the display panel 100 may be the display panel 100 of one of the above embodiments, the display panel 100 has a first display area AA1 and a second display area AA2, and the light transmittance of the first display area AA1 is greater than that of the second display area AA 2.
The display panel 100 includes a first surface S1 and a second surface S2 opposite to each other, wherein the first surface S1 is a display surface. The display device further includes a photosensitive member 200, and the photosensitive member 200 is located on the second surface S2 side of the display panel 100. The number of the photosensitive assemblies 200 may be two, wherein one photosensitive assembly 200 corresponds to the first sub-display area AA11, and the other photosensitive assembly 200 corresponds to the second sub-display area AA 12.
The two photosensitive assemblies 200 can respectively identify the first diffraction light spot generated by the first sub-display area AA11 and the second diffraction light spot generated by the second sub-display area AA12, so that one of the two initial images respectively acquired by the two photosensitive assemblies 200 contains information of the first diffraction light spot, and the other contains information of the second diffraction light spot.
The photosensitive assembly 200 may be an image capturing device for capturing external image information. In this embodiment, the photosensitive assembly 200 is a Complementary Metal Oxide Semiconductor (CMOS) image capture Device, and in other embodiments, the photosensitive assembly 200 may also be a Charge-coupled Device (CCD) image capture Device or other types of image capture devices.
It is understood that the display device 1000 provided in the embodiments of the present application may be a dual-camera display device. In some embodiments, the display device 1000 may further include an image processing module 300, and the image processing module 300 is electrically connected to both of the photosensitive assemblies 200. Specifically, when the display device shoots, the two cameras can work simultaneously to respectively obtain an initial image. The initial image shot by the camera corresponding to the first sub-display area captures a first diffraction light spot, the initial image shot by the camera corresponding to the second sub-display area captures a second diffraction light spot, and the two diffraction light spots are intersected, namely, the diffraction light spots of the first sub-display area and the second sub-display area are different. The image processing module 300 can identify the difference through an off-screen shooting algorithm, compare and synthesize the shooting information of the two initial images, replace the image information of the position of the diffraction spot in one initial image with the image information of the non-diffraction spot or the weak diffraction spot in the corresponding position in the other initial image, and weaken or disappear the diffraction spot in the synthesized image due to the intersection of the two diffraction spots.
Specifically, the influence of the diffraction spots in the image can be evaluated by using a Modulation Transfer Function (MTF) of the image or a Spatial Frequency Response (SFR) of the image, and the smaller the influence of the diffraction spots, the higher the Modulation Transfer Function (MTF) or the Spatial Frequency Response (SFR) of the image, the higher the resolution of the image, that is, the sharper the image.
In accordance with the embodiments of the present application as described above, these embodiments are not exhaustive of all of the details and are not intended to limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the application and its practical application, to thereby enable others skilled in the art to best utilize the application and its various modifications as are suited to the particular use contemplated. The application is limited only by the claims and their full scope and equivalents.
Claims (10)
1. A display panel is characterized by comprising a first display area, wherein the first display area is a light-transmitting display area and comprises a first sub-display area and a second sub-display area;
the display panel includes:
the array substrate comprises a first signal line and a second signal line;
the light-emitting functional layer is positioned on one side of the array substrate and comprises first sub-pixels and second sub-pixels, the first sub-pixels are positioned in the first sub-display area, and the second sub-pixels are positioned in the second sub-display area;
the first signal line is located in the first sub-display area and electrically connected with the first sub-pixel, the second signal line is located in the second sub-display area and electrically connected with the second sub-pixel, at least one of the first signal line and the second signal line is a non-transparent wire, a slit is formed between the non-transparent wires, and light passes through the slit to generate diffraction phenomenon, so that a first diffraction spot generated when the light passes through the first sub-display area is intersected with a second diffraction spot generated when the light passes through the second sub-display area.
2. The display panel according to claim 1, wherein the first signal line and the second signal line are both non-transparent traces, and an extending direction of the first signal line intersects an extending direction of the second signal line.
3. The display panel according to claim 1, wherein the array substrate further comprises:
a third signal line located in the first sub-display region and electrically connected to the first sub-pixel, wherein an extending direction of the third signal line is different from an extending direction of the first signal line;
a fourth signal line located in the second sub-display region and electrically connected to the second sub-pixel, wherein an extending direction of the fourth signal line is different from an extending direction of the second signal line;
the third signal line and the fourth signal line are both transparent wires.
4. The display panel according to claim 1, wherein the first sub-pixel and the second sub-pixel have the same orthographic projection shape on the array substrate and each have a first center line and a second center line perpendicular to each other, and the first center line of the orthographic projection shape of the first sub-pixel is parallel to the first center line of the orthographic projection shape of the second sub-pixel.
5. The display panel according to claim 1, wherein the first sub-pixel and the second sub-pixel have the same orthographic projection shape on the array substrate and have a first center line and a second center line perpendicular to each other;
the first signal line is a non-transparent routing line, and the first central line of the orthographic projection shape of the first sub-pixel is parallel to the first signal line;
and/or the second signal line is a non-transparent routing line, and the first central line of the orthographic projection shape of the second sub-pixel is parallel to the second signal line.
6. The display panel according to claim 1, further comprising a second display region, wherein a light transmittance of the first display region is greater than a light transmittance of the second display region;
the light-emitting functional layer further comprises a third sub-pixel, the plurality of third sub-pixels are located in the second display area, and the orthographic projection shapes of the first sub-pixel, the second sub-pixel and the third sub-pixel on the array substrate are the same.
7. The display panel according to claim 6, wherein the first subpixel comprises a first electrode, a first light-emitting layer, and a second electrode which are stacked, wherein the first light-emitting layer is located between the first electrode and the second electrode;
the second sub-pixel comprises a third electrode, a second light-emitting layer and a fourth electrode which are arranged in a stacked mode, and the second light-emitting layer is located between the third electrode and the fourth electrode;
the third sub-pixel comprises a fifth electrode, a third light-emitting layer and a sixth electrode which are arranged in a stacked mode, and the third light-emitting layer is located between the fifth electrode and the sixth electrode;
wherein an orthographic projection shape of the first sub-pixel on the array substrate comprises an orthographic projection shape of the first electrode on the array substrate, an orthographic projection shape of the second sub-pixel on the array substrate comprises an orthographic projection shape of the third electrode on the array substrate, and an orthographic projection shape of the third sub-pixel on the array substrate comprises an orthographic projection shape of the fifth electrode on the array substrate.
8. The display panel according to claim 4 or 5, wherein the array substrate comprises a first pixel circuit and a second pixel circuit, the first pixel circuit is electrically connected to the first sub-pixel, and the second pixel circuit is electrically connected to the second sub-pixel;
the first pixel circuit is located in the first sub-display area, the second pixel circuit is located in the second sub-display area, orthographic projection shapes of the first pixel circuit and the second pixel circuit on the array substrate are the same, the first pixel circuit and the second pixel circuit are perpendicular to each other, the third center line of the orthographic projection shape of the first pixel circuit is parallel to the first center line of the orthographic projection shape of the first sub-pixel, and the third center line of the orthographic projection shape of the second pixel circuit is parallel to the first center line of the orthographic projection shape of the second sub-pixel.
9. The display panel according to claim 1, wherein the first signal line and the second signal line include any one or more of a scan signal line, a reference voltage signal line, a light emission control signal line, a data signal line, and a power supply signal line.
10. A display device comprising a photosensitive member and the display panel according to any one of claims 1 to 9, wherein the first sub-display region and the second sub-display region each correspond to one of the photosensitive members.
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| CN111968516A (en) * | 2020-08-28 | 2020-11-20 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN114822230B (en) * | 2021-01-29 | 2023-09-19 | 云谷（固安）科技有限公司 | display panel |
| CN113160745A (en) * | 2021-03-31 | 2021-07-23 | 合肥维信诺科技有限公司 | Display panel and display device |
| CN113161404B (en) * | 2021-04-23 | 2023-04-18 | 武汉天马微电子有限公司 | Display panel and display device |
| CN113363305A (en) * | 2021-06-08 | 2021-09-07 | 京东方科技集团股份有限公司 | Display panel, electronic device and manufacturing method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20070011644A (en) * | 2003-10-24 | 2007-01-24 | 엔이씨 엘씨디 테크놀로지스, 엘티디. | Ips liquid crystal display device |
| CN110752240A (en) * | 2019-10-31 | 2020-02-04 | Oppo广东移动通信有限公司 | Display device and electronic apparatus |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09304725A (en) * | 1996-05-13 | 1997-11-28 | Olympus Optical Co Ltd | Video display device |
| KR20040061292A (en) * | 2002-12-30 | 2004-07-07 | 엘지.필립스 엘시디 주식회사 | A method of fabricating liquid crystal display device |
| WO2020052232A1 (en) * | 2018-09-14 | 2020-03-19 | 昆山国显光电有限公司 | Display panel, display screen, and display terminal |
| CN110767662B (en) * | 2019-05-31 | 2020-10-27 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110767720B (en) * | 2019-06-05 | 2020-09-08 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110600531B (en) * | 2019-10-30 | 2021-10-29 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
| CN210515985U (en) * | 2019-11-21 | 2020-05-12 | 昆山国显光电有限公司 | Display substrate, display panel and display device |
| CN110828529B (en) * | 2019-11-22 | 2021-05-04 | 昆山国显光电有限公司 | Display device and display panel thereof |
| CN110867476B (en) * | 2019-11-27 | 2022-10-04 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111261684B (en) * | 2020-01-22 | 2023-06-09 | Oppo广东移动通信有限公司 | Display screen and electronic equipment |
| CN111276055B (en) * | 2020-02-28 | 2021-07-16 | 武汉天马微电子有限公司 | Display panel and display device |
| CN111476747A (en) * | 2020-03-31 | 2020-07-31 | 深圳奥比中光科技有限公司 | System and method for eliminating ghost image in under-screen imaging |
| CN111477668A (en) * | 2020-05-08 | 2020-07-31 | 昆山国显光电有限公司 | Display panel and display device |
-
2020
- 2020-09-17 CN CN202010981268.3A patent/CN112071886B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20070011644A (en) * | 2003-10-24 | 2007-01-24 | 엔이씨 엘씨디 테크놀로지스, 엘티디. | Ips liquid crystal display device |
| CN110752240A (en) * | 2019-10-31 | 2020-02-04 | Oppo广东移动通信有限公司 | Display device and electronic apparatus |
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