CN112069772A

CN112069772A - Data processing method and device based on FPGA, electronic equipment and storage medium

Info

Publication number: CN112069772A
Application number: CN202010712111.0A
Authority: CN
Inventors: 郭国峰; 林春炎; 祝磊; 张凯
Original assignee: Shenzhen Huayun Information System Co ltd
Current assignee: Shenzhen Huayun Information System Co ltd
Priority date: 2020-07-22
Filing date: 2020-07-22
Publication date: 2020-12-11

Abstract

The embodiment of the invention provides a data processing method and device based on an FPGA (field programmable gate array), electronic equipment and a storage medium, which are applied to the FPGA, wherein the method comprises the following steps: under the condition that a plurality of pieces of source data are received, determining a corresponding encoder from a preset encoder group for each piece of source data; acquiring type information of the corresponding source data by using each encoder, and executing corresponding encoding operation on the corresponding source data according to the type information to generate field data; adding a corresponding field label and a field flag bit to the corresponding field data by using each encoder to generate a STEP field, and storing the STEP field in storage equipment corresponding to the encoder; and extracting the STEP fields in the storage equipment, and combining to generate STEP data. Therefore, the encoding of the STEP field can be completed in parallel through a plurality of encoders, the encoding of the STEP field is accelerated, and the requirements of users can be met.

Description

Data processing method and device based on FPGA, electronic equipment and storage medium

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a data processing method and apparatus based on an FPGA, an electronic device, and a storage medium.

Background

The financial market, including the monetary market and the capital market, is the financing market. The fund financing refers to the activity of adjusting fund surplus by using various financial instruments by the fund supply and demand parties in the process of economic operation, which is a general term of all financial transaction activities, and various financial instruments such as stocks, bonds, deposit slips and the like are traded in the financial market. With the development of science and technology and capital development, the financial market is continuously expanded, the requirement on the delay performance of the trading system is higher and higher, investors not only want to obtain market data quickly, but also want to make decisions to exchange quickly, and therefore, the extremely-fast trading is the development trend of a new-generation trading system.

The processing of the declared orders by the current trading system can be roughly divided into three stages: order receiving, order processing and order protocol forwarding, wherein the data exchange protocol between the exchange trading system and the market participant system is STEP (securits trading exchange protocol), and the order protocol forwarding of the trading system is essentially the code to complete the STEP protocol. The exchange transaction system is mostly based on the traditional general CPU architecture, and in order to realize the acceleration of the coding, a software acceleration technology or an acceleration technology taking software as a core is adopted. However, as the requirement of the user on the transaction system delay performance is higher and higher, the traditional software acceleration technology or the acceleration technology taking software as a core has a bottleneck, and the requirement of the user cannot be met.

Disclosure of Invention

In order to solve the technical problems that the conventional software acceleration technology or the acceleration technology taking software as a core has a bottleneck and cannot meet the requirements of users, the embodiment of the invention provides a data processing method and device based on an FPGA, an electronic device and a storage medium.

In a first aspect of the embodiments of the present invention, there is provided a data processing method based on an FPGA, applied to the FPGA, the method including:

under the condition that a plurality of pieces of source data are received, determining a corresponding encoder from a preset encoder group for each piece of source data;

acquiring type information of the corresponding source data by using each encoder, and executing corresponding encoding operation on the corresponding source data according to the type information to generate field data;

adding a corresponding field label and a field flag bit to the corresponding field data by using each encoder to generate a STEP field, and storing the STEP field in storage equipment corresponding to the encoder;

and extracting the STEP fields in the storage equipment, and combining to generate STEP data.

In an optional embodiment, in the case that a plurality of pieces of source data are received, determining, for each piece of source data, a corresponding encoder from a preset encoder group includes:

under the condition of receiving a plurality of pieces of source data, acquiring a preset configuration table corresponding to each encoder in a preset encoder group, wherein an identifier corresponding to the source data is stored in the preset configuration table;

for each piece of source data, searching a preset target configuration table corresponding to the piece of source data from the preset configuration table according to the identifier corresponding to the source data stored in the preset configuration table;

and for each piece of source data, determining that the encoder corresponding to the preset target configuration table is the encoder corresponding to the piece of source data.

In an optional embodiment, the preset configuration table stores type information corresponding to the source data; the obtaining, by each of the encoders, type information of the corresponding source data includes:

and reading type information corresponding to the source data stored in the preset target configuration table by using each encoder, and acquiring the type information of the corresponding source data.

In an optional embodiment, the performing, according to the type information, a corresponding encoding operation on the corresponding source data to generate field data includes:

if the type information comprises character types, extracting character data from the corresponding source data to generate field data;

and if the type information comprises a numerical type, carrying out binary conversion on the corresponding source data to generate field data.

In an optional embodiment, a field tag and a field flag bit corresponding to source data are stored in the preset configuration table; the generating STEP fields by adding corresponding field labels and field flag bits to the corresponding field data by using each encoder includes:

reading a field tag and a field flag bit corresponding to the source data stored in the preset target configuration table by using each encoder;

and adding a corresponding field label and a field flag bit for the corresponding field data by utilizing each encoder to generate a STEP field.

In an optional embodiment, before the obtaining, by each of the encoders, the type information of the corresponding source data, the method further includes:

judging whether the number of the source data corresponding to the target encoder is larger than 1 in all the encoders or not;

and if the number of the source data corresponding to the target encoder does not exist in all the encoders is more than 1, executing a step of acquiring the type information of the corresponding source data by using each encoder.

In an optional embodiment, the method further comprises:

if the number of the source data corresponding to the target encoder in all the encoders is larger than 1, selecting target source data from the source data corresponding to the target encoder according to the sequence of the source data corresponding to the target encoder;

and acquiring type information corresponding to the target source data by using the target encoder, executing corresponding encoding operation on the target source data according to the type information, generating field data, and storing the field data in a storage device corresponding to the target encoder.

In an optional embodiment, the method further comprises:

determining an idle encoder from the residual encoders of the preset encoder group according to the ranking sequence of the encoders;

acquiring type information of residual source data corresponding to the target encoder by using the idle encoder, and performing corresponding encoding operation on the residual source data according to the type information of the residual source data to generate residual field data;

and adding corresponding field labels and field flag bits to the rest field data by using the idle encoder to generate a STEP field, and storing the STEP field in storage equipment corresponding to the idle encoder.

In an optional embodiment, the extracting the STEP field in the storage device to combine to generate STEP data includes:

extracting the STEP fields from the storage device based on the ranking order of the STEP fields, and removing invalid bytes in the STEP fields;

and combining the STEP fields subjected to invalid byte elimination based on the extraction sequence of the STEP fields to generate STEP data.

In a second aspect of the embodiments of the present invention, there is also provided an FPGA-based data processing apparatus, applied to an FPGA, the apparatus including:

the encoder determining module is used for determining a corresponding encoder from a preset encoder group for each piece of source data under the condition that a plurality of pieces of source data are received;

the information acquisition module is used for acquiring the type information of the corresponding source data by utilizing each encoder;

the data generation module is used for executing corresponding coding operation on the corresponding source data according to the type information to generate field data;

a field generating module, configured to add a corresponding field tag and a field flag to the corresponding field data by using each encoder to generate a STEP field;

a field storage module, configured to store the STEP field in a storage device corresponding to each encoder;

and the field merging module is used for extracting the STEP fields in the storage equipment to merge and generate STEP data.

In a third aspect of the embodiments of the present invention, there is further provided an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;

a memory for storing a computer program;

and a processor configured to implement the FPGA-based data processing method according to any one of the first aspect described above when executing the program stored in the memory.

In a fourth aspect of the embodiments of the present invention, there is further provided a storage medium, where instructions are stored, and when the storage medium runs on a computer, the storage medium causes the computer to execute the FPGA-based data processing method according to any one of the first aspect.

In a fifth aspect of the embodiments of the present invention, there is also provided a computer program product containing instructions, which when run on a computer, causes the computer to perform any of the above-mentioned FPGA-based data processing methods.

According to the technical scheme provided by the embodiment of the invention, under the condition that a plurality of pieces of source data are received, a corresponding encoder is determined from a preset encoder group for each piece of source data, the type information of the corresponding source data is obtained by each encoder, corresponding encoding operation is carried out on the corresponding source data according to the type information to generate field data, a corresponding field label and a corresponding field flag bit are added to the corresponding field data by each encoder to generate a STEP field, the STEP field is stored in a storage device corresponding to the encoder, and the STEP field in the storage device is extracted and combined to generate the STEP data. Therefore, the encoding of the STEP field can be completed in parallel through a plurality of encoders, the encoding of the STEP field is accelerated, and the requirements of users can be met.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.

Fig. 1 is a schematic flow chart illustrating an implementation of a data processing method based on an FPGA according to an embodiment of the present invention;

fig. 2 is a schematic diagram illustrating STEP field storage according to an embodiment of the present invention;

fig. 3 is a schematic diagram illustrating STEP field generation according to an embodiment of the present invention;

FIG. 4 is a diagram illustrating a register storing a STEP field according to an embodiment of the present invention;

fig. 5 is a schematic flow chart illustrating another implementation of the FPGA-based data processing method according to the embodiment of the present invention;

FIG. 6 is a diagram illustrating decoding and encoding collisions according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of an FPGA-based data processing apparatus according to an embodiment of the present invention;

fig. 8 is a schematic structural diagram of an electronic device shown in the embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

As shown in fig. 1, an implementation flow diagram of a data processing method based on an FPGA provided in an embodiment of the present invention is applied to an FPGA, and the method specifically includes the following steps:

s101, under the condition that a plurality of pieces of source data are received, determining a corresponding encoder from a preset encoder group for each piece of source data.

STEP encoding means to encode source data in binary format into data in STEP format (i.e., STEP data), so that the source data in the embodiment of the present invention may be source data in binary format.

In order to perform STEP coding quickly, the embodiment of the present invention designs a plurality of encoders with the same function to form an encoder group, each encoder has an independent configuration table corresponding to the encoder, and the configuration table stores information required by the encoder to perform STEP coding.

In a case where a plurality of pieces of source data are received, for each piece of source data, the embodiment of the present invention determines an encoder corresponding to the piece of source data from a preset encoder group. For example, as shown in table 1 below, there is a corresponding encoder for source data 1, source data 2, … ….

Source data	Encoder for encoding a video signal
		1	A
2	B
		……	……

TABLE 1

For source data, if a STEP field corresponding to the source data is too long, two or more encoders may be required to jointly complete STEP field encoding, and thus, one piece of source data corresponds to at least one encoder, and may also correspond to two or more encoders, which is not limited in the embodiment of the present invention.

The method comprises the steps of acquiring a preset configuration table corresponding to each encoder in a preset encoder group under the condition that a plurality of pieces of source data are received, wherein an identifier corresponding to the source data is stored in the preset configuration table and used for indicating the source data which are required to be processed by each encoder.

For example, when source data 1, source data 2, and … … are received, a preset configuration table corresponding to each encoder in a preset encoder group is obtained, where the preset configuration table stores an identifier corresponding to the source data, as shown in table 2 below.

Encoder for encoding a video signal	Configuration table	Identification corresponding to source data
			A	1	1
B	2	2
			……	……	……

TABLE 2

And for each piece of source data, searching a preset target configuration table corresponding to the piece of source data from the preset configuration table according to the identifier corresponding to the source data stored in the preset configuration table.

For example, for the source data 1, according to the identifier corresponding to the source data stored in the preset configuration table, the preset target configuration table corresponding to the source data 1, that is, the configuration table 1, is searched from the preset configuration table.

For another example, for the source data 2, according to the identifier corresponding to the source data stored in the preset configuration table, the preset target configuration table corresponding to the source data 2, that is, the configuration table 2, is searched from the preset configuration table.

And for each piece of source data, determining an encoder corresponding to the preset target configuration table as an encoder corresponding to the piece of source data.

For example, for source data 1, a preset target configuration table is determined, that is, encoder a corresponding to configuration table 1 is the encoder corresponding to the piece of source data 1, which means that encoder a is responsible for processing source data 1.

For another example, for the source data 2, it is determined that the preset target configuration table, that is, the encoder B corresponding to the configuration table 2 is the encoder corresponding to the piece of source data 2, which means that the encoder B is responsible for processing the source data 2.

As described above, for each piece of source data, there is an encoder corresponding to the source data, and the encoder processes the source data, that is, performs STEP field encoding to generate a STEP field.

It should be noted that, for the configuration table, adjustment can be performed according to the increase and change of the field in the actual STEP protocol, so as to adapt to different STEP data, and facilitate maintenance of the transaction system.

S102, acquiring type information of the corresponding source data by using each encoder, and executing corresponding encoding operation on the corresponding source data according to the type information to generate field data.

For each encoder, the encoder may be used to obtain type information of the corresponding source data, and the encoder may be used to perform a corresponding encoding operation on the corresponding source data according to the type information to generate field data.

For example, for the encoder a, the encoder a may be used to obtain the type information of the corresponding source data 1, and perform the corresponding encoding operation on the corresponding source data 1 according to the type information to generate the field data. Wherein, the encoder a corresponds to the source data 1 one to one.

For another example, for the encoder B, the encoder B may be used to obtain the type information of the corresponding source data 1, and perform the corresponding encoding operation on the corresponding source data 2 according to the type information, so as to generate the field data. Wherein the encoder B corresponds one-to-one to the source data 2.

The STEP structure all adopts the mode of arranging in proper order "the label is field value ═ SOH >" and organizes, and the label is the digital character, and no blank space around, unless specifically declaring outward, the field value is printable ASCII code character string and shows, must not adopt full angle alphabetical character, < SOH > is the field and defines the sign, and the value is unprintable character ASCII code: hexadecimal 0x 01. In the present invention, "field value < SOH >" is referred to as a STEP field, and STEP data is composed of a plurality of STEP fields, that is, "field value" in the STEP field.

For the type information corresponding to the source data stored in the preset configuration table, each encoder may be utilized to read the type information corresponding to the source data stored in the corresponding preset target configuration table, and obtain the type information corresponding to the corresponding source data.

For example, the encoder a reads the type information corresponding to the source data 1 stored in the corresponding preset target configuration table (i.e., configuration table 1), and obtains the type information corresponding to the corresponding source data 1.

For another example, the encoder B reads the type information corresponding to the source data 2 stored in the corresponding preset target configuration table (i.e., the configuration table 2), and obtains the type information corresponding to the corresponding source data 2.

Thus, for each encoder, the type information of the source data corresponding to the encoder can be obtained, so that the source data corresponding to the encoder can be subjected to STEP encoding according to the type information subsequently, and a STEP field is generated.

For the type information, the embodiment of the present invention may include: character type and numerical type. If the type information comprises character type, character type coding is carried out on the corresponding source data by using an encoder, namely character data are extracted from the corresponding source data to generate field data; if the type information includes a numerical type, the corresponding source data is numerically encoded using an encoder, that is, the corresponding source data is subjected to a binary conversion (binary to decimal) to generate field data.

For example, the type information of the source data 1 includes a numerical type, and the source data 1 is subjected to a binary conversion by the encoder a to generate field data; the type information of the source data 2 includes character types, and character data is extracted from the source data 2 by the encoder B to generate field data. Thus, for each piece of source data, different encoding operations need to be performed by the corresponding encoder due to different type information.

And S103, adding corresponding field labels and field flag bits to the corresponding field data by using each encoder to generate a STEP field, and storing the STEP field in a storage device corresponding to the encoder.

For each encoder, performing an encoding operation on the corresponding source data generates field data, and then a STEP field can be generated by adding a corresponding field tag and a field flag bit to the field data by using the encoder and stored in a storage device corresponding to the encoder.

For example, for the encoder a, performing an encoding operation on the corresponding source data 1 generates field data 1, adding a corresponding field tag and a field flag bit to the field data 1 by using the encoder a to generate a STEP field 1, and storing the STEP field 1 in a register a corresponding to the encoder a; for the encoder B, performing an encoding operation on the corresponding source data 2 generates field data 2, adds a corresponding field tag and a field flag to the field data 2 by using the encoder B to generate a STEP field 2, and stores the STEP field 2 in a register B corresponding to the encoder B, as shown in fig. 3.

Therefore, for each encoder, a series of operations such as encoding and adding are carried out on the source data corresponding to the encoder, and a corresponding STEP field can be generated.

For the STEP field, as shown above, "tag ═ field value < SOH >", tag "is field tag, and" < SOH > "is field flag bit.

It should be noted that, the storage device may be a register, a memory, or a disk, which is not limited in this embodiment of the present invention.

For source data, if a STEP field corresponding to the source data is too long, two or more encoders may be required to jointly complete STEP field encoding, so that one piece of source data corresponds to at least one encoder, and also corresponds to two or more encoders, and the STEP field can be generated by adding a corresponding field tag and a corresponding field flag bit to the corresponding field data by using the two or more encoders.

For example, for source data 3, an encoder C and an encoder D correspond to each other, the source data 3 is split into two parts, the encoder C obtains type information corresponding to the source data 3, the encoder C performs a corresponding encoding operation on one part of the source data 3 according to the type information to generate field data 1, the encoder D obtains type information corresponding to the source data 3, the encoder D performs a corresponding encoding operation on the other part of the source data 3 according to the type information to generate field data 2, the encoder C adds a field tag to the field data 1, the encoder D adds a field flag bit to the field data 2, and the two parts are combined together as shown in fig. 3, so that a final STEP field is obtained, and thus STEP encoding of the source data 3 is completed together through the encoder C and the encoder D.

And for the field tag and the field flag bit corresponding to the source data stored in the preset configuration table, correspondingly reading the field tag and the field flag bit corresponding to the source data stored in the corresponding preset target configuration table by using each encoder, and adding the corresponding field tag and the corresponding field flag bit to the corresponding field data by using each encoder to generate a STEP field.

For example, for the encoder a, reading a field tag and a field flag bit corresponding to the source data 1 stored in a corresponding preset target configuration table (i.e., configuration table 1), and adding the corresponding field tag and field flag bit to the corresponding field data by using the encoder a to generate a STEP field 1; for the encoder B, the field tag and the field flag bit corresponding to the source data 2 stored in the corresponding preset target configuration table (i.e., the configuration table 2) are read, and the encoder B is used to add the corresponding field tag and the corresponding field flag bit to the corresponding field data to generate the STEP field 2.

And S104, extracting the STEP fields in the storage equipment, and combining the STEP fields to generate STEP data.

The STEP fields in the storage device are extracted and combined to generate STEP data, that is, the STEP data includes a plurality of STEP fields. Before extracting the STEP fields in the storage device for combination, it needs to be determined that each STEP field in the STEP data is generated and stored.

For example, for STEP data including 13 STEP fields, after the number of STEP fields stored in the register is equal to 13, the 13 STEP fields are extracted from the register and combined to generate STEP data.

The number of bytes that the encoder can process is fixed (for example, 8 bytes, the maximum number of bytes that represents the result that the encoder can encode at one time is 8), so there may be some invalid bytes that are output and stored in the storage device together with the field data after encoding is completed each time, for this reason, can extract the STEP field from the said storage device based on the rank order of the STEP field, and reject the invalid byte in the STEP field, merge the STEP field that has been rejected by the invalid byte based on the order of extraction of the STEP field, produce the STEP data.

The ranking order of each STEP field in the STEP data is planned in advance, for example, for tags 0 to 13, all the STEP fields of a certain type of STEP data are arranged in the order shown in fig. 4, so that it can be known which STEP field each encoder needs to encode, for example, tag0 falls in memory0, which indicates that encoder 0(encoder0) needs to complete encoding of tag0, and when encoder0 starts encoding, which depends on the arrival time of the source data (bank data); since the data format before and after encoding is known, the time at which the encoder0 starts working is also known, and this information is stored in the configuration table. Similarly, the working time of all other encoders is known, so the order of the STEP fields can be adjusted by controlling the working time and the encoding content of the encoders. In addition, if some STEP fields are too long, multiple encoders can be used to complete encoding, for example, tag1 requires encoder1 and encoder2 to complete encoding together.

As shown in fig. 4, from the memories 0 to 15, tag0 to tag13 are extracted in the order of rank of the STEP fields, invalid bytes in the tag0 to tag13 are removed, and tag0 to tag13 from which the invalid bytes are removed are merged in the order of extraction of the STEP fields, thereby generating STEP data.

It should be noted that, in most cases, the field order in the binary data is different from the corresponding field order in the STEP structure. For example, the order price in the binary data appears in the head of the data stream and the order quantity appears in the middle, but the price field in the STEP may be in the middle of the data stream and the quantity field in the head; this means that the encoder receives price data and completes the STEP encoding of price field, when the encoding of price and quantity is completed, the order of two encoding results needs to be exchanged, and the field exchanging function is realized by the cooperation of the encoder group and the encoding result register group.

If the result register set is considered as a continuous piece of memory, the location of the encoded result in the memory is fixed, which is determined by the corresponding STEP data format. The result register set and the storage form of the data are shown in fig. 4, each encoder (encoder) corresponds to a register (memory), one register is internally subdivided into 8 small blocks, and each small block stores one encoded result (such as tag0), so that one register can store 8 encoded results at most (which can be adjusted appropriately according to the actual situation).

Through the above description of the technical solution provided by the embodiment of the present invention, in the case of receiving a plurality of pieces of source data, a corresponding encoder is determined from a preset encoder group for each piece of source data, the type information of the corresponding source data is obtained by using each encoder, a corresponding encoding operation is performed on the corresponding source data according to the type information, field data is generated, a corresponding field tag and a corresponding field flag bit are added to the corresponding field data by using each encoder, a STEP field is generated and stored in a storage device corresponding to the encoder, and the STEP field in the storage device is extracted and combined to generate the STEP data. Therefore, the encoding of the STEP field can be completed in parallel through a plurality of encoders, the encoding of the STEP field is accelerated, and the requirements of users can be met.

As shown in fig. 5, an implementation flow diagram of another FPGA-based data processing method provided in the embodiment of the present invention is applied to an FPGA, and the method specifically includes the following steps:

s501, under the condition that a plurality of pieces of source data are received, determining a corresponding encoder from a preset encoder group for each piece of source data;

in the embodiment of the present invention, this step is similar to the step S101, and the details of the embodiment of the present invention are not repeated herein.

S502, judging whether the number of the source data corresponding to the target encoder is larger than 1 in all the encoders.

In the embodiment of the present invention, for the encoder, a piece of source data is STEP-encoded at the same time. Since there is a possibility that a plurality of pieces of source data arrive at the same time, as shown in fig. 4, if the source data of tag0 and tag12 arrive at the same time, but the encoder can only perform STEP encoding on one piece of source data at a time, the encoder0 can only complete encoding of tag0 or tag12 at this time, and cannot complete encoding of tag0 and tag12 at the same time, and there is a collision of encoding.

For this reason, in order to avoid the encoding conflict, the embodiment of the present invention determines whether the number of source data corresponding to the target encoder is greater than 1 in all encoders (i.e., all encoders determined above), indicates no encoding conflict if the number of source data corresponding to the target encoder is not greater than 1 in all encoders, and indicates that an encoding conflict exists if the number of source data corresponding to the target encoder is greater than 1 in all encoders.

For example, for encoder a, encoder B, … …, it is determined whether the number of source data corresponding to the target encoder is greater than 1 in encoder a, encoder B, … ….

And S503, if the number of the source data corresponding to the target encoder does not exist in all the encoders is larger than 1, acquiring the type information of the corresponding source data by using each encoder.

S504, according to the type information, corresponding encoding operation is executed on the corresponding source data, and field data are generated.

And S505, adding corresponding field tags and field flag bits to the corresponding field data by using each encoder to generate a STEP field, and storing the STEP field in a storage device corresponding to the encoder.

If the quantity of the source data corresponding to the target encoder does not exist in all the encoders is more than 1, executing the following steps by using each encoder: acquiring type information corresponding to corresponding source data, performing corresponding encoding operation on the corresponding source data according to the type information to generate field data, adding corresponding field tags and field flag bits to the corresponding field data to generate a STEP field, and storing the STEP field in storage equipment corresponding to the encoder. The specific execution flow may refer to the above embodiments, and the embodiments of the present invention are not described in detail herein.

If the number of the source data corresponding to the target encoder is larger than 1 in all the encoders, selecting the target source data from the source data corresponding to the target encoder according to the sequence of the source data corresponding to the target encoder, acquiring type information corresponding to the target source data by using the target encoder, executing corresponding encoding operation on the target source data according to the type information, generating field data, and storing the field data in storage equipment corresponding to the target encoder.

In addition, according to the ranking sequence of the encoders, an idle encoder is determined from the residual encoders in a preset encoder group, the idle encoder is used for obtaining the type information of the residual source data corresponding to the target encoder, corresponding encoding operation is performed on the residual source data according to the type information of the residual source data, the residual field data are generated, the idle encoder is used for adding corresponding field labels and field flag bits to the residual field data to generate a STEP field, and the STEP field is stored in the storage device corresponding to the idle encoder.

For example, the number of source data corresponding to a target encoder (i.e., encoder0) in all encoders is greater than 1, that is, the source data of tag0 and tag12 arrive at the same time, target source data (i.e., the source data of tag0) is selected from the source data of tag0 and tag12 corresponding to encoder0 according to the sequence of the source data of tag0 and tag12 corresponding to encoder0, type information of the source data of tag0 is acquired by encoder0, corresponding encoding operation is performed on the source data of tag0 according to the type information by encoder0, field data is generated, and the field data is stored in a register corresponding to encoder 0.

Meanwhile, an idle encoder, i.e., encoder1, is determined from the remaining encoders of the preset encoder group according to the rankings of the encoders, and the tag12 and the following fields thereof are moved backward, as shown in fig. 6. The source data of tag1 and tag12 do not arrive at the same time, and if the source data of tag1 and tag12 still arrive at the same time, the process continues to move backwards and forwards, and so on. Similarly, for other STEP fields, the method can be used to resolve coding conflicts, in order to coordinate the working conditions of the encoders, so as to avoid the situation that the same encoder needs to code two or more STEP fields at the same time.

The method comprises the STEPs of obtaining type information of remaining source data (namely, source data of tag 12) corresponding to an encoder0 by using the encoder1, performing corresponding encoding operation on the source data of tag12 according to the type information of the source data of tag12 by using the encoder1 to generate remaining field data, adding corresponding field tags and field flag bits to the remaining field data by using the encoder1 to generate a STEP field, and storing the STEP field in a register corresponding to the encoder 1.

In addition, for each of all encoders (i.e., all encoders determined above) except the target encoder, the following steps are performed: acquiring type information corresponding to corresponding source data, performing corresponding encoding operation on the corresponding source data according to the type information to generate field data, adding corresponding field tags and field flag bits to the corresponding field data to generate a STEP field, and storing the STEP field in storage equipment corresponding to the encoder. The specific execution flow may refer to the above embodiments, and the embodiments of the present invention are not described in detail herein.

It should be noted that, for the encoding collision, if the number of encoders is large enough, the probability of the encoding collision is small, and the encoding collision may not be considered.

S506, extracting the STEP fields in the storage device, and combining the STEP fields to generate STEP data.

In the embodiment of the present invention, this step is similar to the step S104, and the details of the embodiment of the present invention are not repeated herein.

Corresponding to the foregoing method embodiment, an embodiment of the present invention further provides an FPGA-based data processing apparatus, as shown in fig. 7, applied to an FPGA, where the apparatus may include: an encoder determination module 710, an information acquisition module 720, a data generation module 730, a field generation module 740, a field storage module 750, and a field merging module 760.

An encoder determining module 710, configured to determine, for each piece of source data, a corresponding encoder from a preset encoder group in a case where a plurality of pieces of source data are received;

an information obtaining module 720, configured to obtain, by using each encoder, type information of the corresponding source data;

a data generating module 730, configured to perform a corresponding encoding operation on the corresponding source data according to the type information, and generate field data;

a field generating module 740, configured to add a corresponding field tag and a field flag to the corresponding field data by using each encoder to generate a STEP field;

a field storage module 750, configured to store the STEP field in a storage device corresponding to each encoder;

a field merging module 760, configured to extract the STEP fields in the storage device for merging to generate STEP data.

An embodiment of the present invention further provides an electronic device, as shown in fig. 8, which includes a processor 81, a communication interface 82, a memory 83, and a communication bus 84, where the processor 81, the communication interface 82, and the memory 83 complete mutual communication through the communication bus 84,

a memory 83 for storing a computer program;

the processor 81 is configured to implement the following steps when executing the program stored in the memory 83:

under the condition that a plurality of pieces of source data are received, determining a corresponding encoder from a preset encoder group for each piece of source data; acquiring type information of the corresponding source data by using each encoder, and executing corresponding encoding operation on the corresponding source data according to the type information to generate field data; adding a corresponding field label and a field flag bit to the corresponding field data by using each encoder to generate a STEP field, and storing the STEP field in storage equipment corresponding to the encoder; and extracting the STEP fields in the storage equipment, and combining to generate STEP data.

The communication bus mentioned in the electronic device may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown, but this does not mean that there is only one bus or one type of bus.

The communication interface is used for communication between the electronic equipment and other equipment.

The Memory may include a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.

The Processor may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component.

In another embodiment of the present invention, a storage medium is further provided, where instructions are stored, and when the storage medium runs on a computer, the storage medium causes the computer to execute the FPGA-based data processing method according to any one of the above embodiments.

In yet another embodiment of the present invention, there is also provided a computer program product containing instructions which, when run on a computer, cause the computer to perform the FPGA-based data processing method of any one of the above embodiments.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a storage medium or transmitted from one storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The storage medium may be any available medium that can be accessed by a computer or a data storage device including one or more available media integrated servers, data centers, and the like. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.

The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.

Claims

1. A data processing method based on FPGA is characterized in that the method is applied to FPGA and comprises the following steps:

2. The method according to claim 1, wherein the determining, for each piece of source data, a corresponding encoder from a preset encoder group in case that a plurality of pieces of source data are received, comprises:

3. The method according to claim 2, wherein the preset configuration table stores type information corresponding to the source data; the obtaining, by each of the encoders, type information of the corresponding source data includes:

4. The method of claim 1, wherein the performing a corresponding encoding operation on the corresponding source data according to the type information to generate field data comprises:

5. The method according to claim 2, wherein the preset configuration table stores field tags and field flag bits corresponding to source data; the generating STEP fields by adding corresponding field labels and field flag bits to the corresponding field data by using each encoder includes:

6. The method of claim 1, wherein before the obtaining the type information of the corresponding source data by each of the encoders, the method further comprises:

7. The method of claim 6, further comprising:

8. The method of claim 7, further comprising:

9. The method of claim 1, wherein extracting the STEP field in the storage device for combining to generate STEP data comprises:

10. An FPGA-based data processing apparatus, applied to an FPGA, the apparatus comprising:

11. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;

a memory for storing a computer program;

a processor for implementing the method steps of any one of claims 1 to 9 when executing a program stored in the memory.

12. A storage medium on which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-9.