CN112054550B - Direct-current power mutual-aid method of multi-loop extra-high voltage direct-current feed-in alternating-current system - Google Patents

Direct-current power mutual-aid method of multi-loop extra-high voltage direct-current feed-in alternating-current system Download PDF

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CN112054550B
CN112054550B CN202010954154.XA CN202010954154A CN112054550B CN 112054550 B CN112054550 B CN 112054550B CN 202010954154 A CN202010954154 A CN 202010954154A CN 112054550 B CN112054550 B CN 112054550B
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CN112054550A (en
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姚良忠
彭晓涛
覃琴
徐箭
郭强
邓骏鹏
张健
程帆
韩家辉
张立波
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Wuhan University WHU
China Electric Power Research Institute Co Ltd CEPRI
State Grid Tianjin Electric Power Co Ltd
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China Electric Power Research Institute Co Ltd CEPRI
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38—Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H02J3/46—Controlling of the sharing of output between the generators, converters, or transformers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/10—Power transmission or distribution systems management focussing at grid-level, e.g. load flow analysis, node profile computation, meshed network optimisation, active network management or spinning reserve management
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/20—Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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Abstract

The invention provides a direct current power mutual aid method of a multi-loop extra-high voltage direct current feed-in alternating current system aiming at a multi-loop extra-high voltage direct current feed-in alternating current power grid scene. According to the method, a constraint model of a transmitting end and receiving end alternating current system is constructed through Thevenin equivalent parameters of the transmitting end and receiving end alternating current system and equivalent PQ node parameters of transmitting end and receiving end alternating current sides obtained through a quasi-steady state mathematical model; under the condition of multiple constraints, the maximum value of the active power fed into each loop of the direct current line is optimized and solved, the adjustable capacity of the direct current line is corrected according to the current direct current running state and the equivalent inertia of a sending end alternating current system of the direct current line, the frequency current reference droop coefficient of the direct current line is calculated according to the corrected adjustable capacity, and the direct current reference value of the direct current line is adjusted. The invention fully plays the role of power mutual aid among the multi-feed-in direct currents, and enhances the power supporting capability to improve the stability and robustness of a receiving end alternating current system.

Description

Direct-current power mutual-aid method of multi-loop extra-high voltage direct-current feed-in alternating-current system
Technical Field
The invention belongs to the field of active power control strategies of a multi-region alternating current-direct current power grid interconnection system, and particularly relates to a direct current power mutual aid method of a multi-loop extra-high voltage direct current feed-in alternating current system.
Background
With the continuous operation of ultrahigh voltage direct current transmission projects in China and the construction of western large-scale electric energy bases, the 'west-east transmission' becomes the current electric power transmission pattern in China. Meanwhile, as the load center of China is concentrated in the coastal area of southeast, a large number of existing and planned direct current lines are all fed into relevant areas. Taking Jiangsu of east China load center as an example, three extra-high voltage direct current feeds of +/-800 kV Sn union-Thai, +/-800 kV brocade screen-Sunan and +/-800 kV North-Thai of extra-high voltage direct current transmission project exist at present, and extra-high voltage direct current project is adopted for the planned water and electricity delivery of the white crane beach in the future. Because the extra-high voltage direct current has larger feed-in capacity and the running mode of a direct current system is influenced by a plurality of connected alternating current power grids, when a large disturbance fault occurs in a receiving end alternating current system to cause a power loss scene, such as a generator tripping situation and a certain return direct current unipolar or bipolar locking situation, the control capacity of the direct current system needs to be fully adjusted to realize the adjustment of unbalanced power, and the further expansion of the accident scale caused by the continuous falling of the frequency is avoided.
Because the extra-high voltage direct current transmission system is formed based on a grid commutation type converter (LCC), the converter absorbs a large amount of reactive power in the operation process, and a reactive compensation device needs to be arranged on the alternating current bus side of the converter to reduce reactive exchange with an alternating current system. Therefore, when the receiving end generates large disturbance to cause frequency drop, the alternating current voltage level of the transmitting end and the receiving end can be influenced by the mutual power compensation and the emergency power boost of the direct current line due to the limited capacity of the dynamic reactive power compensation device. Meanwhile, the operation of the converter comprises a plurality of control and amplitude limiting links, and the corresponding external characteristics of the converter can generate nonlinear change when the operation constraint is reached, so that the characteristic of the connected alternating current system needs to be fully considered for the improvement of the direct current power.
At present, the direct current fed-in emergency power boost strategy is mostly based on an offline calculation result, and the real-time operation information of the system cannot be fully utilized. The document 'real-time coordination control method for short-term frequency stability of multi-direct-current feed-in receiving-end power grid' proposes that schedulable resources such as energy storage in a system are calculated and coordinated in real time to carry out emergency frequency control based on an online frequency response model; in the literature, "research on direct current emergency power support for the third defense line" the emergency power support of the direct current system is realized by setting a frequency trigger threshold offline, and the frequency support of the direct current system on the alternating current power grid is realized by an action prior to the load shedding of the generator tripping; in the literature, "ac/dc power grid frequency stability control method based on multilayer support vector machines", a post-disturbance frequency stability prediction model, a frequency stability control mode judgment model and an optimal control strategy are respectively established through the multilayer support vector machines, so that optimal control and online application of direct-current emergency power support are realized.
The method determines the adjustable capacity of each return direct current line based on the online Thevenin equivalence of the alternating current system and the quasi-steady state mathematical model and the current operating point of the direct current converter under multiple constraints and on the basis of the characteristics of the alternating current system at the transmitting end and the receiving end. When different types of large disturbance occur in an alternating current system at a receiving end, so that frequency shock occurs and a large amount of unbalanced active power occurs, power mutual aid is performed through online calculation results of the multi-loop direct current system, and the frequency and the unbalanced power of the alternating current system are stably eliminated. The method realizes the reaction of the dynamic information of the power grid based on the on-line Thevenin equivalent scheme of the power grid of the transmitting end and the receiving end, the operation constraint and the current operation state of the alternating current and direct current system are fully considered by the power instruction of the direct current system, and the given operation power regulation strategy can reflect the regulation capacity of each direct current line. Therefore, the disturbance of a local system is stabilized, the power of the interconnected regional system is adjusted, and the stable and safe operation of the alternating current-direct current hybrid system is maintained.
Disclosure of Invention
The direct-current power mutual-aid method for the multi-loop extra-high voltage direct-current feed-in alternating-current system is provided aiming at the influence of the large disturbance of a receiving-end power grid of a multi-zone alternating-current and direct-current power grid interconnection system on the safe and stable operation of a receiving-end alternating-current system and overcoming the problem of a large amount of unbalanced active power caused by direct-current blocking and partial generator set offline. The frequency stability of each region in the multi-region power system is improved, and the operation flexibility of a direct current system and the energy mutual-aid capability of connecting an alternating current system are fully exerted.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method for mutually supplementing direct current power of a multi-loop extra-high voltage direct current fed alternating current system is characterized by comprising the following steps:
step 1: calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a sending end alternating current system corresponding to a direct current rectifier through an equivalent wearing Winan model of the sending end alternating current system fed by a plurality of extra-high voltage direct currents, calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a receiving end alternating current system corresponding to a direct current inverter through an equivalent wearing Winan model of a receiving end alternating current system fed by a plurality of extra-high voltage direct currents, calculating equivalent PQ node parameters on an alternating current side of the sending end through a quasi-stable state mathematical model of the extra-high voltage sending end rectifier containing a control mode, and calculating equivalent PQ node parameters on an alternating current side of the receiving end through a quasi-stable state mathematical model of the extra-high voltage receiving end inverter containing the control mode;
step 2: constructing a transmitting end alternating current system conversion bus voltage amplitude equality constraint model by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the transmitting end Thevenin equivalent model; constructing a voltage amplitude equality constraint model of a current conversion bus of a receiving end alternating current system by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the receiving end alternating current side of the receiving end Thevenin equivalent model; constructing a parameter amplitude inequality constraint condition of a controller of the sending end rectifier by combining a trigger angle of the direct current sending end rectifier and a phase change angle of the direct current sending end rectifier; constructing a parameter amplitude inequality constraint condition of a controller of the receiving end inverter by combining a turn-off angle of the direct current receiving end inverter and a phase change angle of the direct current receiving end inverter; constructing a transmission end rectifier grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the transmission end alternating current side; constructing a receiving-end inverter grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the receiving-end alternating-current side; further optimizing and solving to obtain the maximum value of the feed-in active power of each return direct-current line;
and step 3: the method comprises the steps of judging the adjustable capacity of a direct current line according to the current direct current running state by combining the maximum value of the feed-in active power of the direct current line, calculating the equivalent inertia of a sending end alternating current system of the direct current line, correcting the adjustable capacity of the direct current line according to the equivalent inertia of the sending end alternating current system of the direct current line, calculating a frequency current reference droop coefficient of the direct current line according to the corrected adjustable capacity of the direct current line, and adjusting the direct current reference value of the direct current line according to the frequency current reference droop coefficient of the direct current line.
Preferably, the step 1 of calculating the thevenin equivalent parameter internal potential and thevenin equivalent impedance of the alternating current system of the corresponding transmitting end of the direct current rectifier is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure BDA0002678021630000031
and the constraint:
Figure BDA0002678021630000032
wherein the content of the first and second substances,
Figure BDA0002678021630000033
the voltage vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure BDA0002678021630000034
the current vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure BDA0002678021630000035
the voltage vector of the i-th return direct current rectifier alternating current side bus at the time (k +1),
Figure BDA0002678021630000036
the current vector of the bus at the alternating current side of the ith return direct current rectifier at the (k +1) moment is obtained, so that the potential in thevenin equivalent parameters of the alternating current system at the corresponding transmitting end of the ith return direct current rectifier, namely the potential in thevenin equivalent parameters, is respectively solved
Figure BDA0002678021630000037
Thevenin equivalent impedance of the i-th return DC rectifier corresponding to the AC system at the transmitting end
Figure BDA0002678021630000038
i∈[1,m]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the Thevenin equivalent parameter internal potential and Thevenin equivalent impedance of the receiving end alternating current system corresponding to the direct current inverter is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure BDA0002678021630000041
and the constraint:
Figure BDA0002678021630000042
wherein the content of the first and second substances,
Figure BDA0002678021630000043
the voltage vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure BDA0002678021630000044
the current vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure BDA0002678021630000045
the voltage vector of the i-th return direct-current inverter alternating-current side bus at the time (k +1),
Figure BDA0002678021630000046
the current vector of the alternating-current side bus of the ith return direct-current inverter at the (k +1) moment is obtained, so that the potential in thevenin equivalent parameters of the corresponding receiving end alternating-current system of the ith return direct-current inverter, namely the potential in thevenin equivalent parameters, is respectively solved
Figure BDA0002678021630000047
Thevenin equivalent impedance of the i-th return DC inverter corresponding to the receiving end AC system
Figure BDA0002678021630000048
i∈[1,m]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the equivalent PQ node parameter on the AC side of the sending end through the quasi-steady state mathematical model of the extra-high voltage sending end rectifier with a control mode is as follows:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and according to a quasi-steady-state model direct current side equation of the converter:
Figure BDA0002678021630000049
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the output active power of the ith return direct current as follows:
Figure BDA0002678021630000051
wherein, PDCR,iThe output active power, R, representing the ith return DCDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；
Calculating the absorbed reactive power absorbed by the ith return direct current sending end rectifier as follows:
QACR,i＝tan(αR,i+μR,i/2)·PACR,i
wherein alpha isR,iRepresents the firing angle, mu, of the ith flyback rectifierR,iThe phase change angle of the ith return direct current sending end rectifier is shown as follows:
Figure BDA0002678021630000052
wherein, XTR,iRepresents the equivalent commutation reactance, U, of the i-th return DC sending end rectifierDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, alpha, of the i-th return DC lineR,iRepresents the trigger angle of the ith return DC sending end rectifier, i belongs to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage DC line, i belongs to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
further combining with the reactive power Q provided by the reactive power compensation device of the i-th return DC sending end rectifier AC side busCOMR,iObtaining the equivalent PQ node parameter of the alternating current side in the step 1;
the equivalent PQ node parameters of the sending end AC side in the step 1 comprise:
active power P output from the sending end AC system to the ith return DC rectifierACR,iThe absorption reactive power Q absorbed by the ith return DC sending end rectifierACR,iReactive power Q provided by reactive power compensation device of alternating current side bus of ith return direct current sending end rectifierCOMR,i；
In the step 1, the calculation of the equivalent PQ node parameter on the alternating current side of the receiving end through a quasi-steady state mathematical model containing a control mode of the extra-high voltage receiving end inverter specifically comprises the following steps:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and the operation mode comprises the following steps according to a quasi-steady-state model direct current side equation of the converter:
Figure BDA0002678021630000061
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the feed-in active power of the ith return direct current as follows:
Figure BDA0002678021630000062
wherein R isDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i。
Calculating the absorbed reactive power of the ith return direct current receiving end inverter as follows:
QACI,i＝tan(γI,i+μI,i/2)PDCI,i
wherein, γI,iRepresents the turn-off angle, mu, of the i-th DC receiving end inverterI,iThe method for representing the commutation angle of the ith return direct current receiving end inverter comprises the following specific calculation methods:
Figure BDA0002678021630000063
wherein, XTI,iRepresents the equivalent commutation reactance, U, of the i-th return DC receiving end inverterDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, gamma, of the i-th return lineI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter;
reactive power Q provided by combining with an i-th return direct current receiving end inverter alternating current side bus reactive power compensation deviceCOMI,iObtaining equivalent PQ node parameters of the receiving end alternating current side in the step 1;
in step 1, the equivalent PQ node parameters at the receiving end AC side include:
active power P absorbed by the receiving end alternating current system from the ith return direct current inverterACI,iThe absorbed reactive power absorbed by the ith return DC receiving end inverter is QACI,iThe reactive power Q provided by the reactive power compensation device of the alternating current side bus of the ith-return direct current receiving end inverterCOMI,i；
Active power P absorbed by receiving end alternating current system from ith return direct current inverterACI,i；
Absorbed reactive power Q absorbed by the ith return DC receiving end inverterACI,i；
Reactive power Q provided by reactive power compensation device of alternating current side bus of ith-return direct current receiving end inverterCOMI,i；
Preferably, the step 2 of constructing the voltage amplitude equality constraint model of the commutation bus of the sending-end alternating current system specifically comprises the following steps:
voltage amplitude E of commutation bus of i-th feedback DC sending end AC systemR,iComprises the following steps:
Figure BDA0002678021630000071
voltage amplitude E of commutation bus of sending end ac systemR,iMust be real number solution, otherwise, the voltage collapse phenomenon of the commutation bus of the sending end AC system occursI.e. ER,iThe imaginary part is zero, resulting in the following equality constraint:
Figure BDA0002678021630000072
wherein, UR,iRepresenting the voltage amplitude of the grid-connected bus of the ith return direct current rectification side converter; pDCR,iThe output active power of the ith return direct current is represented; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；BR,iConfiguring reactive compensation capacitor admittance for the ith return direct current sending end alternating current bus; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the step 2 of constructing the voltage amplitude equation constraint model of the current conversion bus of the receiving end alternating current system is as follows:
voltage amplitude E of commutation bus of i-th return direct current receiving end alternating current systemI,iComprises the following steps:
Figure BDA0002678021630000073
voltage amplitude E of commutation bus of sending end ac systemI,iMust be a real number solution, otherwise, the voltage collapse phenomenon of the converter bus of the sending-end alternating current system is shown, namely EI,iThe imaginary part is zero, resulting in the following equality constraint:
Figure BDA0002678021630000081
wherein, UI,iRepresents the voltage amplitude value, P, of the grid-connected bus of the ith-return DC inverter side converterDCI,iRepresenting the feed-in active power of the ith return direct current; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i；BI,iConfiguring reactive compensation for ith return direct current receiving end alternating current busCompensating capacitance admittance; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the constraint conditions of the parameter amplitude inequality of the sending end rectifier controller in the step 2 is specifically as follows:
combining the ith return direct current sending end equivalent Thevenin equivalent model parameters in the step 1, and adjusting the parameters according to a static system operation mode curve and the following constraint condition containing controller amplitude limiting:
Figure BDA0002678021630000082
respectively representing a commutation angle constraint, a trigger angle constraint and an arc-quenching angle constraint;
wherein, muR,iIndicating the commutation angle, alpha, of the i-th flyback converterR,iIndicating the firing angle, gamma, of the i-th flyback rectifierR,iThe trigger angle of the ith return direct current sending end rectifier is shown; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the inequality constraint condition of the parameter amplitude of the receiving inverter controller in the step 2 is as follows:
Figure BDA0002678021630000083
wherein, muI,iIndicating the commutation angle, alpha, of the i-th DC receiving inverterI,iIndicating the firing angle, gamma, of the i-th flyback rectifierI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the sending-end rectifier in the step 2 specifically comprises the following steps:
Figure BDA0002678021630000084
wherein, UR,iShowing the voltage amplitude of the grid-connected bus of the ith return direct current rectification side converter，QACR,iThe power which is absorbed by the ith return direct current sending end rectifier is shown;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the receiving-end inverter in the step 2 comprises the following steps:
Figure BDA0002678021630000091
wherein, UI,iRepresenting the voltage amplitude, Q, of the grid-connected bus of the i-th-return DC inverter side converterACI,iThe power which is absorbed reactive power and absorbed by the ith return direct current transmission end inverter is shown;
and calculating to obtain an optimal operation parameter by taking the maximum active power fed in from the receiving end as an objective function and combining the constructed constraint conditions, wherein the direct current power input expression of the ith return direct current receiving end is as follows:
Figure BDA0002678021630000092
wherein, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iRepresents the turn-off angle, U, of the i-th DC receiving end inverterR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, R, of the i-th flyback rectifierDC,iThe equivalent resistance of the ith return direct current line is represented; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 2, further optimizing and solving the maximum value of the feed-in active power of the direct current line as follows:
combining the operation mode of the given extra-high voltage sending end rectifier in the step 1 comprising constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprising constant arc-quenching angle Control (CEA) and constant direct current voltage Control (CV), substituting the minimum allowed arc-quenching angle value according to the constraint of the inequality of the parameters of the receiving end inverter controller, if the amplitude of the arc-quenching angle cannot meet other constraint conditions, properly increasing the amplitude of the arc-quenching angle according to the precision requirement,and substituting again. Until a certain extinction angle auxiliary value can meet all constraint conditions, recording the extinction angle amplitude as the optimal extinction angle amplitude gammaI,i *；
Combining the sending end quasi-steady state mathematical model in the step 1 to obtain a corresponding sending end rectifier turn-off angle parameter, which is recorded as alphaR,i *(ii) a Combining the quasi-steady state mathematical model of the sending terminal in step 1 to obtain the corresponding feed-in active power, which is recorded as the maximum value P of the feed-in active power of the ith return direct current lineDCI,i *，i∈[1,m]And is an integer, m is the number of turns of the extra-high voltage DC line
Preferably, in step 3, the maximum value of the fed-in active power of the dc line is combined, and the adjustable capacity of the dc line is determined according to the current dc running state as follows:
Figure BDA0002678021630000101
wherein, Δ PDCI,iFor adjustable capacity of i-th return DC line, PDCI,i *Maximum value of active power fed into the ith return DC line, PDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
and 3, calculating the equivalent inertia of the sending end alternating current system of the direct current line as follows:
Figure BDA0002678021630000102
wherein Hsys,iIs the equivalent inertia H of the sending end alternating current system of the ith return direct current lineG,k,iIs the inertia constant of the kth generator in the sending end AC system of the ith return DC line, Sk,iFor the capacity of the kth generator in the transmitting AC system of the ith return DC line, k ∈ [1, z ]]And is an integer, z is the total number of generators in the sending end alternating current system of the ith return direct current line;
Figure BDA0002678021630000103
is the sum of the generator capacities in the sending end AC system of the ith return DC line, j belongs to [1, z ]]And is an integer, z is the total number of generators in the sending end AC system of the ith return DC line, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
and 3, correcting the adjustable capacity of the direct current system according to the equivalent inertia of the sending end alternating current system of the direct current line into:
Figure BDA0002678021630000104
wherein D is a first load damping coefficient, R is a second load damping coefficient, fmin,iThe lower limit of the operating frequency f of the transmitting end system of the ith return direct current lineN,iFor the current operating frequency of the transmitting end system of the ith return line, i ∈ [1, m ]]And is an integer, m is the number of turns of the extra-high voltage DC line, tnadir,iThe droop coefficient, ζ, of the i-th feedback DC line's feed end system governoriThe damping ratio of a sending end system of the ith return direct current line is set;
tnadir,ifor the droop coefficient of the sending end system speed regulator of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000111
ζifor the droop coefficient damping ratio of the transmission end system speed regulator of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000112
ωn,ithe natural oscillation frequency of a sending end system of the ith return direct current line is expressed as follows:
Figure BDA0002678021630000113
ωrfor the damping frequency of the sending end system of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000114
αifor the gain coefficient of the sending end system of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000115
wherein, TRIs the reheating unit time constant of the i-th return direct current linemThe coefficient is the mechanical power gain of the sending end system of the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
correcting the adjustable capacity of the direct current system according to the current direct current running state, which specifically comprises the following steps:
Figure BDA0002678021630000116
wherein, Δ PDCI,i' is an i-th return DC line adjustable capacity correction value, PDCI,i' feed-in active power maximum correction value, P, for the ith return DC lineDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
if Δ PDCI,i′<ΔPDCI,iCorrecting the adjustable capacity of the direct current system; otherwise, the adjustable capacity of the DC system remains the same, i.e. Δ PDCI,i′＝ΔPDCI,i。
And 3, calculating the frequency current reference droop coefficient of the direct current line as follows:
Figure BDA0002678021630000121
wherein the content of the first and second substances,
Figure BDA0002678021630000122
calculating a frequency current reference droop coefficient, P, for the ith loopDCI,i' feed-in active power maximum correction value, U, for the ith return DC lineDCIN,iRated DC voltage, Δ f, for the i-th flyback line-to-DC converterlow,iFor the ith return direct current line receiving end alternating current system operation frequency lower limit fmin,iDifference from rated frequency, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 3, adjusting the dc current reference value of the dc line according to the frequency current reference droop coefficient of the dc line as follows:
the calculated frequency current of the ith return direct current line is referred to a droop coefficient Kfi,iAs a gain coefficient, the reference current at the sending end of the ith feedback direct current line is adjusted by positively feeding back the reference current to the given link of the direct current reference value of the ith feedback direct current line, specifically:
the direct current reference value of the original direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i
wherein, IDCref,iIs the DC reference value, K, of the ith return DC lineiAdjusting the coefficient for the direct current of the ith return line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSetting a direct current set value of an ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
after the frequency current reference droop coefficient parameter is added for control, the direct current reference value of the direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i+Kft,i(fN,i-fmin,i)
wherein, IDCref,iIs the ith returnReference value of the DC current of the DC line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSet value of the direct current of the ith return direct current line, Kft,iIs the frequency-current reference droop coefficient, f, of the ith return DC lineN,iRated frequency f of the i-th return direct current line receiving end alternating current systemmin,iSetting the lower limit of the operating frequency of an alternating current system at the receiving end of the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current line.
The invention has the advantages that under the condition that the receiving end alternating current system has large disturbance due to fault, the mutual power compensation between the direct current lines fed back to the receiving end alternating current system can be realized, and the safety and the stability of the receiving end alternating current system are improved.
Drawings
FIG. 1: is a flow chart of the method of the present invention;
FIG. 2: the invention is a schematic diagram of a typical multi-loop extra-high voltage direct current feed-in large-scale alternating current and direct current hybrid system;
FIG. 3: the invention is a schematic diagram of a DC power mutual-aid coordination control strategy.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following describes a dc power coordination method for a multi-loop extra-high voltage dc-fed ac system according to an embodiment of the present invention with reference to fig. 1 to 3, and the flow chart of the method of the present invention is shown in fig. 1, and includes the following steps:
step 1: calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a sending end alternating current system corresponding to a direct current rectifier through an equivalent wearing Winan model of the sending end alternating current system fed by a plurality of extra-high voltage direct currents, calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a receiving end alternating current system corresponding to a direct current inverter through an equivalent wearing Winan model of a receiving end alternating current system fed by a plurality of extra-high voltage direct currents, calculating equivalent PQ node parameters on an alternating current side of the sending end through a quasi-stable state mathematical model of the extra-high voltage sending end rectifier containing a control mode, and calculating equivalent PQ node parameters on an alternating current side of the receiving end through a quasi-stable state mathematical model of the extra-high voltage receiving end inverter containing the control mode;
in the step 1, the calculation of the Thevenin equivalent parameter internal potential and Thevenin equivalent impedance of the AC system at the corresponding transmission end of the DC rectifier is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure BDA0002678021630000131
and the constraint:
Figure BDA0002678021630000132
wherein the content of the first and second substances,
Figure BDA0002678021630000133
the voltage vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure BDA0002678021630000134
the current vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure BDA0002678021630000141
the voltage vector of the i-th return direct current rectifier alternating current side bus at the time (k +1),
Figure BDA0002678021630000142
the current vector of the alternating-current side bus of the ith return direct-current rectifier at the time of (k +1) is solved, so that the ith return direct-current rectifier pair is respectively solvedThe potential in thevenin equivalent parameters of the sending end alternating current system is
Figure BDA0002678021630000143
Thevenin equivalent impedance of the i-th return DC rectifier corresponding to the AC system at the transmitting end
Figure BDA0002678021630000144
i∈[1,m]And is an integer, m is the number of loops of the extra-high voltage direct current line, if as shown in fig. 2, m ═ 3 is the number of loops of the extra-high voltage direct current line;
in the step 1, the calculation of the Thevenin equivalent parameter internal potential and Thevenin equivalent impedance of the receiving end alternating current system corresponding to the direct current inverter is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure BDA0002678021630000145
and the constraint:
Figure BDA0002678021630000146
wherein the content of the first and second substances,
Figure BDA0002678021630000147
the voltage vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure BDA0002678021630000148
the current vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure BDA0002678021630000149
the voltage vector of the i-th return direct-current inverter alternating-current side bus at the time (k +1),
Figure BDA00026780216300001410
is the ith return at the time of (k +1)The current vector of the AC side bus of the DC inverter is solved, so that the potential in thevenin equivalent parameters of the corresponding receiving end AC system of the ith-turn DC inverter, namely the potential in thevenin equivalent parameters, is solved respectively
Figure BDA00026780216300001411
Thevenin equivalent impedance of the i-th return DC inverter corresponding to the receiving end AC system
Figure BDA00026780216300001412
i∈[1,m]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the equivalent PQ node parameter on the AC side of the sending end through the quasi-steady state mathematical model of the extra-high voltage sending end rectifier with a control mode is as follows:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and according to a quasi-steady-state model direct current side equation of the converter:
Figure BDA0002678021630000151
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the output active power of the ith return direct current as follows:
Figure BDA0002678021630000152
wherein, PDCR,iThe output active power, R, representing the ith return DCDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；
Calculating the absorbed reactive power absorbed by the ith return direct current sending end rectifier as follows:
QACR,i＝tan(αR,i+μR,i/2)·PACR,i
wherein alpha isR,iRepresents the firing angle, mu, of the ith flyback rectifierR,iThe phase change angle of the ith return direct current sending end rectifier is shown as follows:
Figure BDA0002678021630000153
wherein, XTR,iRepresents the equivalent commutation reactance, U, of the i-th return DC sending end rectifierDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, alpha, of the i-th return DC lineR,iRepresents the trigger angle of the ith return DC sending end rectifier, i belongs to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
further combining with the reactive power Q provided by the reactive power compensation device of the i-th return DC sending end rectifier AC side busCOMR,iObtaining the equivalent PQ node parameter of the alternating current side in the step 1;
the equivalent PQ node parameters of the sending end AC side in the step 1 comprise:
active power P output from the sending end AC system to the ith return DC rectifierACR,iThe absorption reactive power Q absorbed by the ith return DC sending end rectifierACR,iReactive power Q provided by reactive power compensation device of alternating current side bus of ith return direct current sending end rectifierCOMR,i；i∈[1,m]And is integralThe number m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the equivalent PQ node parameter on the alternating current side of the receiving end through a quasi-steady state mathematical model containing a control mode of the extra-high voltage receiving end inverter specifically comprises the following steps:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and the operation mode comprises the following steps according to a quasi-steady-state model direct current side equation of the converter:
Figure BDA0002678021630000161
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the feed-in active power of the ith return direct current as follows:
Figure BDA0002678021630000162
wherein R isDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i。
Calculating the absorbed reactive power of the ith return direct current receiving end inverter as follows:
QACI,i＝tan(γI,i+μI,i/2)PDCI,i
wherein, γI,iRepresents the turn-off angle, mu, of the i-th DC receiving end inverterI,iThe method for representing the commutation angle of the ith return direct current receiving end inverter comprises the following specific calculation methods:
Figure BDA0002678021630000171
wherein, XTI,iRepresents the equivalent commutation reactance, U, of the i-th return DC receiving end inverterDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, gamma, of the i-th return lineI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter;
reactive power Q provided by combining with an i-th return direct current receiving end inverter alternating current side bus reactive power compensation deviceCOMI,iObtaining equivalent PQ node parameters of the receiving end alternating current side in the step 1;
in step 1, the equivalent PQ node parameters at the receiving end AC side include:
active power P absorbed by the receiving end alternating current system from the ith return direct current inverterACI,iThe absorbed reactive power absorbed by the ith return DC receiving end inverter is QACI,iThe reactive power Q provided by the reactive power compensation device of the alternating current side bus of the ith-return direct current receiving end inverterCOMI,i；
Active power P absorbed by receiving end alternating current system from ith return direct current inverterACI,i；
Absorbed reactive power Q absorbed by the ith return DC receiving end inverterACI,i；
Reactive power Q provided by reactive power compensation device of alternating current side bus of ith-return direct current receiving end inverterCOMI,i；
Step 2: constructing a transmitting end alternating current system conversion bus voltage amplitude equality constraint model by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the transmitting end Thevenin equivalent model; constructing a voltage amplitude equality constraint model of a current conversion bus of a receiving end alternating current system by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the receiving end alternating current side of the receiving end Thevenin equivalent model; constructing a parameter amplitude inequality constraint condition of a controller of the sending end rectifier by combining a trigger angle of the direct current sending end rectifier and a phase change angle of the direct current sending end rectifier; constructing a parameter amplitude inequality constraint condition of a controller of the receiving end inverter by combining a turn-off angle of the direct current receiving end inverter and a phase change angle of the direct current receiving end inverter; constructing a transmission end rectifier grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the transmission end alternating current side; constructing a receiving-end inverter grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the receiving-end alternating-current side; and further optimizing and solving to obtain the maximum value of the feed-in active power of each return direct current line.
The step 2 of constructing the equivalent constraint model of the voltage amplitude of the commutation bus of the sending end alternating current system specifically comprises the following steps:
voltage amplitude E of commutation bus of i-th feedback DC sending end AC systemR,iComprises the following steps:
Figure BDA0002678021630000181
voltage amplitude E of commutation bus of sending end ac systemR,iMust be a real number solution, otherwise, the voltage collapse phenomenon of the converter bus of the sending-end alternating current system is shown, namely ER,iThe imaginary part is zero, resulting in the following equality constraint:
Figure BDA0002678021630000182
wherein, UR,iRepresenting the voltage amplitude of the grid-connected bus of the ith return direct current rectification side converter; pDCR,iThe output active power of the ith return direct current is represented; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；BR,iConfiguring reactive compensation capacitor admittance for the ith return direct current sending end alternating current bus; i is an element of [1, m ]]And is an integer, m isThe number of loops of the extra-high voltage direct current line;
the step 2 of constructing the voltage amplitude equation constraint model of the current conversion bus of the receiving end alternating current system is as follows:
voltage amplitude E of commutation bus of i-th return direct current receiving end alternating current systemI,iComprises the following steps:
Figure BDA0002678021630000183
voltage amplitude E of commutation bus of sending end ac systemI,iMust be a real number solution, otherwise, the voltage collapse phenomenon of the converter bus of the sending-end alternating current system is shown, namely EI,iThe imaginary part is zero, resulting in the following equality constraint:
Figure BDA0002678021630000184
wherein, UI,iRepresents the voltage amplitude value, P, of the grid-connected bus of the ith-return DC inverter side converterDCI,iRepresenting the feed-in active power of the ith return direct current; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i；BI,iConfiguring reactive compensation capacitor admittance for the ith return direct current receiving end alternating current bus; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the constraint conditions of the parameter amplitude inequality of the sending end rectifier controller in the step 2 is specifically as follows:
combining the ith return direct current sending end equivalent Thevenin equivalent model parameters in the step 1, and adjusting the parameters according to a static system operation mode curve and the following constraint condition containing controller amplitude limiting:
Figure BDA0002678021630000191
respectively representing a commutation angle constraint, a trigger angle constraint and an arc-quenching angle constraint;
wherein, muR,iIndicating the commutation angle, alpha, of the i-th flyback converterR,iIndicating the firing angle, gamma, of the i-th flyback rectifierR,iThe trigger angle of the ith return direct current sending end rectifier is shown; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the inequality constraint condition of the parameter amplitude of the receiving inverter controller in the step 2 is as follows:
Figure BDA0002678021630000192
wherein, muI,iIndicating the commutation angle, alpha, of the i-th DC receiving inverterI,iIndicating the firing angle, gamma, of the i-th flyback rectifierI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the sending-end rectifier in the step 2 specifically comprises the following steps:
Figure BDA0002678021630000193
wherein, UR,iRepresenting the amplitude, Q, of the i-th flyback rectifier side converter grid-connected bus voltageACR,iThe power which is absorbed by the ith return direct current sending end rectifier is shown;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the receiving-end inverter in the step 2 comprises the following steps:
Figure BDA0002678021630000194
wherein, UI,iRepresenting the voltage amplitude, Q, of the grid-connected bus of the i-th-return DC inverter side converterACI,iThe power which is absorbed reactive power and absorbed by the ith return direct current transmission end inverter is shown;
and calculating to obtain an optimal operation parameter by taking the maximum active power fed in from the receiving end as an objective function and combining the constructed constraint conditions, wherein the direct current power input expression of the ith return direct current receiving end is as follows:
Figure BDA0002678021630000201
wherein, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iRepresents the turn-off angle, U, of the i-th DC receiving end inverterR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, R, of the i-th flyback rectifierDC,iThe equivalent resistance of the ith return direct current line is represented; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 2, further optimizing and solving the maximum value of the feed-in active power of the direct current line as follows:
combining the operation mode of the given extra-high voltage sending end rectifier in the step 1 to comprise constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter to comprise constant extinction angle Control (CEA) and constant direct current voltage Control (CV), substituting the minimum extinction angle allowable value according to the constraint of the inequality of the parameter amplitude of the receiving end inverter controller, and if the extinction angle amplitude cannot meet other constraint conditions, properly increasing the extinction angle amplitude according to the precision requirement and substituting again. Until a certain extinction angle auxiliary value can meet all constraint conditions, recording the extinction angle amplitude as the optimal extinction angle amplitude gammaI,i *；
Combining the sending end quasi-steady state mathematical model in the step 1 to obtain a corresponding sending end rectifier turn-off angle parameter, which is recorded as alphaR,i *(ii) a Combining the quasi-steady state mathematical model of the sending terminal in step 1 to obtain the corresponding feed-in active power, which is recorded as the maximum value P of the feed-in active power of the ith return direct current lineDCI,i *，i∈[1,m]And is an integer, m is the number of turns of the extra-high voltage DC line
And step 3: the method comprises the steps of judging the adjustable capacity of a direct current line according to the current direct current running state by combining the maximum value of feed-in active power of the direct current line, calculating the equivalent inertia of a sending end alternating current system of the direct current line, correcting the adjustable capacity of the direct current line according to the equivalent inertia of the sending end alternating current system of the direct current line, calculating a frequency current reference droop coefficient of the direct current line according to the corrected adjustable capacity of the direct current line, and adjusting a direct current reference value of the direct current line according to the frequency current reference droop coefficient of the direct current line;
and 3, combining the maximum value of the feed-in active power of the direct-current line, and judging that the adjustable capacity of the direct-current line is as follows according to the current direct-current running state:
Figure BDA0002678021630000202
wherein, Δ PDCI,iFor adjustable capacity of i-th return DC line, PDCI,i *Maximum value of active power fed into the ith return DC line, PDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
and 3, calculating the equivalent inertia of the sending end alternating current system of the direct current line as follows:
Figure BDA0002678021630000211
wherein Hsys,iIs the equivalent inertia H of the sending end alternating current system of the ith return direct current lineG,k,iIs the inertia constant of the kth generator in the sending end AC system of the ith return DC line, Sk,iFor the capacity of the kth generator in the transmitting AC system of the ith return DC line, k ∈ [1, z ]]And is an integer, z is the total number of generators in the sending end alternating current system of the ith return direct current line;
Figure BDA0002678021630000212
is the sum of the generator capacities in the sending end AC system of the ith return DC line, j belongs to [1, z ]]And is an integer, z is the total number of generators in the sending end AC system of the ith return DC line, i belongs to [1, m ]]And is an integer, m is the loop of the extra-high voltage DC lineCounting;
and 3, correcting the adjustable capacity of the direct current system according to the equivalent inertia of the sending end alternating current system of the direct current line into:
Figure BDA0002678021630000213
wherein D is a first load damping coefficient, R is a second load damping coefficient, fmin,iThe lower limit of the operating frequency f of the transmitting end system of the ith return direct current lineN,iFor the current operating frequency of the transmitting end system of the ith return line, i ∈ [1, m ]]And is an integer, m is the number of turns of the extra-high voltage DC line, tnadir,iThe droop coefficient, ζ, of the i-th feedback DC line's feed end system governoriThe damping ratio of a sending end system of the ith return direct current line is set;
tnadir,ifor the droop coefficient of the sending end system speed regulator of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000214
ζifor the droop coefficient damping ratio of the transmission end system speed regulator of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000221
ωn,ithe natural oscillation frequency of a sending end system of the ith return direct current line is expressed as follows:
Figure BDA0002678021630000222
ωrfor the damping frequency of the sending end system of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000223
αifor the gain coefficient of the sending end system of the ith return direct current line, the expression is as follows:
Figure BDA0002678021630000224
wherein, TRIs the reheating unit time constant of the i-th return direct current linemThe coefficient is the mechanical power gain of the sending end system of the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
correcting the adjustable capacity of the direct current system according to the current direct current running state, which specifically comprises the following steps:
Figure BDA0002678021630000225
wherein, Δ PDCI,i' is an i-th return DC line adjustable capacity correction value, PDCI,i' feed-in active power maximum correction value, P, for the ith return DC lineDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
if Δ PDCI,i′<ΔPDCI,iCorrecting the adjustable capacity of the direct current system; otherwise, the adjustable capacity of the DC system remains the same, i.e. Δ PDCI,i′＝ΔPDCI,i。
And 3, calculating the frequency current reference droop coefficient of the direct current line as follows:
Figure BDA0002678021630000226
wherein the content of the first and second substances,
Figure BDA0002678021630000227
calculating a frequency current reference droop coefficient, P, for the ith loopDCI,i' feeding active power to the ith return DC lineHigh value correction value, UDCIN,iRated DC voltage, Δ f, for the i-th flyback line-to-DC converterlow,iFor the ith return direct current line receiving end alternating current system operation frequency lower limit fmin,iDifference from rated frequency, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 3, adjusting the dc current reference value of the dc line according to the frequency current reference droop coefficient of the dc line as follows:
the calculated frequency current of the ith return direct current line is referred to a droop coefficient Kfi,iAs a gain coefficient, the reference current at the sending end of the ith feedback direct current line is adjusted by positively feeding back the reference current to the given link of the direct current reference value of the ith feedback direct current line, specifically:
the direct current reference value of the original direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i
wherein, IDCref,iIs the DC reference value, K, of the ith return DC lineiAdjusting the coefficient for the direct current of the ith return line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSetting a direct current set value of an ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
after the frequency current reference droop coefficient parameter is added for control, the direct current reference value of the direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i+Kft,i(fN,i-fmin,i)
wherein, IDCref,iIs the DC reference value of the ith return DC line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSet value of the direct current of the ith return direct current line, Kft,iIs the frequency-current reference droop coefficient, f, of the ith return DC lineN,iRated frequency f of the i-th return direct current line receiving end alternating current systemmin,iSetting the lower limit of the operating frequency of an alternating current system at the receiving end of the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current line.
The reference current setting of the sending end of each direct current line is adjusted through a direct current reference value setting link and gain coefficient distribution shown in figure 3, so that power mutual aid and safe and stable operation level improvement under large disturbance of a receiving end alternating current system are realized.
The direct current power mutual-assistance method of the multi-circuit ultrahigh voltage direct current feed-in alternating current system has the advantages that when different types of large disturbances occur in the system, the frequency suddenly changes and a large amount of unbalanced active power occurs in the multi-circuit direct current receiving end alternating current system, power mutual-assistance can be carried out through the online calculation result of the multi-circuit direct current system, and the frequency and the unbalanced power of the alternating current system are stabilized to be eliminated. The equivalent load-on Winan model of the feed-in feed-out alternating current system fully applies the measurement information of the converter bus and reflects the new operation characteristic of the system before disturbance; the quasi-steady state mathematical model of the direct current converter fully considers the constraint characteristic of the saturation link of the controller; the power regulation capability of the direct current system fully considers the voltage operation constraint of the alternating current system, the operation characteristic and the operation state of the direct current system; the constraint of the inertia of a sending end system on the dynamic frequency is fully considered in the setting of each line frequency-current droop link of the direct current mutual aid strategy, and the power can be automatically adjusted according to the receiving end frequency deviation without mutual communication of each direct current line.
It should be understood that parts of the specification not set forth in detail are well within the prior art.
It should be understood that the above description of the preferred embodiments is given for clarity and not for any purpose of limitation, and that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (4)

1. A method for mutually supplementing direct current power of a multi-loop extra-high voltage direct current fed alternating current system is characterized by comprising the following steps:
step 1: calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a sending end alternating current system corresponding to a direct current rectifier through an equivalent wearing Winan model of a sending end alternating current system fed out by a plurality of extra-high voltage direct currents, calculating potential and Thevenin equivalent impedance in Thevenin equivalent parameters of a receiving end alternating current system corresponding to a direct current inverter through an equivalent wearing Winan model of a receiving end alternating current system fed in by a plurality of extra-high voltage direct currents, calculating equivalent PQ node parameters on an alternating current side of the sending end through a quasi-stable state mathematical model of the extra-high voltage sending end rectifier containing a control mode, and calculating equivalent PQ node parameters on an alternating current side of the receiving end through a quasi-stable state mathematical model of the extra-high voltage receiving end inverter containing the control mode;
step 2: constructing a transmitting end alternating current system conversion bus voltage amplitude equality constraint model by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the transmitting end Thevenin equivalent model; constructing a voltage amplitude equality constraint model of a current conversion bus of a receiving end alternating current system by combining the internal potential, the equivalent impedance and the equivalent PQ node parameter of the receiving end alternating current side of the receiving end Thevenin equivalent model; constructing a parameter amplitude inequality constraint condition of a controller of the sending end rectifier by combining a trigger angle of the direct current sending end rectifier and a phase change angle of the direct current sending end rectifier; constructing a parameter amplitude inequality constraint condition of a controller of the receiving end inverter by combining a turn-off angle of the direct current receiving end inverter and a phase change angle of the direct current receiving end inverter; constructing a transmission end rectifier grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the transmission end alternating current side; constructing a receiving-end inverter grid-connected bus operation inequality constraint condition by combining the equivalent PQ node parameter of the receiving-end alternating-current side; further optimizing and solving to obtain the maximum value of the feed-in active power of each return direct-current line;
and step 3: the method comprises the steps of judging the adjustable capacity of a direct current line according to the current direct current running state by combining the maximum value of the feed-in active power of the direct current line, calculating the equivalent inertia of a sending end alternating current system of the direct current line, correcting the adjustable capacity of the direct current line according to the equivalent inertia of the sending end alternating current system of the direct current line, calculating a frequency current reference droop coefficient of the direct current line according to the corrected adjustable capacity of the direct current line, and adjusting the direct current reference value of the direct current line according to the frequency current reference droop coefficient of the direct current line.
2. The method of claim 1, wherein the method further comprises the steps of:
in the step 1, the calculation of the Thevenin equivalent parameter internal potential and Thevenin equivalent impedance of the AC system at the corresponding transmission end of the DC rectifier is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure FDA0003517398430000011
and the constraint:
Figure FDA0003517398430000021
wherein the content of the first and second substances,
Figure FDA0003517398430000022
the voltage vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure FDA0003517398430000023
the current vector of the i-th return direct current rectifier alternating current side bus sampled at the moment k,
Figure FDA0003517398430000024
the voltage vector of the i-th return direct current rectifier alternating current side bus at the time (k +1),
Figure FDA0003517398430000025
the current vector of the bus at the alternating current side of the ith return direct current rectifier at the (k +1) moment is obtained, so that the potential in thevenin equivalent parameters of the alternating current system at the corresponding transmitting end of the ith return direct current rectifier, namely the potential in thevenin equivalent parameters, is respectively solved
Figure FDA0003517398430000026
Thevenin equivalent impedance of the i-th return DC rectifier corresponding to the AC system at the transmitting end
Figure FDA0003517398430000027
And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the Thevenin equivalent parameter internal potential and Thevenin equivalent impedance of the receiving end alternating current system corresponding to the direct current inverter is as follows:
defining the direction of the converter flowing into an alternating current system as the positive current direction, and establishing an equivalent parameter equation of a port:
Figure FDA0003517398430000028
and the constraint:
Figure FDA0003517398430000029
wherein the content of the first and second substances,
Figure FDA00035173984300000210
the voltage vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure FDA00035173984300000211
the current vector of the i-th return direct current inverter alternating current side bus sampled at the time k,
Figure FDA00035173984300000212
is (k +1)Returning to the voltage vector of the AC side bus of the DC inverter at the ith moment,
Figure FDA00035173984300000213
the current vector of the alternating-current side bus of the ith return direct-current inverter at the (k +1) moment is obtained, so that the potential in thevenin equivalent parameters of the corresponding receiving end alternating-current system of the ith return direct-current inverter, namely the potential in thevenin equivalent parameters, is respectively solved
Figure FDA00035173984300000214
Thevenin equivalent impedance of the i-th return DC inverter corresponding to the receiving end AC system
Figure FDA00035173984300000215
And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
in the step 1, the calculation of the equivalent PQ node parameter on the AC side of the sending end through the quasi-steady state mathematical model of the extra-high voltage sending end rectifier with a control mode is as follows:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and according to a quasi-steady-state model direct current side equation of the converter:
Figure FDA0003517398430000031
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the output active power of the ith return direct current as follows:
Figure FDA0003517398430000032
wherein, PDCR,iThe output active power, R, representing the ith return DCDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；
Calculating the absorbed reactive power absorbed by the ith return direct current sending end rectifier as follows:
QACR,i＝tan(αR,i+μR,i/2)·PACR,i
wherein alpha isR,iRepresents the firing angle, mu, of the ith flyback rectifierR,iThe phase change angle of the ith return direct current sending end rectifier is shown as follows:
Figure FDA0003517398430000033
wherein, XTR,iRepresents the equivalent commutation reactance, U, of the i-th return DC sending end rectifierDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, alpha, of the i-th return DC lineR,iIndicating the firing angle, U, of the i-th flyback rectifierR,iRepresenting the voltage amplitude of the grid-connected bus of the ith return direct current rectification side converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage DC line, i belongs to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
further combining with the reactive power Q provided by the reactive power compensation device of the i-th return DC sending end rectifier AC side busCOMR,iObtaining the equivalent PQ node parameter of the alternating current side in the step 1;
the equivalent PQ node parameters of the sending end AC side in the step 1 comprise:
active power P output from the sending end AC system to the ith return DC rectifierACR,iThe absorption reactive power Q absorbed by the ith return DC sending end rectifierACR,iReactive power Q provided by reactive power compensation device of alternating current side bus of ith return direct current sending end rectifierCOMR,i；
In the step 1, the calculation of the equivalent PQ node parameter on the alternating current side of the receiving end through a quasi-steady state mathematical model containing a control mode of the extra-high voltage receiving end inverter specifically comprises the following steps:
the operation mode of the given extra-high voltage sending end rectifier comprises constant Current Control (CC) and constant trigger angle Control (CF), the operation mode of the given extra-high voltage receiving end inverter comprises constant arc-extinguishing angle Control (CEA) and constant direct current voltage Control (CV), and the operation mode comprises the following steps according to a quasi-steady-state model direct current side equation of the converter:
Figure FDA0003517398430000042
wherein, UDCR，iRepresents the i-th DC return terminal DC voltage, UR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, U, of the i-th flyback rectifierDCI，iRepresents the i-th return DC receiving end DC voltage, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iThe arc extinguishing angle of the ith return DC receiving end inverter is shown, N represents the number of 6 pulse valve groups connected in series with the converter, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
calculating the feed-in active power of the ith return direct current as follows:
Figure FDA0003517398430000041
wherein R isDC,iThe equivalent resistance of the ith return line is expressed, i is equal to [1, m ∈]And is an integer which is the number of the whole,m is the number of loops of the extra-high voltage direct current line; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i；
Calculating the absorbed reactive power of the ith return direct current receiving end inverter as follows:
QACI,i＝tan(γI,i+μI,i/2)PDCI,i
wherein, γI,iRepresents the turn-off angle, mu, of the i-th DC receiving end inverterI,iThe method for representing the commutation angle of the ith return direct current receiving end inverter comprises the following specific calculation methods:
Figure FDA0003517398430000051
wherein, XTI,iRepresents the equivalent commutation reactance, U, of the i-th return DC receiving end inverterDCR，iRepresents the i-th DC return terminal DC voltage, UDCI，iRepresents the i-th return DC receiving end DC voltage RDC,iRepresenting the equivalent resistance, gamma, of the i-th return lineI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter; u shapeI,iRepresenting the voltage amplitude of the grid-connected bus of the ith return direct current inverter side converter;
reactive power Q provided by combining with an i-th return direct current receiving end inverter alternating current side bus reactive power compensation deviceCOMI,iObtaining equivalent PQ node parameters of the receiving end alternating current side in the step 1;
in step 1, the equivalent PQ node parameters at the receiving end AC side include:
active power P absorbed by the receiving end alternating current system from the ith return direct current inverterACI,iThe absorbed reactive power absorbed by the ith return DC receiving end inverter is QACI,iThe reactive power Q provided by the reactive power compensation device of the alternating current side bus of the ith-return direct current receiving end inverterCOMI,i；
Active power P absorbed by receiving end alternating current system from ith return direct current inverterACI,i；
Ith go straightAbsorbed reactive power Q absorbed by current receiving end inverterACI,i；
Reactive power Q provided by reactive power compensation device of alternating current side bus of ith-return direct current receiving end inverterCOMI,i。
3. The method of claim 1, wherein the method further comprises the steps of:
the step 2 of constructing the equivalent constraint model of the voltage amplitude of the commutation bus of the sending end alternating current system specifically comprises the following steps:
voltage amplitude E of commutation bus of i-th feedback DC sending end AC systemR,iComprises the following steps:
Figure FDA0003517398430000052
voltage amplitude E of commutation bus of sending end ac systemR,iMust be a real number solution, otherwise, the voltage collapse phenomenon of the converter bus of the sending-end alternating current system is shown, namely ER,iThe imaginary part is zero, resulting in the following equality constraint:
Figure FDA0003517398430000061
wherein, UR,iRepresenting the voltage amplitude of the grid-connected bus of the ith return direct current rectification side converter; pDCR,iThe output active power of the ith return direct current is represented; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power output by the sending end AC system to the ith return DC rectifier, namely PACR,i＝PDCR,i；BR,iConfiguring reactive compensation capacitor admittance for the ith return direct current sending end alternating current bus; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the voltage amplitude equality constraint model of the converting bus of the receiving end alternating current system in the step 2 is as follows:
voltage amplitude E of commutation bus of i-th return direct current receiving end alternating current systemI,iComprises the following steps:
Figure FDA0003517398430000062
voltage amplitude E of commutation bus of sending end ac systemI,iMust be a real number solution, otherwise, the voltage collapse phenomenon of the converter bus of the sending-end alternating current system is shown, namely EI,iThe imaginary part is zero, resulting in the following equality constraint:
Figure FDA0003517398430000063
wherein, UI,iRepresents the voltage amplitude value, P, of the grid-connected bus of the ith-return DC inverter side converterDCI,iRepresenting the feed-in active power of the ith return direct current; neglecting converter loss, the active power of the inflow and outflow converters is equal, namely the active power absorbed by the receiving end AC system from the ith return DC inverter, namely PACI,i＝PDCI,i；BI,iConfiguring reactive compensation capacitor admittance for the ith return direct current receiving end alternating current bus; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the construction of the constraint conditions of the parameter amplitude inequality of the sending end rectifier controller in the step 2 is specifically as follows:
combining the ith return direct current sending end equivalent Thevenin equivalent model parameters in the step 1, and adjusting the parameters according to a static system operation mode curve and the following constraint condition containing controller amplitude limiting:
Figure FDA0003517398430000071
respectively representing a commutation angle constraint, a trigger angle constraint and an arc-quenching angle constraint;
wherein, muR,iIndicating the commutation angle, alpha, of the i-th flyback converterR,iIndicating the firing angle, gamma, of the i-th flyback rectifierR,iThe trigger angle of the ith return direct current sending end rectifier is shown; i is an element of [1, m ]]And is an integer, m is a special numberThe number of high-voltage direct-current lines is counted;
the construction of the inequality constraint condition of the parameter amplitude of the receiving inverter controller in the step 2 is as follows:
Figure FDA0003517398430000072
wherein, muI,iIndicating the commutation angle, alpha, of the i-th DC receiving inverterI,iIndicating the firing angle, gamma, of the i-th flyback DC-receive rectifierI,iRepresenting the turn-off angle of the ith return direct current receiving end inverter; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the sending-end rectifier in the step 2 specifically comprises the following steps:
Figure FDA0003517398430000073
wherein, UR,iRepresenting the amplitude, Q, of the i-th flyback rectifier side converter grid-connected bus voltageACR,iThe absorbed reactive power absorbed by the ith return direct current sending end rectifier is shown;
the method for constructing the operation inequality constraint conditions of the grid-connected bus of the receiving-end inverter in the step 2 comprises the following steps:
Figure FDA0003517398430000074
wherein, UI,iRepresenting the voltage amplitude, Q, of the grid-connected bus of the i-th-return DC inverter side converterACI,iThe method comprises the steps that the absorbed reactive power absorbed by an ith return direct current sending end inverter is shown;
calculating to obtain an optimal operation parameter by taking the maximum active power fed in from a receiving end as an objective function and combining constraint conditions, wherein the direct current power input expression of the ith return direct current receiving end is as follows:
Figure FDA0003517398430000075
wherein, UDCI,iRepresents the amplitude of the DC voltage at the receiving end of the ith return DC line, IDC,iIndicating the value of the direct current of the ith return direct current line, N indicating the number of 6 pulsating valve groups connected in series with the converter, UI,iShowing the voltage amplitude, gamma, of the grid-connected bus of the i-th-return DC inverter side converterI,iRepresents the turn-off angle, U, of the i-th DC receiving end inverterR,iShowing the voltage amplitude, alpha, of the i-th flyback rectifier side converter grid-connected busR,iIndicating the firing angle, R, of the i-th flyback rectifierDC,iThe equivalent resistance of the ith return direct current line is represented; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 2, further optimizing and solving the maximum value of the feed-in active power of the direct current line as follows:
combining the operation mode of the given extra-high voltage sending end rectifier in the step 1 to contain constant current control CC and constant trigger angle control CF, the operation mode of the given extra-high voltage receiving end inverter to contain constant extinction angle control CEA and constant direct current voltage control CV, substituting the minimum extinction angle allowable value according to the inequality constraint of the parameter amplitude of the receiving end inverter controller, if the extinction angle amplitude can not meet other constraint conditions, properly increasing the extinction angle amplitude according to the precision requirement, substituting again until a certain extinction angle auxiliary value can meet all the constraint conditions, recording the extinction angle amplitude as the optimal extinction angle amplitude gammaI,i *；
Combining the sending end quasi-steady state mathematical model in the step 1 to obtain a corresponding sending end rectifier turn-off angle parameter, which is recorded as alphaR,i *(ii) a Combining the quasi-steady state mathematical model of the sending terminal in step 1 to obtain the corresponding feed-in active power, which is recorded as the maximum value P of the feed-in active power of the ith return direct current lineDCI,i *，i∈[1,m]And is an integer, m is the number of loops of the extra-high voltage direct current line.
4. The method of claim 1, wherein the method further comprises the steps of:
and 3, combining the maximum value of the feed-in active power of the direct-current line, and judging that the adjustable capacity of the direct-current line is as follows according to the current direct-current running state:
Figure FDA0003517398430000081
wherein, Δ PDCI,iFor adjustable capacity of i-th return DC line, PDCI,i *Maximum value of active power fed into the ith return DC line, PDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
and 3, calculating the equivalent inertia of the sending end alternating current system of the direct current line as follows:
Figure FDA0003517398430000091
wherein Hsys,iIs the equivalent inertia H of the sending end alternating current system of the ith return direct current lineG,k,iIs the inertia constant of the kth generator in the sending end AC system of the ith return DC line, Sk,iFor the capacity of the kth generator in the transmitting AC system of the ith return DC line, k ∈ [1, z ]]And is an integer, z is the total number of generators in the sending end alternating current system of the ith return direct current line;
Figure FDA0003517398430000092
is the sum of the generator capacities in the sending end AC system of the ith return DC line, j belongs to [1, z ]]And is an integer, z is the total number of generators in the sending end AC system of the ith return DC line, i belongs to [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
and 3, correcting the adjustable capacity of the direct current system according to the equivalent inertia of the sending end alternating current system of the direct current line into:
Figure FDA0003517398430000093
wherein D is a first load damping coefficient, R is a second load damping coefficient, fmin,iThe lower limit of the operating frequency f of the transmitting end system of the ith return direct current lineN,iFor the current operating frequency of the transmitting end system of the ith return line, i ∈ [1, m ]]And is an integer, m is the number of turns of the extra-high voltage DC line, tnadir,iThe droop coefficient, ζ, of the i-th feedback DC line's feed end system governoriThe damping ratio of a sending end system of the ith return direct current line is set;
tnadir,ifor the droop coefficient of the sending end system speed regulator of the ith return direct current line, the expression is as follows:
Figure FDA0003517398430000094
ζifor the droop coefficient damping ratio of the transmission end system speed regulator of the ith return direct current line, the expression is as follows:
Figure FDA0003517398430000095
ωn,ithe natural oscillation frequency of a sending end system of the ith return direct current line is expressed as follows:
Figure FDA0003517398430000101
ωrfor the damping frequency of the sending end system of the ith return direct current line, the expression is as follows:
Figure FDA0003517398430000102
αifor the gain coefficient of the sending end system of the ith return direct current line, the expression is as follows:
Figure FDA0003517398430000103
wherein, TR,iIs the reheating unit time constant of the i-th return direct current linem,iThe coefficient is the mechanical power gain of the sending end system of the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
correcting the adjustable capacity of the direct current system according to the current direct current running state, which specifically comprises the following steps:
Figure FDA0003517398430000104
wherein, Δ PDCI,i' is an i-th return DC line adjustable capacity correction value, PDCI,i' feed-in active power maximum correction value, P, for the ith return DC lineDCI0Currently feeding active power into the ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
if Δ PDCI,i′<ΔPDCI,iCorrecting the adjustable capacity of the direct current system; otherwise, the adjustable capacity of the DC system remains the same, i.e. Δ PDCI,i′＝ΔPDCI,i；
And 3, calculating the frequency current reference droop coefficient of the direct current line as follows:
Figure FDA0003517398430000105
wherein the content of the first and second substances,
Figure FDA0003517398430000106
calculating a frequency current reference droop coefficient, P, for the ith loopDCI,i' feed-in active power maximum correction value, U, for the ith return DC lineDCIN,iRated DC voltage, Δ f, for the i-th flyback line-to-DC converterlow,iFor the ith return direct current line receiving end alternating current system operation frequency lower limitfmin,iDifference from rated frequency, i is equal to [1, m ∈]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
step 3, adjusting the dc current reference value of the dc line according to the frequency current reference droop coefficient of the dc line as follows:
the calculated frequency current of the ith return direct current line is referred to a droop coefficient Kfi,iAs a gain coefficient, the reference current at the sending end of the ith feedback direct current line is adjusted by positively feeding back the reference current to the given link of the direct current reference value of the ith feedback direct current line, specifically:
the direct current reference value of the original direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i
wherein, IDCref,iIs the DC reference value, K, of the ith return DC lineiAdjusting the coefficient for the direct current of the ith return line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSetting a direct current set value of an ith return direct current line; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current circuit;
after the frequency current reference droop coefficient parameter is added for control, the direct current reference value of the direct current line is as follows:
IDCref,i＝|(KiIDC,i+UDCR,i),Idc_set,i|min-IDC,i+Kft,i(fN,i-fmin,i)
wherein, IDCref,iIs the DC reference value of the ith return DC line, IDC,iIs the value of the direct current of the ith return direct current line, UDCR,iTo represent the ith return DC supply terminal DC voltage, Idc_set,iSet value of the direct current of the ith return direct current line, Kft,iIs the frequency-current reference droop coefficient, f, of the ith return DC lineN,iRated frequency f of the i-th return direct current line receiving end alternating current systemmin,iFor the i-th return DC line receiving end ACA lower limit of the operating frequency of the flow system; i is an element of [1, m ]]And is an integer, m is the number of loops of the extra-high voltage direct current line.
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