CN112003954A - Data communication method, data communication system, and computer-readable storage medium - Google Patents
Data communication method, data communication system, and computer-readable storage medium Download PDFInfo
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- CN112003954A CN112003954A CN202011159435.2A CN202011159435A CN112003954A CN 112003954 A CN112003954 A CN 112003954A CN 202011159435 A CN202011159435 A CN 202011159435A CN 112003954 A CN112003954 A CN 112003954A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract
The invention provides a data communication method, a data communication system and a computer readable storage medium, wherein a data single wire is adopted for communication, the circuit structure on hardware is simple, only two wires of the data single wire and a ground wire are included, the wiring complexity is reduced, a slave machine realizes parasitic power supply through a charge-discharge capacitor, and an additional power line does not need to be arranged for the slave machine. When the software reads the data of the slave, the host reads the data through detecting the high and low levels of the single line of the data in a preset time interval, and the preset time interval for reading the data is determined by the host, so the host can adjust the baud rate of communication, and further adjust the communication rate.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a data communication method, a data communication system, and a computer-readable storage medium.
Background
With the development of science and technology, sensors are widely applied to production and life of people. The sensor sends the signal to the host computer after gathering the signal, and the host computer is handled data. The host computer usually adopts MCU (Microcontroller Unit), communicates through output pulse between sensor and the MCU, utilizes pulse number to represent numerical value, and when MCU frequency was lower, pulse number count was inaccurate, leads to communicating to have the error, and communication baud rate was unadjustable when utilizing pulse output to communicate, leads to the unable regulation of communication rate.
Disclosure of Invention
The invention aims to provide a data communication method, a data communication system and a computer readable storage medium.
In order to achieve one of the above objects, an embodiment of the present invention provides a data communication method, including:
receiving a conversion completion instruction after the slave machine performs data conversion according to the data reading request;
sending a read command to the slave in response to the translation completion instruction;
and reading the data collected by the slave machine according to the level signal responded by the slave machine in a preset time interval.
As a further improvement of an embodiment of the present invention, the step of sending a read command to the slave in response to the switch completion instruction includes:
and sending a low-level signal to the slave machine, sending a high-level signal and then releasing.
As a further improvement of an embodiment of the present invention, the step of sending a read command to the slave in response to the switch completion instruction includes:
and releasing after sending a low level signal to the slave.
As a further improvement of the embodiment of the present invention, the step of reading the data collected by the slave according to the level signal responded by the slave in the preset time interval includes:
receiving a low level signal sent by the slave machine and judging that the data is 0; or
And receiving a low-level signal and a high-level signal sent by the slave machine and judging that the data is 1.
As a further improvement of an embodiment of the present invention, before the step of receiving a conversion completion instruction after the slave performs data conversion according to the data reading request, the method further includes:
and sending a low-level signal to the slave machine in a time period T1 so that the slave machine performs data conversion after detecting the low-level signal.
As a further improvement of an embodiment of the present invention, before the step of receiving a conversion completion instruction after the slave performs data conversion according to the data reading request, the method further includes:
and sending a low level signal to a slave machine in a T2 time period to power down the slave machine, and releasing and sending a high level signal to the slave machine after a T2 time period to power up the slave machine and perform data conversion.
As a further refinement of an embodiment of the present invention, the data includes a sign bit, a data bit, and a check bit;
the check bits include a parity check code or a cyclic redundancy check code.
A data communication system comprises a host and a slave, wherein the host and the slave are connected through a data single wire;
the host comprises a first port and a second port, the first port is connected with the slave through the data single wire, and the second port is connected with the data single wire through a pull-up resistor and supplies power to the slave;
the host comprises a memory and a processor, wherein the memory stores a computer program which can run on the processor, and the processor realizes the steps of the data communication method when executing the computer program.
As a further improvement of an embodiment of the present invention, the slave includes a charge/discharge capacitor for charging when the data single line is at a high level, and for supplying power to the slave when the data single line is at a low level.
The present invention also provides a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the aforementioned data communication method.
Compared with the prior art, the host reads the data through detecting the high and low levels of the data single line in the preset time interval when the data of the slave is read, and the preset time interval for reading the data is determined by the host, so that the host can adjust the baud rate of communication, and further adjust the communication rate.
Drawings
FIG. 1 is a flow chart of a data communication method provided in one embodiment of the present invention;
FIG. 2 is a timing diagram of a data communication method according to an embodiment of the present invention;
fig. 3 is a timing diagram of a data communication method according to another embodiment of the present invention;
fig. 4 is a block diagram of a data communication system according to an embodiment of the present invention.
Detailed Description
The invention will be described in detail hereinafter with reference to an embodiment shown in the drawings. These embodiments are not intended to limit the present invention, and structural and functional changes made by those skilled in the art according to these embodiments are included in the scope of the present invention.
As described in the background art, in the field of sensor communication technology, a sensor is usually a slave, an MCU is a master, and the sensor acquires a signal and then sends the signal to the MCU for processing. In the conventional technology, on one hand, when the MCU master and the slave communicate with each other, the communication baud rate cannot be adjusted when the MCU master communicates with the slave, and therefore the communication rate cannot be adjusted, on the other hand, the sensor slave and the master generally communicate with each other using an I2C (Inter-Integrated Circuit, two-wire serial bus), the I2C communication bus uses a serial data line (SDA) and a Serial Clock Line (SCL) to perform bidirectional communication, and then a timing restriction is required between the SCL and the SDA, which increases the complexity of system control, and the two communication buses also increase the wiring complexity.
In order to solve the technical problems, the application provides a data communication method and a data communication system, which are used for communication between a host and a slave and achieve the purposes of adjustable communication baud rate, few communication lines and simple control.
As shown in fig. 1, a first embodiment of the present invention provides a data communication method for communication between a master and a slave, the communication method including the steps of:
s1: receiving a conversion completion instruction after the slave machine performs data conversion according to the data reading request;
before the step, the host sends a data reading request to the slave, the slave carries out data conversion according to the data reading request, and sends a data conversion completion instruction to the host after the conversion is completed. In this embodiment, the slave may be a sensor, such as a temperature sensor, a humidity sensor, a gas sensor, a current sensor, a pressure sensor, and the like, and the sensor acquires corresponding data and then sends the data to the host, and the host processes the data.
S2: sending a read command to the slave in response to the conversion completion instruction;
and after receiving the conversion completion instruction sent by the slave, the host sends a reading command to the slave so as to read the converted data of the slave.
S3: reading data collected by the slave according to the level signal responded by the slave in a preset time interval;
and the slave machine sends the data to the host machine after receiving the data reading command. In this embodiment, the master and the slave are connected by a data single line, data sent by the slave is transmitted by a digital signal, the digital signal can be represented by a high level and a low level on the data single line, the data single line responds according to the data of the slave, and the master reads the data of the slave by detecting the high level and the low level of the data single line within a preset time interval, wherein the preset time interval is from a reading start time to a reading end time.
In one embodiment, the method further includes the step of sending a data reading request by the host before the step of receiving a conversion completion instruction sent after the slave performs data conversion according to the data reading request at step S1. In one embodiment, sending a data read request comprises: and sending a low-level signal to the slave in the time period T1 so that the slave performs data conversion after detecting the low-level signal. Specifically, the master computer can pull down the data single line for a time period of T1, and the slave computer performs data conversion after detecting a low-level signal on the data single line, and converts the acquired data into a form that can be processed by the master computer. In this embodiment, the value of T1 may be selected as needed, for example, T1 is greater than 200 us.
In another embodiment, sending a data read request comprises: and sending a low level signal to the slave machine in a T2 time period to power down the slave machine, and releasing and sending a high level signal to the slave machine after a T2 time period to power up the slave machine and perform data conversion. Specifically, the host comprises a first port and a second port, the second port of the host is connected with the signal port of the slave through a data single wire, the first port of the host is connected to the data single wire through a pull-up resistor, a power supply in the host is connected with the pull-up resistor through the first port, and then the host can supply power to the slave through the pull-up resistor. The host machine enables the slave machine to be powered off by pulling the data single wires down for a time period of T2, the host machine releases after the time period of T2, the level of the data single wires is pulled high by the pull-up resistor, the slave machine is further powered on, and data conversion can be started after the slave machine is powered on. In this embodiment, to power down the slave, the pull-down time T2 of the data single line is much longer than T1, and T2 is usually 1 ms.
Further, after the master sends a data request, the slave performs data conversion, and after the data conversion of the slave is completed, the slave sends a data conversion completion instruction through the data single line, for example, the slave may pull down the data single line for a certain time, and start data acquisition after the master detects a low level signal on the data single line.
In one embodiment, the step S2 of sending the read command to the slave in response to the conversion completion instruction includes: and firstly sending a low-level signal to the slave, then sending a high-level signal to the slave, and then releasing. Specifically, as shown in FIG. 2, the host first pulls down T the single line of dataLThe duration is then increased by pulling up T the data single lineHReleasing after time length, sending prepared data through the data single line after the slave machine detects the level change on the data single line, and sending the prepared data through the data single line by the host machine in a preset time interval TBInternally reading data on the data single line, and after the data is read by the host, firstly pulling down T on the data single lineLDuration re-pull-up THReleasing after the time is long, and reading the next data until the data is completely read.
Further, when the data transmitted from the slave is 0, the slaveThe single line of the machine driving data is pulled down to be at a low level, the host reads data 0 after detecting the low level on the single line of the data, when the data sent by the slave is 1, the single line of the data is pulled up by a pull-up resistor, the host reads data 1 after detecting the high level on the single line of the data, and the time length for reading each bit of data by the host is TBAnd (6) determining. When the data single wire is pulled high by the pull-up resistor, the pull-up resistor simultaneously supplies power to the slave.
In another embodiment, the step S2 of sending the read command to the slave in response to the conversion completion instruction includes: and releasing after sending a low level signal to the slave. Specifically, as shown in FIG. 3, the host pulls down T the data single lineLReleasing after time length, sending data through the data single line after the slave machine detects the pulse falling edge on the data single line, reading the data on the data single line in a preset time interval by the host machine, and pulling down the data single line by T again after the host machine reads the dataLReleasing after the time is long, and reading the next data until the data is completely read.
Further, when the data sent by the slave is 0, the slave drives the data single line to be pulled down to be at a low level, the host reads the data 0 after detecting the low level, when the data sent by the slave is 1, the data single line is pulled up by a pull-up resistor, and the host waits for TsampleAnd reading the data on the data single line after the time length.
In one embodiment, the data read by the host includes sign bits, data bits, and check bits, wherein the check bits may be parity check codes, cyclic redundancy check codes, exclusive-or check codes, and the like.
As shown in fig. 4, an embodiment of the present invention provides a communication system including a master 100 and a slave 200, the master 100 and the slave 200 are connected by a data single line, and both the master 100 and the slave 200 are grounded through a ground line. The host 100 comprises a first port and a second port, the first port is connected with the slave 200 through a data single wire, the second port is connected with the data single wire through a pull-up resistor R and supplies power to the slave 200, the circuit structure on hardware is simple, only two wires of the data single wire and the ground wire are included, and the wiring complexity is reduced.
The host 100 comprises a memory storing a computer program that can be run on the processor and a processor that when executing the computer program can implement the steps of the aforementioned data communication method.
The slave 200 further includes a charge and discharge capacitor therein, and when the master 100 pulls up the level on the data single line through the pull-up resistor while the master 200 is being powered through the data single line when the master performs the aforementioned data communication method, the charge and discharge capacitor charges the charge and discharge capacitor in the slave 200 while the slave 200 is being powered through the data single line, and when the data single line is at a low level, the charge and discharge capacitor discharges to power the slave 200. Parasitic power supply is realized through the charge and discharge capacitor, an extra power line does not need to be arranged for the slave computer, the structure is simple, and the wiring complexity is reduced.
An embodiment of the present invention also provides a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the steps in the data communication method as described above.
In the several embodiments provided in the present application, it should be understood that the disclosed modules, systems and methods may be implemented in other manners. The above-described system embodiments are merely illustrative, and the division of the modules into only one logical functional division may be implemented in practice in other ways, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted, or not implemented.
The modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, that is, may be located in one place, or may also be distributed on a plurality of network modules, and some or all of the modules may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional module in the embodiments of the present application may be integrated into one processing module, or each module may exist alone physically, or 2 or more modules may be integrated into one module. The integrated module can be realized in a hardware form, and can also be realized in a form of hardware and a software functional module.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may be modified or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present application.
Claims (10)
1. A method of data communication, the method comprising:
the host receives a conversion completion instruction after the slave performs data conversion according to the data reading request;
sending a read command to the slave in response to the translation completion instruction;
reading data collected by the slave according to the level signal responded by the slave in a preset time interval;
the preset time interval is determined by the host, so that the host can adjust the baud rate of communication and further adjust the communication rate.
2. The data communication method according to claim 1, wherein the step of sending a read command to the slave in response to the conversion completion instruction includes:
and sending a low-level signal to the slave machine, sending a high-level signal and then releasing.
3. The data communication method according to claim 1, wherein the step of sending a read command to the slave in response to the conversion completion instruction includes:
and releasing after sending a low level signal to the slave.
4. The communication method according to claim 1, wherein the step of reading the data collected by the slave according to the level signal responded by the slave in a preset time interval comprises the following steps:
receiving a low level signal sent by the slave machine and judging that the data is 0; or
And receiving a high level signal sent by the slave machine and judging that the data is 1.
5. The data communication method according to claim 1, wherein the step of receiving a conversion completion instruction after the slave performs data conversion according to the data reading request further comprises:
and sending a low-level signal to the slave machine in a time period T1 so that the slave machine performs data conversion after detecting the low-level signal.
6. The data communication method according to claim 1, wherein the step of receiving a conversion completion instruction after the slave performs data conversion according to the data reading request further comprises:
and sending a low level signal to a slave machine in a T2 time period to power down the slave machine, and releasing and sending a high level signal to the slave machine after a T2 time period to power up the slave machine and perform data conversion.
7. The data communication method according to claim 1, wherein the data includes a sign bit, a data bit, and a check bit;
the check bits include a parity check code or a cyclic redundancy check code.
8. A data communication system is characterized by comprising a host and a slave, wherein the host and the slave are connected through a data single wire;
the host comprises a first port and a second port, the first port is connected with the slave through the data single wire, and the second port is connected with the data single wire through a pull-up resistor and supplies power to the slave;
the host computer comprises a memory and a processor, the memory storing a computer program operable on the processor, the processor implementing the steps in the data communication method of any one of claims 1 to 7 when executing the computer program.
9. The data communication system according to claim 8, wherein the slave includes a charge/discharge capacitor for charging when the data single line is at a high level and supplying power to the slave when the data single line is at a low level.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the data communication method according to any one of claims 1 to 7.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112948308A (en) * | 2021-02-05 | 2021-06-11 | 杭州微纳科技股份有限公司 | Asynchronous single-wire communication interface circuit |
| WO2023103731A1 (en) * | 2021-12-10 | 2023-06-15 | 舒继锋 | Multi-master power supply and communication system, method and device |
| CN116701289A (en) * | 2022-09-15 | 2023-09-05 | 荣耀终端有限公司 | Communication method and equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102904766A (en) * | 2011-07-27 | 2013-01-30 | 深圳英飞拓科技股份有限公司 | Baud rate identification method and device for serial communication and monitoring equipment |
| CN103942379A (en) * | 2014-04-14 | 2014-07-23 | 大连东软信息学院 | All-digital silicon controlled rectifier controller chip for three-phase alternating-current voltage regulation and rectification |
| CN106294238A (en) * | 2015-05-15 | 2017-01-04 | 杭州纳雄科技有限公司 | Single line powered data transfer circuit and transmission method |
| CN208819201U (en) * | 2018-10-31 | 2019-05-03 | 上海庆科信息技术有限公司 | A kind of two machine communication structure |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105591854A (en) * | 2015-08-17 | 2016-05-18 | 杭州华三通信技术有限公司 | Interaction method, device and system based serial bus |
| CN108826588B (en) * | 2018-05-11 | 2020-08-18 | 珠海格力电器股份有限公司 | Air conditioning unit communication method and device |
-
2020
- 2020-10-27 CN CN202011159435.2A patent/CN112003954B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102904766A (en) * | 2011-07-27 | 2013-01-30 | 深圳英飞拓科技股份有限公司 | Baud rate identification method and device for serial communication and monitoring equipment |
| CN103942379A (en) * | 2014-04-14 | 2014-07-23 | 大连东软信息学院 | All-digital silicon controlled rectifier controller chip for three-phase alternating-current voltage regulation and rectification |
| CN106294238A (en) * | 2015-05-15 | 2017-01-04 | 杭州纳雄科技有限公司 | Single line powered data transfer circuit and transmission method |
| CN208819201U (en) * | 2018-10-31 | 2019-05-03 | 上海庆科信息技术有限公司 | A kind of two machine communication structure |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112948308A (en) * | 2021-02-05 | 2021-06-11 | 杭州微纳科技股份有限公司 | Asynchronous single-wire communication interface circuit |
| WO2023103731A1 (en) * | 2021-12-10 | 2023-06-15 | 舒继锋 | Multi-master power supply and communication system, method and device |
| CN116701289A (en) * | 2022-09-15 | 2023-09-05 | 荣耀终端有限公司 | Communication method and equipment |
| CN116701289B (en) * | 2022-09-15 | 2024-04-12 | 荣耀终端有限公司 | Communication method and equipment |
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