CN111988093B - System on chip, chip and electronic equipment based on surface wave communication - Google Patents
System on chip, chip and electronic equipment based on surface wave communication Download PDFInfo
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- CN111988093B CN111988093B CN201910441225.3A CN201910441225A CN111988093B CN 111988093 B CN111988093 B CN 111988093B CN 201910441225 A CN201910441225 A CN 201910441225A CN 111988093 B CN111988093 B CN 111988093B
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Abstract
A first coating for propagating a surface wave and a second coating for absorbing the surface wave are provided in a propagation layer of a surface wave propagation device according to a communication relationship between devices on a chip. The communication relation between the on-chip devices can be realized through the first coating, and the surface wave used in the communication between the two devices is absorbed by the second coating and is not transmitted to other on-chip devices, so that the interference to other on-chip devices is avoided. And then the interference to other on-chip devices when any two on-chip devices in the on-chip system carry out surface wave communication is reduced, and a plurality of on-chip devices in the on-chip system can be allowed to simultaneously carry out communication without mutual interference.
Description
Technical Field
The present application relates to the field of chip technologies, and in particular, to a system on chip, a chip, and an electronic device based on surface wave communication.
Background
System-on-a-chip (SoC) refers to a technology for grouping electronic circuits of all or part of a chip into a whole system-on-chip (SoC) integrated on a single chip, and allows a plurality of independent devices on the chip to communicate via a network-on-chip (NoC).
In the prior art, surface wave communication has good plane propagation characteristics, and is increasingly applied to implement a network on chip in a system on chip, so that devices on chip in the system on chip can communicate with each other through surface waves. The surface wave propagation device is arranged above the plurality of on-chip devices integrated on the surface of the chip, any one of the on-chip devices can carry the transmitted communication data in the surface wave and transmit the communication data to the surface wave propagation device through the antenna, and the surface wave is spread and propagated to the other on-chip device along the surface wave propagation device. And enabling the other on-chip device to receive the surface wave from the surface wave propagation device through the antenna, and obtaining and processing communication data in the surface wave.
However, in the prior art, all on-chip devices in the system on chip can use the surface wave propagation device to communicate, so that when any two on-chip devices perform surface wave communication, other on-chip devices also receive surface waves from the surface wave propagation device, and further, the normal operation of other on-chip devices is disturbed. Therefore, how to reduce the interference to other devices on the chip when any two devices on the chip in the system on the chip perform surface wave communication is a technical problem to be solved in the field.
Disclosure of Invention
The application provides a system on chip, a chip and electronic equipment based on surface wave communication, which are used for reducing the interference of any two devices on chip in the system on chip to other devices on chip when surface wave communication is carried out on the devices, and allowing a plurality of devices on chip in the system on chip to be capable of carrying out communication simultaneously without mutual interference.
A first aspect of the present application provides a system on a chip based on surface wave communication, including:
a plurality of on-chip devices disposed on a chip, and a surface wave propagating device;
the plurality of on-chip devices support surface wave communications;
a surface wave propagation device includes: a metal layer disposed over the plurality of on-chip devices, and a propagation layer disposed between the chip and the metal layer;
the propagation layer includes: a first coating for propagating surface waves and a second coating for absorbing surface waves;
the first coating is arranged according to the communication relation of the plurality of on-chip devices;
the first coating at least comprises a first area which is distributed in a straight line;
the first area is used for communication between two on-chip devices connected with the first area based on surface waves.
Specifically, the present embodiment provides a surface wave communication-based system on chip in which a first coating layer for propagating a surface wave and a second coating layer for absorbing the surface wave are provided in a propagation layer of a surface wave propagation device according to a communication relationship between devices on chip. The communication relation between the on-chip devices can be realized through the first coating, and the surface wave used in the communication between the two devices is absorbed by the second coating and is not transmitted to other on-chip devices, so that the interference to other on-chip devices is avoided. And then the interference to other on-chip devices when any two on-chip devices in the on-chip system carry out surface wave communication is reduced, and a plurality of on-chip devices in the on-chip system can be allowed to simultaneously carry out communication without mutual interference.
In an embodiment of the first aspect of the present application,
the first area comprises at least two independent sub-areas, and each sub-area is linearly distributed;
and duplex communication is carried out between the two on-chip devices connected in the first area on the basis of the surface wave through at least the sub-area.
Specifically, in the present embodiment, the area disposed between two on-chip devices that need to communicate further includes at least two independent sub-areas, and each sub-area is also linearly distributed. Thereby enabling two on-chip devices on both sides of the first region to perform surface wave communication in a duplex manner through two independent sub-regions in the first region. Therefore, the system on chip provided by this embodiment can reduce interference to other devices on chip when two devices on chip perform surface wave communication, and simultaneously realize duplex communication between the two devices on chip.
In an embodiment of the first aspect of the present application,
the plurality of on-chip devices are distributed on the chip in a ring shape;
and a first coating is arranged between two adjacent on-chip devices in the plurality of on-chip devices distributed in a ring shape.
Specifically, in this embodiment, for on-chip devices that are distributed in a ring shape on a chip, a first coating layer that is also distributed in a ring shape is disposed on a propagation layer, so that interference to other on-chip devices when any two on-chip devices in a system on chip perform surface wave communication is reduced. Moreover, because the first coating is arranged between the annular on-chip devices, the on-chip system allows a plurality of on-chip devices to communicate simultaneously without mutual interference.
In an embodiment of the first aspect of the present application,
the plurality of on-chip devices are distributed on the chip in a star shape;
a first coating is disposed between the on-chip device at the center of the star and the other on-chip devices.
Specifically, in this embodiment, for on-chip devices distributed in a star shape on a chip, a first coating layer also distributed in a star shape is disposed on a propagation layer, so that interference to other on-chip devices when any two on-chip devices in a system on chip perform surface wave communication is reduced. And enables the on-chip devices in the star-shaped distribution center to communicate with any other on-chip device through the first coating.
In an embodiment of the first aspect of the present application,
the plurality of on-chip devices are distributed on the chip in a cascade manner;
the surface wave communication method is characterized in that a first coating is arranged between the on-chip devices distributed in a cascade manner, the on-chip devices positioned in the middle stage of the cascade distribution can be in surface wave communication with the on-chip devices of the previous stage and the next stage of the cascade connection in the middle stage through the first coating.
Specifically, in the present embodiment, for the on-chip devices distributed in a cascade on the chip, the corresponding first coating layer is disposed on the propagation layer according to the cascade relation of the on-chip devices. Therefore, the on-chip devices positioned in the middle level of the cascade distribution can carry out surface wave communication with the on-chip devices of the previous level and the next level of the cascade connection of the middle level through the first coating, and the interference of the surface waves to other on-chip devices is reduced.
In an embodiment of the first aspect of the present application,
the first coating layer includes: a dielectric coating;
the second coating layer includes: and (3) wave-absorbing coating.
Specifically, in this embodiment a first coating is provided that propagates surface waves through the dielectric coating and a second coating is provided that absorbs surface waves through the wave absorbing coating. So that the surface wave propagates in the propagation layer through the first coating and is absorbed on the other way through the second coating.
In an embodiment of the first aspect of the present application,
the thickness of the first coating layer is the same as the thickness of the second coating layer.
In an embodiment of the first aspect of the present application,
the thickness of the metal layer, the first coating layer and the second coating layer are all 0.5 mm.
In summary, in the embodiment, when the thickness of the first coating layer and the second coating layer is 0.5 mm, the minimum skin depth can be achieved by the minimum amount of metal used.
In an embodiment of the first aspect of the present application,
the material of the metal layer comprises: copper, silver or gold;
the materials of the dielectric coating include: polystyrene or potassium arsenide;
the wave-absorbing coating comprises the following materials: graphene or graphite.
A second aspect of the present application provides a chip comprising a system on chip based on surface wave communication according to any one of the above first aspects of the present application.
A third aspect of the application provides an electronic device comprising a chip as provided in the second aspect of the application.
In summary, the present application provides a system on chip, a chip and an electronic apparatus based on surface wave communication, wherein a first coating layer for propagating a surface wave and a second coating layer for absorbing the surface wave are provided in a propagation layer of a surface wave propagation device according to a communication relationship between devices on chip. The communication relation between the on-chip devices can be realized through the first coating, and the surface wave used in the communication between the two devices is absorbed by the second coating and is not transmitted to other on-chip devices, so that the interference to other on-chip devices is avoided. And then the interference to other on-chip devices when any two on-chip devices in the on-chip system carry out surface wave communication is reduced, and a plurality of on-chip devices in the on-chip system can be allowed to simultaneously carry out communication without mutual interference.
Drawings
FIG. 1 is a schematic diagram of an application scenario in which a system-on-chip uses surface wave communication;
FIG. 2 is a schematic diagram of a system-on-chip;
FIG. 3 is a schematic diagram of a disassembled structure of a system on a chip;
FIG. 4 is a schematic cross-sectional view of a system-on-chip;
FIG. 5 is a schematic diagram of a system on a chip using surface wave communications;
fig. 6 is a schematic diagram illustrating a disassembled structure of a system on chip based on surface wave communication according to the present application;
FIG. 7 is a schematic diagram illustrating an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided herein;
FIG. 8 is a schematic diagram illustrating an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided herein;
FIG. 9 is a schematic diagram illustrating an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided herein;
FIG. 10 is a schematic diagram illustrating an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided herein;
FIG. 11 is a schematic diagram illustrating an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided herein;
FIG. 12 is a schematic diagram of an embodiment of a chip provided herein;
fig. 13 is a schematic diagram of an embodiment of an electronic device provided in the present application.
Detailed Description
Fig. 1 is a schematic diagram of an application scenario of a system-on-chip (SoC) using surface wave communication, where the SoC includes: the chip 1, and a plurality of on-chip devices disposed on the chip 1, are exemplified by an on-chip device 11 and an on-chip device 12 in fig. 1.
The chip may also be referred to as an Integrated Circuit (IC), a microcircuit (microcircuit) or a microchip (microchip), and the like, and is a processing method for miniaturizing a circuit (mainly including a semiconductor device, and also including a passive component, and the like).
The on-chip device includes: multiple cores of a processor (CPU), a Graphics Processing Unit (GPU), a Random Access Memory (RAM), and the like. The device on chip is a novel tiny component without lead or short lead, can be called as a chip component, and is suitable for being installed on a chip without through holes.
With the development of miniaturization of the on-chip devices and the gradual increase of the number of the on-chip devices that can be arranged on the chip 1, more and more on-chip devices in the on-chip system communicate with each other through a network-on-chip (NoC). The network on chip is based on the technology of multiple devices on chip, and is used for realizing high-speed communication among the devices on chip by adopting a grouping routing mode for communication among the devices on chip and specifically forming a network through the devices on chip and connecting lines among the devices on chip.
In some on-chip networks, the high-speed communication between the on-chip devices is realized by printing metal wires between the on-chip devices which have communication relation on a chip, so that the high-speed communication between the on-chip devices is realized through the printed metal wires. Or in other networks on chip, each device on chip is provided with a chip antenna, and the devices on chip communicate with each other through a wireless communication technology on chip.
Although existing technologies such as metal wire network-on-chip, wireless network-on-chip, etc. have shown expected results in system-on-chip realizability. However, the above network on chip is still limited by problems such as power consumption, free space loss of signals, and signal interference, and thus there is still room for improvement in stability and reliability.
Therefore, in some network on chip, the devices on chip can communicate with each other through surface waves (surface waves). Wherein a surface wave can be defined as: propagating along the interface between the two media without radiated waves. Surface waves have many different types of propagation and can be propagated through a particular surface wave guided structure.
In particular, a zenneck surface wave is a surface wave that is used more often when communicating between devices on a chip in a network on a chip. The Zernike surface wave is an electromagnetic wave which can propagate on a metal-dielectric surface and has a specific solution of Maxwell equation set, and on the basis of the limited boundary condition, the Zernike wave has transverse magnetic mode characteristics and better propagation characteristics and carrier characteristics, so that the electric field of the Zernike wave along the propagation interface can be observed clearly. Therefore, the Zernike surface wave is widely applied to planar transmission, especially between devices on a chip, and has very practical value. The incident angle of the zernike surface wave is defined as the brewster angle, and when the zernike surface wave is incident on the surface wave guide structure at the brewster angle, the incident wave is free from reflection component and the surface wave is allowed to propagate along the surface of the surface wave guide structure.
For example, in the surface wave communication scenario of the system on chip shown in fig. 1, a single-point-to-single-point information transmission between the two on-chip devices is implemented by using a surface wave as a carrier medium between the on-chip device 11 and the on-chip device 12. The on-chip device 11 and the on-chip device 12 support surface wave communication, and transmit and receive surface waves and interconvert electrical signals and electromagnetic signals through a transceiver and a chip antenna integrated in the on-chip device based on a radio frequency technology, so that the surface wave signals are transmitted and received. A surface wave propagation device 2 is provided above a plurality of devices provided on the chip 1, and serves as a wave guide structure for causing a surface wave to propagate on the surface of the surface wave propagation device 2. The surface wave propagation device 2 includes a dielectric layer 22 and a metal layer 21, and the dielectric layer 22 is provided on the side close to the chip 1 and the metal layer 21 is provided on the side far from the chip 1.
In particular, when the on-chip device 11 needs to transmit data to the on-chip device 12, the data may be carried in a surface wave and transmitted through an antenna integrated in the on-chip device 11 at the brewster angle to the dielectric layer 22 of the surface wave propagation device 2. The metal layer 21 and the dielectric layer 22 in the surface wave propagating device 2 have different dielectric constants, so that the surface wave 3 is bound to the dielectric layer 22. Since the metal layer 21 and the dielectric layer 22 are both homogeneous media, the surface wave 3 propagates in a plurality of directions. When the surface wave 3 propagates to the upper end of the on-chip device 12, the antenna end integrated in the on-chip device 12 receives the surface wave and further processes the surface wave, and finally the on-chip device 11 sends the data to the on-chip device 12 through the surface wave.
Further, with the development of chip technology and the market demand for high performance, high integration chips, the number of devices on chip in a system on chip is increasing. Accordingly, there are more and more devices on chip capable of using surface wave communication, for example, fig. 2 is a schematic structural diagram of a system on chip. In the system on chip as shown in fig. 2, a chip 1 is provided with an on-chip device 11, an on-chip device 12, an on-chip device 13, and an on-chip device 14. And, the four on-chip devices all support surface wave communications.
Meanwhile, a surface wave propagation device 2 is further disposed above the four on-chip devices disposed on the chip 1, and the four on-chip devices all need to use the same surface wave propagation device 2 as a wave guide structure to perform communication based on surface waves. Specifically, reference may be made to fig. 3 and fig. 4, where fig. 3 is a disassembled structural diagram of an on-chip system, and fig. 4 is a cross-sectional structural diagram of an on-chip system.
As shown in fig. 3 and 4, the surface wave propagating device 2 provided above the on-chip device 11, the on-chip device 12, the on-chip device 13, and the on-chip device 14 provided on the chip 1 includes: a metal layer 21 and a dielectric layer 22.
Optionally, the surface area of the metal layer 21 and the surface area of the chip 1 are the same in size; or, alternatively, the surface area of the metal layer 21 is smaller than that of the chip 1, and when the metal layer 21 is disposed, the surface area needs to be able to cover a plurality of on-chip devices on the chip and satisfy the requirement of the on-chip devices for surface wave communication.
As shown in the cross-sectional view of fig. 4, the lower surfaces of the on- chip devices 11, 12, 13, and 14 are attached to the upper surface of the chip 1, and the upper surfaces of the on- chip devices 11, 12, 13, and 14 are attached to the lower surface of the metal layer 21.
Between the chip 1 and the metal layer 22, the spaces around the on- chip devices 11, 12, 13 and 14 are provided with a dielectric layer 22. That is, as shown in fig. 3, the dielectric layer 22 is provided with a through hole 111 for accommodating the on-chip device 11, and the shape of the through hole 111 matches the shape of the on-chip device 11; the dielectric layer 22 is further provided with a through hole 121 for accommodating the on-chip device 12, and the shape of the through hole 121 is matched with that of the on-chip device 12; the dielectric layer 22 is further provided with a through hole 131 for accommodating the on-chip device 13, and the shape of the through hole 131 is matched with that of the on-chip device 13; dielectric layer 22 is also provided with vias 141 for receiving on-chip devices 14, the shape of vias 141 matching the shape of on-chip devices 14.
When the on-chip device in the system-on-chip shown in fig. 2 performs surface wave communication, if the on-chip device 11 needs to transmit data to the on-chip device 12, the on-chip device 11 may carry the data in a surface wave and transmit the data through an antenna integrated in the on-chip device 11 at the dielectric layer 22 of the surface wave propagation apparatus 2 in the brewster angle.
It should be noted that the antenna shown in fig. 1 and 2 is only a schematic illustration, and in practical applications, the chip antenna may be integrally disposed inside the on-chip device, and the antenna is not visible from the external appearance of the on-chip device.
In this case, the propagation mode of the surface wave on the dielectric layer 22 can be referred to as fig. 5. Fig. 5 is a schematic diagram of a system on chip when using surface wave communication, as shown in fig. 5, after the device on chip 11 sends a surface wave to the dielectric layer 22, the surface wave is bound to the dielectric layer for propagation, when the surface wave propagates to the upper end of the device on chip 12, the antenna end integrated in the device on chip 12 receives the surface wave and further processes the surface wave, and finally, the device on chip 11 sends data to the device on chip 12 through the surface wave.
However, when the surface wave propagates through the dielectric layer 22, the initial incident point is a circular point, and the surface wave propagates in a direction of 360 degrees in a manner similar to "water drop on the surface wave" all around. Then, in addition to on-chip device 12, the surface waves propagated on dielectric layer 22 are received by both on-chip device 13 connected to dielectric layer 22 and the antenna integrated in on-chip device 14. Since the surface waves are not transmitted to the on- chip devices 13 and 14, the surface waves received by the on- chip devices 13 and 14 interfere with the normal processing of other surface waves. Also, in the system-on-chip shown in fig. 2-5, since all of the devices on-chip need to propagate surface waves through the same dielectric layer 22, the system-on-chip has multiple devices supporting surface wave communications, but can only provide simplex communications between any two devices on-chip. That is, only one on-chip device in the system-on-chip can transmit a surface wave through dielectric layer 22 at any one time.
Therefore, in order to solve the above technical problem, the present application provides a system on chip based on surface wave communication, so as to reduce interference to other devices on chip when any two devices on chip in the system on chip perform surface wave communication, and allow a plurality of devices on chip in the system on chip to simultaneously communicate without mutual interference.
The system on chip based on surface wave communication provided in the embodiments of the present application is clearly and completely described below with reference to the accompanying drawings, and the following specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Fig. 6 is a schematic structural diagram illustrating a disassembled structure of a system-on-chip based on surface wave communication according to the present application, in an embodiment shown in fig. 6, the system-on-chip based on surface wave communication includes:
the surface acoustic wave device includes a chip 1, a plurality of on-chip devices disposed on the chip 1, and a surface acoustic wave propagating apparatus 2 disposed above the plurality of on-chip devices.
Wherein each of the plurality of on-chip devices supports surface wave communication. The present application does not limit the specific manner in which the plurality of on-chip devices perform surface wave communication.
Optionally, the on-chip device realizes mutual conversion of an electrical signal and an electromagnetic signal on the on-chip device through the transceiver and the antenna integrated with the on-chip device, and the antenna is connected with a processing module for processing signals inside the on-chip device through a metal wire, so that the on-chip device can perform communication based on surface waves.
Optionally, in this embodiment, the plurality of on-chip devices support surface wave communication at a frequency band of 60GHz, and the antenna integrated in each on-chip device is a patch antenna, and the patch antenna is a small-sized millimeter wave antenna.
In this embodiment, the plurality of on-chip devices include: on-chip device 11, on-chip device 12, on-chip device 13, and on-chip device 14 are illustrated as examples.
The surface wave propagation device 2 specifically includes: a metal layer 21 and a propagation layer 22.
Wherein, optionally, the surface area of the metal layer 21 and the surface area of the chip 1 are the same in size; or, alternatively, the surface area of the metal layer 21 is smaller than that of the chip 1, and when the metal layer 21 is disposed, the surface area needs to be able to cover a plurality of on-chip devices on the chip and satisfy the requirement of the on-chip devices for surface wave communication.
Optionally, the material of the metal layer includes: copper, silver or gold.
The propagation layer 22 is disposed between the metal layer 21 and the chip 1 and within the space around the on-chip device 11, the on-chip device 12, the on-chip device 13, and the on-chip device 14. That is, the propagation layer 22 is provided with a through hole 111 for accommodating the on-chip device 11, and the shape of the through hole 111 matches the shape of the on-chip device 11; the propagation layer 22 is further provided with a through hole 121 for accommodating the on-chip device 12, and the shape of the through hole 121 is matched with that of the on-chip device 12; the propagation layer 22 is further provided with a through hole 131 for accommodating the on-chip device 13, and the shape of the through hole 131 is matched with that of the on-chip device 13; the propagation layer 22 is further provided with a through hole 141 for accommodating the on-chip device 14, and the shape of the through hole 141 is matched with the shape of the on-chip device 14.
Further, the propagation layer 22 provided in this embodiment specifically includes: a first coating 222 and a second coating 221. Reference is made to fig. 7 for a structure of the propagation layer 22, where fig. 7 is a schematic structural diagram of an embodiment of the propagation layer in the system on chip based on surface wave communication provided in the present application. As shown in fig. 7, the propagation layer 22 is provided with a first coating layer 222 and a second coating layer 221 at positions other than the through-hole 111, the through-hole 121, the through-hole 131, and the through-hole 141.
Optionally, the surface area of the propagation layer 22, the metal layer 21, and the chip 1 may be the same in size; alternatively, the surface area of the propagation layer 22 is smaller than that of the metal layer 21, and when the propagation layer is disposed, the surface area is required to be sufficient for the surface wave communication of the on-chip device.
Therein, the first coating 222 is used to propagate surface waves, i.e., surface waves can propagate through the first coating. In a particular implementation, the first coating needs to have a large impedance value, and the first coating may be a dielectric coating. Optionally, the material of the dielectric coating comprises: polystyrene or potassium arsenide.
The second coating 221 is used to absorb the surface wave, i.e., the surface wave is absorbed by the second coating and does not continue to propagate if it encounters the second coating during propagation. In a particular implementation, the second coating may be a wave-absorbing coating. Optionally, the material of the wave-absorbing coating comprises: graphene or graphite.
Optionally, the first coating 222 and the second coating 221 are the same thickness. In one specific implementation, the first coating 222 and the second coating 221 each have a thickness of 0.5 mm. Wherein, when the thickness of the first coating layer 222 and the second coating layer 221 is 0.5 mm, the minimum skin depth can be achieved with the minimum amount of metal used.
Alternatively, in the present embodiment, a coating spraying method may be used for the manufacturing method of the first coating layer 222 and the second coating layer 221 in the propagation layer.
Specifically, in the propagation layer 22 provided in the present embodiment, the distribution rule of the first coating layer 222 and the second coating layer 221 is set according to the communication relationship of the plurality of on-chip devices set on the chip 1. Also, the first coating 222 includes at least a first region disposed in a straight line between the two on-chip devices in communication, so that the surface wave communication can be performed through the first region in the first coating 222 between the two on-chip devices in communication.
That is, the first coating 222 needs to be disposed between two on-chip devices in communication relationship for guiding the surface wave to propagate only in a specific path and direction in which the first coating 222 is disposed, and the surface wave is absorbed by the second coating 221 after encountering the second coating 221 and does not propagate in the path and direction in which the second coating 221 is disposed.
For example, in the embodiment shown in fig. 6, the plurality of on-chip devices on the chip 1 are distributed in a ring shape, and the first coating layer may be disposed between two adjacent on-chip devices in a front-back order among the plurality of on-chip devices distributed in a ring shape.
Specifically, as shown in fig. 6, the on-chip device 11, the on-chip device 12, the on-chip device 13, and the on-chip device 14 are annularly distributed in a front-to-back order, a communication relationship exists between the on-chip device 11 and the on-chip device 12, a communication relationship exists between the on-chip device 12 and the on-chip device 13, a communication relationship exists between the on-chip device 13 and the on-chip device 14, and a communication relationship exists between the on-chip device 14 and the on-chip device 11.
With respect to the arrangement of the first coating 222 and the second coating 221 on the propagation layer 22, referring to fig. 7, according to the above-mentioned communication relationship, the first coating is arranged between the on-chip device 11 and the on-chip device 12, the first coating is arranged between the on-chip device 12 and the on-chip device 13, the first coating is arranged between the on-chip device 13 and the on-chip device 14, and the first coating is arranged between the on-chip device 14 and the on-chip device 11. Finally, a first coating 222, which is likewise distributed in a ring shape, is provided on the propagation layer 22, and a second coating 221 is provided on the propagation layer 22, except for the position of the first coating 222.
Therefore, in the system on chip as shown in fig. 6, the first coating layer disposed between the on-chip device 11 and the on-chip device 12 is referred to as a first region, which may also be understood as a first coating layer 222 disposed between the through hole 111 corresponding to the on-chip device 11 and the through hole 121 corresponding to the on-chip device 12 in the propagation layer 22.
Then when the on-chip device 11 needs to go to the on-chip device 12, the on-chip device 11 may carry the data in a surface wave and transmit at the brewster angle to the first region of the first coating 222 through an antenna integrated in the on-chip device 11. The surface wave will then propagate along the first area in a straight line to the on-chip device 12. When the surface wave propagates to the upper end of the on-chip device 12, the antenna end integrated in the on-chip device 12 receives the surface wave from the first area and further processes the surface wave, and finally, the on-chip device 11 transmits the data to the on-chip device 12 through the surface wave through the first area in the first coating 222.
Meanwhile, since the first coating 222 is for propagating surface waves and the second coating 221 is for absorbing surface waves, when the on-chip device 11 transmits surface waves to the on-chip device 12 through the first area, surface waves propagating to other directions are absorbed by the second coating 221 disposed around the first area in addition to surface waves propagating to the on-chip device 12 in a straight direction. And the surface wave sent by the on-chip device 11 to the on-chip device 12 does not reach the on-chip device 13 directly nor the on-chip device 14 directly. Therefore, the interference of any two on-chip devices in the system on chip to other on-chip devices during surface wave communication is reduced.
Further, in the system-on-chip shown in fig. 6, since the ring-shaped devices-on-chip are all provided with the first coating layer therebetween, the system-on-chip allows a plurality of devices-on-chip to communicate simultaneously without interfering with each other. For example, while the on-chip device 11 transmits surface waves to the on-chip device 12 through the first coating disposed therebetween, the on-chip device 13 may also transmit surface waves to the on-chip device 13 through the first coating disposed therebetween and the on-chip device 14.
It should be noted that, in the example shown in fig. 7, the first coating layer disposed between two adjacent through holes on the propagation layer 22 is illustrated as a standard rectangle, and in an actual implementation, the first coating layer disposed between two adjacent through holes on the propagation layer 22 may also be an irregular shape, such as a diamond, a trapezoid, a triangle, and the like. Only need satisfy between two through-holes can sharp connection through first coating can, the device on the chip that two through-holes correspond like this can carry out surface wave communication through the part that is sharp connection in the first coating between two through-holes.
Further, in the embodiments shown in fig. 6 and 7, if the on-chip devices are distributed in a ring shape, two on-chip devices that are not directly adjacent to each other in front and back need to communicate using a surface wave. For example, if the on-chip device 12 needs to send data to the on-chip device 13 by surface waves, the on-chip device 12 may first send surface waves to the on-chip device 14 through the first coating disposed between the on-chip device and the on-chip device 14; subsequently, the on-chip device 14 transmits the received surface wave to the on-chip device 13 through the first coating layer provided between it and the on-chip device 13. At this time, the on-chip device 14 may function as a relay.
Further alternatively, for example, if the plurality of on-chip devices on the chip 1 are distributed in a star shape, the first coating layer may be disposed between the on-chip device located at the center of the star shape and other on-chip devices among the plurality of on-chip devices distributed in a star shape.
Specifically, fig. 8 is a schematic structural diagram of an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided by the present application, as shown in fig. 8, the system-on-chip provided by the present application includes devices a-I distributed in a star shape. The on-chip device A is a central on-chip device and is positioned in a star-shaped central position; the on-chip devices B-I are secondary on-chip devices, the on-chip devices B-I are respectively in communication relation with the on-chip device A, and any two on-chip devices between the on-chip devices B-I are not in direct communication relation.
In the present example, when the first coating 222 and the second coating 221 are provided in the propagation layer 22, the first coating 222 is provided between the through-holes corresponding to the on-chip device a and the through-holes corresponding to the on-chip devices B-I, respectively, and the second coating 221 is provided in the propagation layer 22 in addition to the first coating 222, and finally the first coating 222 is provided on the propagation layer 22, which is also distributed in a star shape. For specific implementation of the first coating 222 and the second coating 221, reference may be made to the embodiments shown in fig. 6 and fig. 7, and details are not repeated.
Or, when the plurality of on-chip devices on the chip 1 are distributed in a cascade, the first coating is disposed between the on-chip devices in the cascade distribution. The device on chip at the intermediate level of the cascade distribution can perform surface wave communication with the device on chip at the previous level and the device on chip at the next level of the cascade connection of the intermediate level through the first coating.
For example, fig. 9 is a schematic structural diagram of an embodiment of a propagation layer in a system on chip based on surface wave communication provided by the present application, and in an example shown in fig. 9, the propagation layer includes devices on chip distributed in cascade, where a first stage includes a device on chip a, a second stage includes B-I devices on chip, and a third stage includes J … K … L … M devices on chip. The on-chip devices are connected outwards layer by layer in a cascading mode.
Then in this example, when the first coating 222 and the second coating 221 in the propagation layer 22 are disposed, the first coating is disposed between the through holes corresponding to the devices on the first level and the through holes corresponding to the devices on the second level, for example, between the through holes corresponding to the devices a on the chip and the through holes corresponding to the devices B-I on the chip; moreover, a first coating is arranged between the through hole corresponding to the device on the second-level chip and the through hole corresponding to the device on the third-level chip respectively; for example, a first coating is provided between a through hole corresponding to the on-chip device B and a through hole corresponding to the on-chip device J, a first coating is provided between a through hole corresponding to the on-chip device D and a through hole corresponding to the on-chip device K, a first coating is provided between a through hole corresponding to the on-chip device F and a through hole corresponding to the on-chip device L, a first coating is provided between a through hole corresponding to the on-chip device H and a through hole corresponding to the on-chip device M, a first coating is provided between a through hole corresponding to the on-chip device C and a through hole corresponding to any one of the on-chip devices J-K, a first coating is provided between a through hole corresponding to the on-chip device E and a through hole corresponding to any one of the on-chip devices K-L, a first coating is provided between a through hole corresponding to the on-chip device G and a through hole corresponding to any one of the on-chip devices L-M, And a first coating is arranged between the through hole corresponding to the on-chip device I and the through hole corresponding to any on-chip device between the on-chip devices M-J.
Fig. 10 is a schematic structural diagram of an embodiment of a propagation layer in a system on chip based on surface wave communication provided by the present application, and fig. 10 shows another system on chip in which devices on chip are in a cascaded distribution. The first level comprises on-chip devices A1-A4, and the second level comprises on-chip devices B1-B4, so that the on-chip devices are connected outwards layer by layer in a cascading mode.
Then in this example, when the first coating 222 and the second coating 221 in the spreading layer 22 are disposed, the first coating is disposed between the through holes corresponding to the devices on the first level and the through holes corresponding to the devices on the second level, for example, the first coating is disposed between the through holes corresponding to the device on the first level a1 and the through holes corresponding to the devices on any one of the devices on the second level B1-B2, the first coating is disposed between the through holes corresponding to the device on the first level a2 and the through holes corresponding to the devices on any one of the devices on the second level B2-B3, the first coating is disposed between the through holes corresponding to the device on the first level A3 and the through holes corresponding to the devices on any one of the devices on the second level B3-B4, and the first coating is disposed between the through holes corresponding to the device on the first level a4 and the through holes corresponding to the devices on any one of the devices on the second level B4-B1.
Further, in each of the above embodiments, when the first coating layer is provided between two on-chip devices having a communication relationship, only the first region connected in a single straight line is provided between the two on-chip devices, and therefore, it is possible to satisfy the requirement that the surface wave communication is performed in a simplex manner between the two on-chip devices connected in the first region. That is, when one of the two on-chip devices on both sides of the first area transmits a surface wave using the first area, the other on-chip device cannot transmit a surface wave using the first area but can receive a surface wave using only the first area.
Therefore, on the basis of the above embodiments, the first region further comprises at least two independent sub-regions, and each sub-region is also linearly distributed. Thereby enabling two on-chip devices on both sides of the first region to perform surface wave communication in a duplex manner through two independent sub-regions in the first region.
Specifically, fig. 11 is a schematic structural diagram of an embodiment of a propagation layer in a system-on-chip based on surface wave communication provided by the present application, and in the example shown in fig. 11, based on the embodiment shown in fig. 7, when the propagation layer 22 is disposed, a first region disposed between a via 111 corresponding to the on-chip device 11 and a via 121 corresponding to the on-chip device 12 specifically includes: a first subregion 31 and a second subregion 32. Wherein, the first subregion 31 and the second subregion 32 are both linearly distributed.
When the on-chip device 11 and the on-chip device 12 perform surface wave communication, the on-chip device 11 may send a surface wave carrying data to the on-chip device 12 through the first sub-region 31, and at the same time, the on-chip device 12 may also send a surface wave carrying data to the on-chip device 11 through the second sub-region 32, thereby implementing duplex communication between the on-chip device 11 and the on-chip device 12 through the surface wave.
In summary, the present application provides a system-on-chip based on surface wave communication, in which a first coating layer for propagating a surface wave and a second coating layer for absorbing the surface wave are disposed in a propagation layer of a surface wave propagation apparatus according to a communication relationship between devices on-chip. The communication relation between the on-chip devices can be realized through the first coating, and the surface wave used in the communication between the two devices is absorbed by the second coating and is not transmitted to other on-chip devices, so that the interference to other on-chip devices is avoided. And then the interference to other on-chip devices when any two on-chip devices in the on-chip system carry out surface wave communication is reduced, and a plurality of on-chip devices in the on-chip system can be allowed to simultaneously carry out communication without mutual interference.
Meanwhile, based on the design of the propagation layer in the application, the surface wave network on chip with interconnection on multiple nodes can be further supported. The surface wave propagation line is controlled and calculated based on a device or a device group on a central chip, such as a multi-core processor, so that the unicast, multicast and broadcast efficiency in the system on chip is obviously improved, and the channel capacity of the system on chip is effectively increased.
Fig. 12 is a schematic diagram of an embodiment of a chip provided in the present application. As shown in fig. 12, the present application further provides a chip 12, where the chip 12 includes any one of the above embodiments of the present application, namely, the surface wave communication-based system-on-chip 1201.
Optionally, the chip comprises: chip in the cell-phone, chip in the panel computer, chip in the notebook computer, or, the chip still includes: chips in intelligent devices such as intelligent watches, intelligent bracelets and intelligent sound boxes.
Fig. 13 is a schematic diagram of an embodiment of an electronic device provided in the present application. As shown in fig. 13, the present application further provides an electronic device 13, where the electronic device 13 includes a chip 12 as shown in fig. 12, where the chip includes a system on chip based on surface wave communication as described in any of the above embodiments.
Optionally, the electronic device comprises: cell-phone, panel computer, notebook computer, or, electronic equipment still includes: intelligent electronic equipment such as intelligent wrist-watch, intelligent bracelet and intelligent audio amplifier.
Finally, it is noted that the terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein.
Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Meanwhile, the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.
Claims (11)
1. A system-on-a-chip based on surface wave communication, comprising:
a plurality of on-chip devices disposed on a chip, and a surface wave propagating device;
the plurality of on-chip devices support surface wave communications;
the surface wave propagating apparatus includes: a metal layer disposed over the plurality of on-chip devices, and a propagation layer disposed between the chip and the metal layer, the propagation layer being within a space around the plurality of on-chip devices;
the propagation layer includes: a first coating for propagating surface waves and a second coating for absorbing surface waves;
the first coating is arranged according to the communication relation of the plurality of on-chip devices;
the first coating at least comprises a first area which is linearly distributed between the two on-chip devices, and the straight line is a straight line corresponding to a connecting line of the two on-chip devices;
and the first area is used for communicating between the two on-chip devices connected with the first area based on surface waves.
2. The system-on-chip of claim 1,
the first area comprises at least two independent sub-areas, and each sub-area is distributed in a straight line;
and duplex communication is carried out between the two on-chip devices connected in the first area based on the surface wave through the at least sub-area.
3. The system-on-chip of claim 1 or 2,
the plurality of on-chip devices are distributed on the chip in a ring shape;
and a first coating is arranged between two adjacent on-chip devices in the plurality of on-chip devices distributed in the annular shape.
4. The system-on-chip of claim 1 or 2,
the plurality of on-chip devices are distributed on the chip in a star shape;
a first coating is disposed between the on-chip device at the star center and the other on-chip devices.
5. The system-on-chip of claim 1 or 2,
the plurality of on-chip devices are distributed in a cascade on the chip;
the surface wave communication method is characterized in that a first coating is arranged between the on-chip devices distributed in a cascade manner, the on-chip devices positioned in the middle stage of the cascade distribution can be in surface wave communication with the on-chip devices in the previous stage and the next stage of the cascade connection in the middle stage through the first coating.
6. The system-on-chip of claim 1 or 2,
the first coating layer includes: a dielectric coating;
the second coating layer includes: and (3) wave-absorbing coating.
7. The system-on-chip of claim 6,
the thickness of the first coating layer is the same as the thickness of the second coating layer.
8. The system-on-chip of claim 7,
the thickness of the metal layer, the first coating layer and the second coating layer are all 0.5 mm.
9. The system-on-chip of claim 7 or 8,
the material of the metal layer comprises: copper, silver or gold;
the material of the dielectric coating comprises: polystyrene or potassium arsenide;
the wave-absorbing coating is made of the following materials: graphene or graphite.
10. A chip comprising the surface wave communication based system on chip of any of claims 1-9.
11. An electronic device comprising the chip of claim 10.
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