CN111987993A - Broadband high-harmonic suppression terahertz three-balanced frequency doubler and method - Google Patents
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Abstract
The utility model provides a broadband high harmonic suppression terahertz three-balanced frequency doubler and a method, wherein a 0-degree output end of an input bridge is connected with an input end of a first balun, a 90-degree output end of the input bridge is connected with an input end of a second balun, two output ends of the first balun are respectively connected with an input end of a first frequency doubling circuit, and two output ends of the second balun are respectively connected with an input end of a second frequency doubling circuit; two input ends of the third balun are respectively connected with the output end of the first frequency doubling circuit, two input ends of the fourth balun are respectively connected with the output end of the second frequency doubling circuit, a 90-degree input end of the output bridge is connected with the output end of the third balun, and a 0-degree input end of the output bridge is connected with the output end of the fourth balun; on the premise of not deteriorating the bandwidth performance, the suppression degree of the third harmonic component of the terahertz frequency doubler is improved, the crosstalk between input/output ports is reduced, and the harmonic suppression ratio is further improved.
Description
Technical Field
The disclosure relates to the technical field of frequency multipliers, in particular to a broadband high-harmonic suppression terahertz three-balanced frequency multiplier and a method.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
With the improvement of terahertz scientific research and engineering application frequency thereof, particularly the frequency step into the frequency band above 1.0THz, the number of stages of the solid terahertz source based on the frequency doubling amplification cascade structure is more and more, the frequency doubling factor is more and more, and the harmonic suppression ratio of the frequency multiplier circuit of the traditional single-balance or double-balance structure can not meet the requirement of the terahertz source. Therefore, it is very necessary to research how to improve performance indexes such as harmonic suppression ratio of the terahertz frequency doubling circuit, and the like, and the method has very important practical significance for improving the spectrum purity of the terahertz source and the like.
The solid terahertz source based on the frequency multiplication cascade structure has the advantages of high frequency spectrum quality, small size, long service life, high output power, tunable frequency, room-temperature work and the like, and becomes the first choice for terahertz signal generation in terahertz scientific research and engineering application thereof. Due to the fact that indexes such as frequency response of flatness in a pass band of each component in a link are different (for example, gain and power flatness of a power amplifier, frequency doubling loss of a frequency multiplier, flatness of output power and the like), performance indexes such as partial frequency point stray and the like of the solid terahertz source based on the frequency doubling amplification cascade structure are deteriorated, and even partial harmonic components fall in the pass band. Therefore, in the process of developing the solid terahertz source, filters with high rectangular coefficients are often required to be cascaded between the amplifier and the frequency multiplier to suppress harmonic components; however, these filters can only suppress harmonic components outside the passband, and the harmonic components inside the passband can only be realized by means of the harmonic suppression function of the frequency multiplier itself.
The inventor of the present disclosure finds that, in order to improve the harmonic rejection ratio, a topology of a single-balanced structure or a double-balanced structure based on a schottky diode is adopted for a broadband frequency multiplier in a solid-state terahertz source, as shown in fig. 1. With the continuous rising of terahertz scientific research and engineering application frequency thereof, particularly, the working frequency gradually steps into the frequency band above 1.0THz, the number of stages of the solid terahertz source based on the frequency doubling amplification cascade structure is more and more, the frequency doubling factor is larger and more, and the harmonic suppression ratio of the traditional terahertz frequency multiplier with a single balance structure or a double balance structure can not meet the requirement of the terahertz source any more; in practical application, with the increasing frequency of the terahertz test instrument, the requirements on the bandwidth and harmonic suppression of the frequency multiplier in the solid-state frequency multiplication amplifying link are also increased. Under the influence of process and design, the bandwidth and the harmonic suppression degree of the existing single-balance or double-balance frequency multiplier can not meet the requirements of an actual terahertz test instrument and engineering application thereof.
Disclosure of Invention
In order to solve the defects of the prior art, the disclosure provides a broadband high-harmonic suppression terahertz three-balanced frequency doubler and a method thereof, which improve the suppression degree of the third harmonic component of the terahertz frequency doubler, reduce the crosstalk between input/output ports and further improve the harmonic suppression ratio on the premise of not deteriorating the bandwidth performance.
In order to achieve the purpose, the following technical scheme is adopted in the disclosure:
the first aspect of the disclosure provides a broadband high-harmonic suppression terahertz three-balanced frequency doubler.
A broadband high-harmonic suppression terahertz three-balanced frequency doubler comprises an input bridge, a first balun, a second balun, a first frequency doubling circuit, a second frequency doubling circuit, a third balun, a fourth balun and an output bridge;
the 0-degree output end of the input bridge is connected with the input end of a first balun, the 90-degree output end of the input bridge is connected with the input end of a second balun, the output end of the first balun is connected with the input end of a third balun through a first frequency doubling circuit, and the output end of the second balun is connected with the input end of a fourth balun through a second frequency doubling circuit;
the 90-degree input end of the output bridge is connected with the output end of the third balun, and the 0-degree input end of the output bridge is connected with the output end of the fourth balun.
As some possible implementation manners, the 0 ° and 180 ° output ends of the first balun are respectively connected with the input end of the first frequency doubling circuit, and the 0 ° and 180 ° output ends of the second balun are respectively connected with the input end of the second frequency doubling circuit;
the 0-degree input end and the 180-degree input end of the third balun are respectively connected with the output end of the first frequency doubling circuit, the 0-degree input end and the 180-degree input end of the fourth balun are respectively connected with the output end of the second frequency doubling circuit, the 90-degree input end of the output bridge is connected with the output end of the third balun, and the 0-degree input end of the output bridge is connected with the output end of the fourth balun.
As some possible implementations, the input bridge, the first balun and the second balun operate in a fundamental frequency band, and the third balun, the fourth balun and the output bridge operate in a second harmonic frequency band.
As some possible implementations, the first frequency doubling circuit and the second frequency doubling circuit each include four diodes, a positive terminal of the first diode is connected with a positive terminal of the second diode, and a negative terminal of the second diode is connected with a positive terminal of the third diode;
the negative end of the third diode is connected with the negative end of the fourth diode, and the positive end of the fourth diode is connected with the negative end of the first diode.
As a further limitation, the diodes are schottky diodes, the positive terminal of the first diode and the negative terminal of the fourth diode are first input terminals, the negative terminal of the second diode and the positive terminal of the third diode are second input terminals, the positive terminal of the first diode is a first output terminal, and the negative terminal of the third diode is a second output terminal.
As a further limitation, a first input end of the first frequency doubling circuit is connected with a 0 ° output end of the first balun, a second input end of the first frequency doubling circuit is connected with a 90 ° output end of the first balun, a first output end of the first frequency doubling circuit is connected with a 0 ° input end of the third balun, and a second output end of the first frequency doubling circuit is connected with a 90 ° input end of the third balun;
the first input end of the second frequency doubling circuit is connected with the 0-degree output end of the second balun, the second input end of the second frequency doubling circuit is connected with the 90-degree output end of the second balun, the first output end of the second frequency doubling circuit is connected with the 0-degree input end of the fourth balun, and the second output end of the second frequency doubling circuit is connected with the 90-degree input end of the fourth balun.
As some possible implementations, the input bridge and the output bridge are Lange couplers.
By way of further limitation, the input bridge includes an input terminal, a 0 ° coupled terminal, a 90 ° coupled terminal, and an isolated terminal, and the output bridge includes an output terminal, a 0 ° coupled terminal, a 90 ° coupled terminal, and an isolated terminal.
As some possible implementations, the input bridge and the output bridge are both 3 dB.
As some possible implementations, the first balun, the second balun, the third balun, and the fourth balun are Marchand baluns based on multi-coupled lines.
The second aspect of the disclosure provides an operating method of a broadband high-harmonic suppression terahertz three-balanced frequency doubler.
The working method of the broadband high-harmonic suppression terahertz three-balanced frequency doubler utilizes the broadband high-harmonic suppression terahertz three-balanced frequency doubler in the first aspect of the disclosure, and comprises the following steps:
the radio frequency signal enters the frequency multiplier through the input end of the input bridge;
two paths of signals with equal amplitude of 0-degree phase and 90-degree phase are output at the output end of the input bridge;
the signal with the phase of 0 degree enters the input end of a first balun, the signal with the phase of 90 degrees enters the input end of a second balun, and the signal with the phase of 0 degree is divided into two paths of signals with the same amplitude and the phase of 0 degree and the phase of 180 degree at the output end of the first balun and enters a first frequency doubling circuit;
at the output end of the second balun, the 90-degree signal is divided into two paths of signals with equal amplitude and 90-degree phase and 270-degree phase, and the two paths of signals enter a second frequency doubling circuit;
after nonlinear change of the first frequency doubling circuit and synthesis of the third balun, the output end of the third balun outputs a second harmonic signal of 0 degree;
after nonlinear change of the second frequency doubling circuit and synthesis of the fourth balun, the output end of the fourth balun outputs a second harmonic signal of 90 degrees;
and after the two paths of second harmonic signals are synthesized by the output bridge, the two paths of synthesized second harmonic signals are output.
Compared with the prior art, the beneficial effect of this disclosure is:
1. according to the frequency multiplier and the method, on the premise that the bandwidth performance is not deteriorated, the suppression degree of the third harmonic component of the terahertz frequency doubler is improved, the crosstalk between input/output ports is reduced, and the harmonic suppression ratio is further improved.
2. The frequency multiplier and the method have high harmonic suppression, the suppression of odd harmonics can be naturally realized by adopting a three-balanced structure based on the Lange coupler and the Marchand balun, and meanwhile, an isolation end is introduced at a tube core, so that the crosstalk between input/output ends is reduced, the isolation is further improved, and the good harmonic suppression function of the frequency multiplier is realized.
3. The frequency multiplier and the method have the advantages of compact structure, high reliability and convenient application, and the circuit of the frequency multiplier adopts the lange coupler and the Marchand balun structure to realize the input/output of signals, so that extra impedance matching branches are saved, and the frequency multiplier and the method have reliable and compact structures and convenient application.
4. The frequency multiplier and the method have good standing waves, and the Lange coupler is adopted for input/output, so that good port standing waves can be realized.
5. Compared with the traditional balanced frequency multiplier, the frequency multiplier and the method have the advantages of good harmonic suppression, wide working frequency band and the like, and can be expanded to a microwave frequency band with lower frequency.
6. According to the frequency multiplier and the method, performance indexes such as harmonic suppression ratio of the terahertz frequency doubling circuit are improved, and the spectrum purity of the terahertz source is improved.
7. The frequency multiplier and the method solve the technical problem of broadband high-harmonic suppression frequency multiplication, and based on the existing process capability, the novel three-balance structure is adopted to improve the harmonic suppression degree of the terahertz frequency doubler, so that the requirement of a terahertz solid-state frequency multiplier amplifier link on a high-performance terahertz frequency multiplication chip is met.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure and are not to limit the disclosure.
Fig. 1 is a schematic structural diagram of a conventional balanced frequency doubler provided in the background art of the present disclosure.
Fig. 2 is a schematic structural diagram of a broadband high-harmonic suppression terahertz three-balanced frequency doubler according to embodiment 1 of the present disclosure.
Fig. 3 is a schematic structural diagram of an input Lange coupler provided in embodiment 1 of the present disclosure.
Fig. 4 is a schematic structural diagram of an input Marchand balun provided in embodiment 1 of the present disclosure.
Fig. 5 is a schematic diagram of a frequency doubling circuit based on a terahertz schottky diode according to embodiment 1 of the present disclosure.
Fig. 6 is a schematic structural diagram of an output Marchand balun provided in embodiment 1 of the present disclosure.
Fig. 7 is a schematic structural diagram of an output Lange coupler provided in embodiment 1 of the present disclosure.
Detailed Description
The present disclosure is further described with reference to the following drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
The embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict.
Example 1:
as shown in fig. 1-3, embodiment 1 of the present disclosure provides a novel topology of a broadband high-harmonic suppression terahertz three-balanced frequency doubler, as shown in fig. 2.
The topological structure mainly comprises: a 90 ° input bridge operating in the fundamental frequency band, a 180 ° input balun, which also operates in the fundamental frequency band; a frequency multiplier circuit 1 and a frequency multiplier circuit 2 which are composed of 4 interconnected diodes; an output balun of 180 DEG, operating in the 2 nd harmonic band; and the 90 DEG output bridge works in the 2 nd harmonic frequency band. As shown above, the advantages of the broadband terahertz three-balanced frequency doubler proposed by the present embodiment include: all components can be realized by a planar circuit process, and the structure is simple and easy to integrate; in addition, an external filter is not required, and a better harmonic wave can be realized to suppress the characteristic.
The input end of the broadband high-harmonic suppression terahertz three-balanced frequency doubler is the input end of a bridge 1; the 0-degree output end of the bridge 1 is connected with the input end of the balun 1, and the 90-degree output end of the bridge 1 is connected with the input end of the balun 2;
the 0-degree and 180-degree output ends of the balun 1 are respectively connected with the input end of the frequency doubling circuit 1; the 0-degree and 180-degree output ends of the balun 2 are respectively connected with the input end of the frequency doubling circuit 2; the 0-degree and 180-degree input ends of the balun 3 are respectively connected with the output end of the frequency doubling circuit 1; the 0-degree and 180-degree input ends of the balun 4 are respectively connected with the output end of the frequency doubling circuit 2;
the 90-degree input end of the bridge 2 is connected with the output end of the balun 3, the 0-degree input end of the bridge 2 is connected with the output end of the balun 4, and the output end of the bridge 2 is connected with the output end of the three balanced frequency doubler.
The three-balanced frequency doubler can realize higher output suppression of third harmonic and fundamental wave, meanwhile, the suppression ratio is less along with the change of process deviation, and the whole frequency doubler has the advantages of miniaturization, easy integration and low cost.
The following describes the implementation of the devices included in the broadband high-harmonic suppression terahertz three-balanced frequency doubler:
(1) a 3dB input bridge operating at 90 deg. of the fundamental frequency band. Since Lange couplers have a small area and a relatively wide operating bandwidth, Lange couplers may be used as a 90 ° 3dB input bridge for fundamental operation, as shown in fig. 3, where 11 is the input, 12 is the 0 ° coupled end, 13 is the 90 ° coupled end, and 14 is the isolated end.
(2) And the 3dB input balun is operated at 180 degrees of the fundamental frequency band. Since the Marchand balun based on the multi-coupled line has a small area and a relatively wide operating bandwidth, the Marchand balun based on the multi-coupled line can be selected as a 180 ° 3dB input balun operating on the fundamental wave, as shown in fig. 4, where 21 is an input terminal, 22 is a 0 ° output terminal, and 23 is a 180 ° output terminal.
(3) And a frequency multiplier circuit. Since the terahertz schottky diode has a strong nonlinear ratio and a high cut-off frequency, 4 schottky diodes connected with each other are selected to generate harmonic components, as shown in fig. 5, where 31 is an input terminal, 32 is an input terminal, 33 is an output terminal, and 34 is an output terminal.
(4) And the 3dB output balun works at 180 degrees of the second harmonic frequency band. Since the multi-coupled line based Marchand balun has a small area and a relatively wide operating bandwidth, the multi-coupled line based Marchand balun can be selected as a 180 ° 3dB output balun operating in the second harmonic frequency band, as shown in fig. 6, where 41 is a 0 ° input terminal, 42 is a 180 ° input terminal, and 43 is an output terminal.
(5) A 3dB output bridge operating at 90 deg. in the second harmonic band. Since Lange couplers have a small area and a relatively wide operating bandwidth, Lange couplers may be used as a 90 ° 3dB output bridge for second harmonic band operation, as shown in fig. 7, where 51 is the output, 52 is the 0 ° coupling, 53 is the 90 ° coupling, and 54 is the isolation.
Example 2:
the embodiment 2 of the present disclosure provides a novel broadband high-harmonic suppression terahertz three-balanced frequency doubler, which utilizes the frequency doubler provided in embodiment 1;
the radio frequency signal enters a frequency doubler through the input end of the bridge 1;
two paths of signals with equal amplitude and 0-degree phase and 90-degree phase are arranged at the output end of the bridge 1;
the signal with the phase of 0 degree enters the input end of the balun 1, and the signal with the phase of 90 degrees enters the input end of the balun 2;
at the output end of the balun 1, the 0-degree signal is divided into two paths of signals with equal amplitude and phases of 0 degree and 180 degrees and enters the frequency doubling circuit 1;
at the output end of the balun 2, the 90-degree signal is divided into two paths of signals with equal amplitude and 90-degree phase and 270-degree phase, and the two paths of signals enter the frequency doubling circuit 2;
after nonlinear change of the frequency doubling circuit and synthesis of the balun 3, the output end of the balun 3 outputs a second harmonic signal of 0 degree;
after nonlinear change of the frequency doubling circuit and synthesis of the balun 4, the output end of the balun 4 outputs a second harmonic signal of 90 degrees; after the two paths of 2-order harmonic signals are synthesized by the bridge 2, the two paths of synthesized 2-order harmonic signals are output.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (10)
1. The terahertz three-balanced frequency doubler is characterized by comprising an input bridge, a first balun, a second balun, a third balun, a fourth balun and an output bridge;
the 0-degree output end of the input bridge is connected with the input end of a first balun, the 90-degree output end of the input bridge is connected with the input end of a second balun, the output end of the first balun is connected with the input end of a third balun through a first frequency doubling circuit, and the output end of the second balun is connected with the input end of a fourth balun through a second frequency doubling circuit;
the output end of the third balun is connected with the 90-degree input end of the output bridge, and the output end of the fourth balun is connected with the 0-degree input end of the output bridge.
2. The broadband high-harmonic-suppression terahertz three-balanced frequency doubler according to claim 1, wherein 0 ° and 180 ° output ends of a first balun are respectively connected with an input end of a first frequency doubling circuit, and 0 ° and 180 ° output ends of a second balun are respectively connected with an input end of a second frequency doubling circuit;
the 0-degree input end and the 180-degree input end of the third balun are respectively connected with the output end of the first frequency doubling circuit, the 0-degree input end and the 180-degree input end of the fourth balun are respectively connected with the output end of the second frequency doubling circuit, the 90-degree input end of the output bridge is connected with the output end of the third balun, and the 0-degree input end of the output bridge is connected with the output end of the fourth balun.
3. The broadband high-harmonic-rejection terahertz three-balanced frequency doubler of claim 1, wherein the input bridge, the first balun and the second balun operate in a fundamental frequency band, and the third balun, the fourth balun and the output bridge operate in a second harmonic frequency band.
4. The broadband high-harmonic-suppression terahertz three-balanced frequency doubler according to claim 1, wherein each of the first frequency doubling circuit and the second frequency doubling circuit comprises four diodes which are interconnected in pairs, the positive terminal of the first diode is connected with the positive terminal of the second diode, and the negative terminal of the second diode is connected with the positive terminal of the third diode;
the negative end of the third diode is connected with the negative end of the fourth diode, and the positive end of the fourth diode is connected with the negative end of the first diode.
5. The broadband high-harmonic-rejection terahertz three-balanced frequency doubler according to claim 4, wherein the diodes are all schottky diodes, the positive terminal of the first diode and the negative terminal of the fourth diode are first input terminals, the negative terminals of the second diode and the positive terminal of the third diode are second input terminals, the positive terminal of the first diode is a first output terminal, and the negative terminals of the third diode are second output terminals.
6. The broadband high-harmonic-suppression terahertz three-balanced frequency doubler according to claim 5, wherein a first input end of a first frequency doubling circuit is connected with a 0-degree output end of a first balun, a second input end of the first frequency doubling circuit is connected with a 90-degree output end of the first balun, a first output end of the first frequency doubling circuit is connected with a 0-degree input end of a third balun, and a second output end of the first frequency doubling circuit is connected with a 90-degree input end of the third balun;
the first input end of the second frequency doubling circuit is connected with the 0-degree output end of the second balun, the second input end of the second frequency doubling circuit is connected with the 90-degree output end of the second balun, the first output end of the second frequency doubling circuit is connected with the 0-degree input end of the fourth balun, and the second output end of the second frequency doubling circuit is connected with the 90-degree input end of the fourth balun.
7. The broadband high harmonic rejection terahertz three-balanced frequency doubler of claim 1, wherein the input bridge and the output bridge are Lange couplers.
8. The broadband high-harmonic-rejection terahertz three-balanced frequency doubler according to claim 7, wherein the input bridge comprises an input terminal, a 0 ° coupled terminal, a 90 ° coupled terminal and an isolated terminal, and the output bridge comprises an output terminal, a 0 ° coupled terminal, a 90 ° coupled terminal and an isolated terminal.
9. The broadband high harmonic rejection terahertz three-balanced frequency doubler of claim 1, wherein the input bridge and the output bridge are both 3 dB;
or the first balun, the second balun, the third balun and the fourth balun are all Marchand baluns based on multi-coupling lines.
10. An operating method of a broadband high-harmonic suppression terahertz three-balanced frequency doubler is characterized in that the broadband high-harmonic suppression terahertz three-balanced frequency doubler according to any one of claims 1 to 9 is utilized, and the method comprises the following steps:
the radio frequency signal enters the frequency multiplier through the input end of the input bridge;
two paths of signals with equal amplitude of 0-degree phase and 90-degree phase are output at the output end of the input bridge;
the signal with the phase of 0 degree enters the input end of a first balun, the signal with the phase of 90 degrees enters the input end of a second balun, and the signal with the phase of 0 degree is divided into two paths of signals with the same amplitude and the phase of 0 degree and the phase of 180 degree at the output end of the first balun and enters a first frequency doubling circuit;
at the output end of the second balun, the 90-degree signal is divided into two paths of signals with equal amplitude and 90-degree phase and 270-degree phase, and the two paths of signals enter a second frequency doubling circuit;
after nonlinear change of the first frequency doubling circuit and synthesis of the third balun, the output end of the third balun outputs a second harmonic signal of 0 degree;
after nonlinear change of the second frequency doubling circuit and synthesis of the fourth balun, the output end of the fourth balun outputs a second harmonic signal of 90 degrees;
and after the two paths of second harmonic signals are synthesized by the output bridge, the two paths of synthesized second harmonic signals are output.
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| CN113411063A (en) * | 2021-08-19 | 2021-09-17 | 深圳飞骧科技股份有限公司 | Harmonic suppression matching circuit structure and power amplifier suitable for balun |
| CN117118363A (en) * | 2023-10-24 | 2023-11-24 | 中科海高(成都)电子技术有限公司 | Active frequency doubling circuit with high harmonic suppression |
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| CN110995163A (en) * | 2019-11-26 | 2020-04-10 | 杭州电子科技大学 | Fundamental wave frequency mixing and harmonic frequency mixing hybrid millimeter wave dual-band passive mixer |
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Cited By (4)
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| CN113411063A (en) * | 2021-08-19 | 2021-09-17 | 深圳飞骧科技股份有限公司 | Harmonic suppression matching circuit structure and power amplifier suitable for balun |
| CN113411063B (en) * | 2021-08-19 | 2022-03-29 | 深圳飞骧科技股份有限公司 | Harmonic suppression matching circuit structure and power amplifier suitable for balun |
| CN117118363A (en) * | 2023-10-24 | 2023-11-24 | 中科海高(成都)电子技术有限公司 | Active frequency doubling circuit with high harmonic suppression |
| CN117118363B (en) * | 2023-10-24 | 2024-01-26 | 中科海高(成都)电子技术有限公司 | Active frequency doubling circuit with high harmonic suppression |
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Application publication date: 20201124 |