CN111966567B - Error indicator and assembly of central processing unit - Google Patents
Error indicator and assembly of central processing unit Download PDFInfo
- Publication number
- CN111966567B CN111966567B CN202010802869.3A CN202010802869A CN111966567B CN 111966567 B CN111966567 B CN 111966567B CN 202010802869 A CN202010802869 A CN 202010802869A CN 111966567 B CN111966567 B CN 111966567B
- Authority
- CN
- China
- Prior art keywords
- central processing
- processing unit
- error
- specific
- level shifter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012545 processing Methods 0.000 title claims abstract description 194
- 230000004044 response Effects 0.000 claims abstract description 60
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 230000000007 visual effect Effects 0.000 abstract description 10
- 230000005540 biological transmission Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
- G06F11/327—Alarm or error message display
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Debugging And Monitoring (AREA)
- Programmable Controllers (AREA)
Abstract
The invention discloses an error indicator and assembly of a central processing unit, comprising: the level shifter acquires the disaster signal from each central processing unit and converts the disaster signal into a form of transmission on the general input/output bus; the complex programmable logic device is used for respectively acquiring the disaster signal of each central processing unit; a platform controller hub for determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving that the disaster signal from the specific central processing unit is valid; a substrate management controller for determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving that the disaster signal from the specific central processing unit is valid; the plurality of light emitting diodes illuminate in response to receiving a disaster signal from a particular central processing unit being active to indicate that the particular central processing unit is unable to continue operating. The invention can independently distinguish various error signals of a plurality of CPUs, accurately position the error position of the CPU and provide visual display of the CPU error.
Description
Technical Field
The present invention relates to the field of underlying control, and more particularly, to an error indicator and assembly for a central processing unit.
Background
If the server uses an Intel CPU, the Intel CPU has a signal of CATERR 1 bit and ERROR3 bit to represent that the processor has an ERROR. According to Intel's platform design guidelines, CATERR is an I/O signal indicating that the system has suffered a catastrophic error and is unable to continue operation, and typically a red LED is provided on the board to indicate the error. And ERROR _ N [ 2: the 0 signal indicates various ERRORs from the processor I/O, ERROR _ N [0] indicates correctable, ERROR _ N [1] uncorrectable non-fatal ERRORs and ERROR _ N [2] fatal ERRORs. The board does not have an LED to indicate. If these errors occur, the system is quite unstable.
In the prior art, signals of different CPUs are connected together, so if a CATERR or an ERROR occurs, which CPU has an ERROR cannot be known, the direction is unclear, and if a CPU is to be debugged, cross verification is often required, or one change is required, which CPU has a problem can be identified, which is really time-consuming. It is not possible to make a statistic as to whether the relevant errors are concentrated on a specific location of the CPU. Furthermore, the fault is monitored by the BMC, so that a remote person cannot know which CPU is in a problem, and detailed monitoring cannot be provided. In addition, at present, an LED is used for displaying when the CATERR occurs, and ERROR does not exist, so that the method is inconvenient for users or research personnel.
Aiming at the problems of difficult positioning and lack of visual prompt of CPU error reporting in the prior art, no effective solution is available at present.
Disclosure of Invention
In view of the above, an object of the embodiments of the present invention is to provide an error indicator method and an error indicator assembly for a CPU, which can independently distinguish multiple error signals of multiple CPUs, accurately locate the error position of the CPU, and provide a visual display of the CPU error.
In view of the above object, a first aspect of the embodiments of the present invention provides an error indicator for a central processing unit, including:
the level shifter is connected to the corresponding central processing units and is configured to acquire the disaster signal from each central processing unit and convert the disaster signal into a form of transmission on the general input/output bus;
the complex programmable logic device is connected to the level shifter through a general input/output bus so as to respectively acquire a disaster signal of each central processing unit;
the platform controller concentrator is connected to the complex programmable logic device through a general input/output bus, and determines and outputs information that the specific central processing unit cannot continue to operate in response to the fact that the received disaster signal from the specific central processing unit is effective;
The substrate management controller is connected to the complex programmable logic device through a general input/output bus, and determines and outputs information that the specific central processing unit cannot continue to operate in response to the fact that the received disaster signal from the specific central processing unit is effective;
and a plurality of light emitting diodes connected to the complex programmable logic device through the general purpose input output bus and emitting light to indicate that the specific central processing unit can not continue to operate in response to receiving that the disaster signal from the specific central processing unit is effective.
In some embodiments, the level shifter is a single channel level shifter or a multi-channel level shifter; the level shifter connected to the corresponding plurality of central processors includes: a multi-channel level shifter is connected to a plurality of central processing units, or a plurality of single-channel level shifters are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters are respectively connected to a plurality of central processing units.
In some embodiments, the complex programmable logic device includes a plurality of outputs, the platform controller hub and the baseboard management controller each include a plurality of inputs, and each output of the complex programmable logic device associated with a particular central processor is coupled to a respective one of the inputs of the platform controller hub and the baseboard management controller associated with the particular central processor for respectively communicating a disaster signal of the particular central processor.
In some embodiments, the complex programmable logic device includes a plurality of outputs, each output of the complex programmable logic device associated with a particular central processor being coupled to a respective light emitting diode for displaying a respective disaster signal of the particular central processor.
A second aspect of an embodiment of the present invention provides an error indicator for a central processing unit, including:
the level shifter is connected to the corresponding central processing units and is configured to acquire error signals of various error types from each central processing unit and convert the error signals into a form transmitted on the general input/output bus;
a complex programmable logic device connected to the level shifter through a general input output bus and determining and outputting a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
a platform controller hub connected to the level shifter through a general input output bus and determining and outputting a specific error type of a specific central processor in response to receiving an error signal of the specific error type from the specific central processor;
a substrate management controller connected to the level shifter through a general input/output bus and determining and outputting a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
And a plurality of light emitting diodes connected to the level shifter through a general input output bus and emitting light to prompt a specific central processing unit to make an error in response to receiving an error signal of a specific error type from the specific central processing unit.
In some embodiments, the level shifter is a single channel level shifter or a multi-channel level shifter; the level shifter connected to the corresponding plurality of central processors includes: a multi-channel level shifter is connected to a plurality of central processing units, or a plurality of single-channel level shifters are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters are respectively connected to a plurality of central processing units.
In some embodiments, the error type includes one of: a correctable non-fatal error; uncorrectable non-fatal errors; uncorrectable fatal error.
In some embodiments, the level shifter includes a plurality of outputs, and the complex programmable logic device, the platform controller hub, and the baseboard management controller each include a plurality of inputs, and each output of the level shifter associated with a particular error type for a particular central processor is coupled to a respective one of the inputs of the complex programmable logic device, the platform controller hub, and the baseboard management controller associated with a particular error type for a particular central processor to transmit an error signal of the particular error type for the particular central processor.
In some embodiments, the level shifter includes a plurality of outputs, each output of the level shifter associated with a particular error type for a particular central processor being coupled to a light emitting diode to respectively display an error signal for the particular error type for the particular central processor.
A third aspect of an embodiment of the present invention provides a central processing unit assembly, including:
a plurality of central processing units;
the level shifter is connected to the corresponding central processing units and is configured to acquire the disaster signal and the error signals of various error types from each central processing unit and convert the disaster signal and the error signals into a form transmitted on the general input and output bus;
a complex programmable logic device connected to the level shifter through a general input output bus to respectively acquire a disaster signal of each central processing unit, and determining and outputting a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
a platform controller hub connected to the complex programmable logic device and the level shifter through a general input/output bus, determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving a disaster signal from the specific central processing unit being valid, and determining and outputting a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
A substrate management controller connected to the complex programmable logic device and the level shifter through a general-purpose input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving a disaster signal from the specific central processing unit being valid, and determining and outputting a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
and a plurality of light emitting diodes connected to the complex programmable logic device and the level shifter through a general input output bus, and emitting light to indicate that the specific central processing unit cannot continue to operate in response to receiving that a disaster signal from the specific central processing unit is effective, and emitting light to indicate that the specific central processing unit has an error in response to receiving an error signal of a specific error type from the specific central processing unit.
The invention has the following beneficial technical effects: the error indicator method and the device of the central processing unit provided by the embodiment of the invention are connected to a plurality of corresponding central processing units by using the level converters, are configured to respectively acquire a disaster signal from each central processing unit and convert the disaster signal into a form of transmission on a general input/output bus; the complex programmable logic device is connected to the level shifter through a general input/output bus so as to respectively acquire a disaster signal of each central processing unit; the platform controller hub is connected to the complex programmable logic device through a general input/output bus and responds to the fact that a disaster signal received from a specific central processing unit is effective to determine and output information that the specific central processing unit cannot continue to operate; the substrate management controller is connected to the complex programmable logic device through a general input/output bus, and determines and outputs information that the specific central processing unit cannot continue to operate in response to the fact that the received disaster signal from the specific central processing unit is effective; the light emitting diodes are connected to the complex programmable logic device through the general input/output bus, and emit light to prompt the specific central processing unit not to continue operation in response to the fact that the disaster signal from the specific central processing unit is received, so that various error signals of the plurality of CPU can be distinguished independently, the error position of the CPU can be accurately positioned, and the visual display of the CPU error can be provided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of an error indicator of a CPU provided in the present invention;
FIG. 2 is a schematic circuit diagram of a catarr signal of the error indicator of the CPU according to the present invention;
FIG. 3 is another schematic structural diagram of an error indicator of a CPU according to the present invention;
fig. 4 is a schematic circuit diagram of an error signal of the error indicator of the cpu according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above, a first aspect of the embodiments of the present invention provides an embodiment of an error indicator of a central processing unit, which can accurately locate an error position of the CPU and provide a visual display of the CPU error. Fig. 1 is a schematic structural diagram of an error indicator of a central processing unit according to the present invention.
The error indicator of the central processing unit, as shown in fig. 1, includes:
a level shifter 11 connected to the plurality of corresponding central processing units, configured to obtain the disaster signal from each central processing unit and convert the disaster signal into a form transmitted on the general purpose input output bus;
a complex programmable logic device 12 connected to the level shifter 11 through a general input/output bus to respectively acquire a disaster signal of each central processing unit;
a platform controller hub 13 connected to the complex programmable logic device 12 through a general-purpose input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving that a disaster signal from the specific central processing unit is valid;
a baseboard management controller 14 connected to the complex programmable logic device 12 through a general purpose input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving that the disaster signal from the specific central processing unit is valid;
And a plurality of light emitting diodes 15 connected to the complex programmable logic device 12 through a general purpose input output bus and emitting light in response to receiving a disaster signal from a specific central processing unit being active to indicate that the specific central processing unit cannot continue to operate.
In some embodiments, the level shifter 11 is a single channel level shifter 11 or a multi-channel level shifter 11; the level shifter 11 connected to the corresponding plurality of central processors includes: one multi-channel level shifter 11 is connected to a plurality of central processing units, or a plurality of single-channel level shifters 11 are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters 11 are respectively connected to a plurality of central processing units.
In some embodiments, complex programmable logic device 12 includes a plurality of outputs, platform controller hub 13 and baseboard management controller 14 each include a plurality of inputs, and each output of complex programmable logic device 12 associated with a particular central processor is coupled to a respective one of the inputs of platform controller hub 13 and baseboard management controller 14 associated with the particular central processor for respectively communicating a disaster signal of the particular central processor.
In some embodiments, the complex programmable logic device 12 includes a plurality of outputs, and each output of the complex programmable logic device 12 associated with a particular central processor is coupled to a light emitting diode 15 for displaying a disaster signal of the particular central processor.
The following further illustrates embodiments of the present invention in accordance with the exemplary embodiment shown in fig. 2. Taking two CPUs as an example, the CATERR _ N of the CPU0 and the CPU1 are separated, and enter the CPLD after going through level shift respectively, and notify the PCH and the BMC respectively. The CPU0_ CATERR _ LED display indicates that the CPU0 system has suffered a catastrophic error and cannot continue to operate, and the CPU1_ CATERR _ LED display indicates that the CPU1 system has suffered a catastrophic error and cannot continue to operate.
As can be seen from the foregoing embodiments, the error indicator method for a central processing unit according to the embodiments of the present invention is connected to a plurality of corresponding central processing units by using level shifters, and is configured to obtain a disaster signal from each central processing unit and convert the disaster signal into a form of transmission on a general input/output bus; the complex programmable logic device is connected to the level shifter through a general input/output bus so as to respectively acquire a disaster signal of each central processing unit; the platform controller hub is connected to the complex programmable logic device through a general input/output bus and responds to the fact that a disaster signal received from a specific central processing unit is effective to determine and output information that the specific central processing unit cannot continue to operate; the substrate management controller is connected to the complex programmable logic device through a general input/output bus, and determines and outputs information that the specific central processing unit cannot continue to operate in response to the fact that the received disaster signal from the specific central processing unit is effective; the light emitting diodes are connected to the complex programmable logic device through the general input/output bus, and emit light to prompt the specific central processing unit not to continue operation in response to the fact that the disaster signal from the specific central processing unit is received, so that various error signals of the plurality of CPU can be distinguished independently, the error position of the CPU can be accurately positioned, and the visual display of the CPU error can be provided.
In view of the above, a second aspect of the embodiments of the present invention provides another embodiment of an error indicator for a CPU, which is capable of accurately locating a CPU error location and providing a visual display of the CPU error. Fig. 3 is a schematic structural diagram of an error indicator of a central processing unit according to the present invention.
The error indicator of the central processing unit, as shown in fig. 3, includes:
the level shifter 11 is connected to the corresponding central processing units, and is configured to acquire error signals of multiple error types from each central processing unit and convert the error signals into a form transmitted on the general input/output bus;
a complex programmable logic device 12 connected to the level shifter 11 through a general purpose input output bus, and determining and outputting a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
a platform controller hub 13 connected to the level shifter 11 through a general purpose input output bus, and determining and outputting a specific error type of a specific central processor in response to receiving an error signal of the specific error type from the specific central processor;
A board management controller 14 connected to the level shifter 11 through a general-purpose input-output bus, and determining and outputting a specific error type of a specific central processor in response to receiving an error signal of the specific error type from the specific central processor;
and a plurality of light emitting diodes 15 connected to the level shifter 11 through a general purpose input output bus and emitting light to prompt a specific central processing unit to make an error in response to receiving an error signal of a specific error type from the specific central processing unit.
In some embodiments, the level shifter 11 is a single channel level shifter 11 or a multi-channel level shifter 11; the level shifter 11 connected to the corresponding plurality of central processors includes: one multi-channel level shifter 11 is connected to a plurality of central processing units, or a plurality of single-channel level shifters 11 are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters 11 are respectively connected to a plurality of central processing units.
In some embodiments, the error type includes one of: a correctable non-fatal error; uncorrectable non-fatal errors; uncorrectable fatal error.
In some embodiments, level shifter 11 includes a plurality of outputs, and complex programmable logic device 12, platform controller hub 13, and baseboard management controller 14 each include a plurality of inputs, and each output of level shifter 11 associated with a particular error type of a particular central processor is coupled to a respective one of the inputs of complex programmable logic device 12, platform controller hub 13, and baseboard management controller 14 associated with a particular error type of a particular central processor to respectively transmit an error signal of the particular error type of the particular central processor.
In some embodiments, the level shifter 11 comprises a plurality of outputs, each output of the level shifter 11 associated with a particular error type of a particular central processor being connected to a light emitting diode 15 for displaying an error signal of the particular error type of the particular central processor, respectively.
The following further illustrates an embodiment of the present invention in accordance with the embodiment shown in fig. 4. Also for example, using two CPUs as an example, ERROR _ N [2:0] of CPU0 and CPU1 are split and respectively notified to CPLD, PCH and BMC after level shift. CPU0 or CPU1 ERRORs are indicated by 6 ERROR _ N LEDs, respectively. If ERROR _ N2 of CPU0 shows that there is a fatal ERROR for CPU0, ERROR _ N1 of CPU0 shows that there is an uncorrectable non-fatal ERROR for CPU0, and ERROR _ N0 of CPU0 shows that the ERROR indication is correctable for CPU 0. If ERROR _ N2 of CPU1 shows that there is a fatal ERROR for CPU1, ERROR _ N1 of CPU1 shows that there is an uncorrectable non-fatal ERROR for CPU1, and ERROR _ N0 of CPU1 shows that the ERROR indication is correctable for CPU 1.
As can be seen from the foregoing embodiments, the error indicator method for a central processing unit according to the embodiments of the present invention, which is connected to a plurality of corresponding central processing units by using level shifters, is configured to obtain error signals of a plurality of error types from each central processing unit and convert the error signals into a form transmitted on a general input/output bus; the complex programmable logic device is connected to the level converter through a general input/output bus and determines and outputs a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit; the platform controller hub is connected to the level shifter through a general input/output bus, and determines and outputs a specific error type of a specific central processor in response to receiving an error signal of the specific error type from the specific central processor; the substrate management controller is connected to the level converter through a general input/output bus and determines and outputs a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit; the technical scheme that the plurality of light-emitting diodes are connected to the level converter through the general input/output bus and emit light to prompt the specific central processing unit to make an error in response to receiving an error signal of a specific error type from the specific central processing unit can independently distinguish various error signals of the plurality of CPUs, accurately position the error position of the CPUs and provide visual display of the errors of the CPUs.
In view of the above, a third aspect of the embodiments of the present invention provides an embodiment of a central processing unit assembly capable of accurately positioning an error location of a CPU and providing a visual display of a CPU error. The central processing unit assembly includes:
a plurality of central processing units;
a level shifter 11 connected to the plurality of corresponding central processing units, configured to obtain the disaster signal and the error signals of the plurality of error types from each central processing unit respectively and convert the disaster signal and the error signals into a form transmitted on the general input output bus;
a complex programmable logic device 12 connected to the level shifter 11 through a general-purpose input-output bus to respectively acquire a disaster signal of each central processing unit, and to determine and output a specific error type of a specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
a platform controller hub 13 connected to the complex programmable logic device 12 and the level shifter 11 through a general-purpose input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving a disaster signal from the specific central processing unit being valid, and determining and outputting a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
A board management controller 14 connected to the complex programmable logic device 12 and the level shifter 11 via a general purpose input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving a disaster signal from the specific central processing unit being valid, and determining and outputting a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit;
and a plurality of light emitting diodes 15 connected to the complex programmable logic device 12 and the level shifter 11 through a general purpose input output bus, and emitting light to indicate that the specific central processing unit cannot continue to operate in response to receiving a disaster signal from the specific central processing unit being valid, and emitting light to indicate that the specific central processing unit is faulty in response to receiving an error signal of a specific error type from the specific central processing unit.
As can be seen from the foregoing embodiments, the central processing unit assembly provided in the embodiments of the present invention uses a plurality of central processing units; the level shifter is connected to a plurality of corresponding central processing units and is configured to acquire a disaster signal and error signals of a plurality of error types from each central processing unit respectively and convert the disaster signals and the error signals into a form transmitted on the general input/output bus; the complex programmable logic device is connected to the level shifter through a general input/output bus to respectively acquire a disaster signal of each central processing unit, and determines and outputs a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit; the platform controller hub is connected to the complex programmable logic device and the level converter through a general input/output bus, determines and outputs information that the specific central processing unit cannot continue to operate in response to receiving that a disaster signal from the specific central processing unit is effective, and determines and outputs a specific error type of the specific central processing unit in response to receiving an error signal of the specific error type from the specific central processing unit; the substrate management controller is connected to the complex programmable logic device and the level converter through a general input/output bus, determines and outputs information that the specific central processing unit cannot continue to operate in response to the fact that a disaster signal from the specific central processing unit is received to be effective, and determines and outputs a specific error type of the specific central processing unit in response to the fact that an error signal of the specific error type is received from the specific central processing unit; the technical scheme that the plurality of light-emitting diodes are connected to the complex programmable logic device and the level converter through the general input/output bus, emit light to prompt that the specific central processing unit cannot continue to operate in response to the fact that a disaster signal from the specific central processing unit is received, and emit light to prompt that the specific central processing unit makes an error in response to the fact that an error signal of a specific error type is received from the specific central processing unit can independently distinguish various error signals of the plurality of CPUs, accurately position the error position of the CPU and provide visual display of the CPU error.
The foregoing are exemplary embodiments of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant only to be exemplary, and is not intended to intimate that the scope of the disclosure, including the claims, is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements and the like that may be made without departing from the spirit or scope of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. An error indicator for a central processing unit, comprising:
the level shifter is connected to the corresponding central processing units and is configured to acquire a disaster signal from each central processing unit and convert the disaster signal into a form transmitted on a general input and output bus;
the complex programmable logic device is connected to the level converter through a general input/output bus so as to respectively acquire the disaster signal of each central processing unit;
a platform controller hub connected to the complex programmable logic device through a general purpose input output bus and determining and outputting information that a particular central processing unit cannot continue to operate in response to receiving that the disaster signal from the particular central processing unit is valid;
a substrate management controller connected to the complex programmable logic device through a general input/output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving that the disaster signal from the specific central processing unit is valid;
and a plurality of light emitting diodes connected to the complex programmable logic device through a general purpose input output bus and emitting light to indicate that the specific central processing unit cannot continue to operate in response to receiving the disaster signal from the specific central processing unit to be effective.
2. The error indicator of claim 1, wherein the level shifter is a single channel level shifter or a multi-channel level shifter; the level shifter connected to the corresponding plurality of central processors comprises: a multi-channel level shifter is connected to a plurality of central processing units, or a plurality of single-channel level shifters are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters are respectively connected to a plurality of central processing units.
3. The error indicator of claim 1, wherein the complex programmable logic device includes a plurality of outputs, wherein the platform controller hub and the baseboard management controller each include a plurality of inputs, and wherein each output of the complex programmable logic device associated with a particular central processor is coupled to a respective one of the inputs of the platform controller hub and the baseboard management controller associated with a respective central processor for transmitting the disaster signal of the respective central processor.
4. The error indicator of claim 1 wherein the complex programmable logic device includes a plurality of outputs, each output of the complex programmable logic device associated with a particular central processor being coupled to a respective one of the light emitting diodes to respectively display the disaster signal of the particular central processor.
5. An error indicator for a central processing unit, comprising:
the level shifter is connected to the corresponding central processing units and is configured to acquire error signals of multiple error types from each central processing unit and convert the error signals into a form transmitted on the general input/output bus;
a complex programmable logic device connected to the level shifter through a general purpose input output bus and determining and outputting a specific error type of a specific central processing unit in response to receiving the error signal of the specific error type from the specific central processing unit;
a platform controller hub connected to the level shifter through a general purpose input output bus and determining and outputting a specific error type of a specific central processor in response to receiving the error signal of the specific error type from the specific central processor;
a baseboard management controller connected to the level shifter through a general input/output bus and determining and outputting a specific error type of a specific central processor in response to receiving the error signal of the specific error type from the specific central processor;
a plurality of light emitting diodes connected to the level shifter through a general purpose input output bus and emitting light to prompt a specific central processing unit to make an error in response to receiving the error signal of a specific error type from the specific central processing unit.
6. The error indicator of claim 5, wherein the level shifter is a single channel level shifter or a multi-channel level shifter; the level shifter connected to the corresponding plurality of central processors comprises: a multi-channel level shifter is connected to a plurality of central processing units, or a plurality of single-channel level shifters are respectively connected to a plurality of central processing units, or a plurality of multi-channel level shifters are respectively connected to a plurality of central processing units.
7. The error indicator of claim 5, wherein the type of error comprises one of: a correctable non-fatal error; uncorrectable non-fatal errors; uncorrectable fatal error.
8. The error indicator of claim 5, wherein the level shifter comprises a plurality of outputs, and wherein the complex programmable logic device, the platform controller hub, and the baseboard management controller each comprise a plurality of inputs, and wherein each output of the level shifter associated with a particular error type for a particular central processor is coupled to a respective one of the inputs of the complex programmable logic device, the platform controller hub, and the baseboard management controller associated with a particular error type for a particular central processor to transmit the error signal of the particular error type for the particular central processor, respectively.
9. The error indicator of claim 5 wherein said level shifter includes a plurality of outputs, each output of said level shifter associated with a particular error type for a particular central processing unit being connected to one of said light emitting diodes to respectively display said error signal for a particular error type for a particular central processing unit.
10. A central processing unit assembly, comprising:
a plurality of central processing units;
the level shifter is connected to the corresponding central processing units and is configured to acquire a disaster signal and error signals of various error types from each central processing unit and convert the disaster signals and the error signals into a form transmitted on a general input/output bus;
a complex programmable logic device connected to the level shifter through a general input output bus to respectively acquire a disaster signal of each of the central processing units, and to determine and output a specific error type of a specific central processing unit in response to receiving the error signal of the specific error type from the specific central processing unit;
a platform controller hub connected to the complex programmable logic device and the level shifter through a general purpose input output bus, and determining and outputting information that a particular central processing unit cannot continue to operate in response to receiving the disaster signal from the particular central processing unit being valid, and determining and outputting a particular error type of the particular central processing unit in response to receiving the error signal of the particular error type from the particular central processing unit;
A baseboard management controller connected to the complex programmable logic device and the level shifter through a general purpose input output bus, and determining and outputting information that the specific central processing unit cannot continue to operate in response to receiving the disaster signal from the specific central processing unit is valid, and determining and outputting a specific error type of the specific central processing unit in response to receiving the error signal of the specific error type from the specific central processing unit;
a plurality of light emitting diodes coupled to the complex programmable logic device and the level shifter via a general purpose input output bus and configured to emit light in response to receiving the disaster signal from a particular central processing unit being active to indicate that the particular central processing unit is unable to continue operating and emit light in response to receiving the error signal from the particular central processing unit for a particular type of error to indicate that the particular central processing unit is malfunctioning.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010802869.3A CN111966567B (en) | 2020-08-11 | 2020-08-11 | Error indicator and assembly of central processing unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010802869.3A CN111966567B (en) | 2020-08-11 | 2020-08-11 | Error indicator and assembly of central processing unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111966567A CN111966567A (en) | 2020-11-20 |
| CN111966567B true CN111966567B (en) | 2022-07-19 |
Family
ID=73365175
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010802869.3A Active CN111966567B (en) | 2020-08-11 | 2020-08-11 | Error indicator and assembly of central processing unit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111966567B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113127302B (en) * | 2021-04-16 | 2023-05-26 | 山东英信计算机技术有限公司 | Board GPIO monitoring method and device |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109359016A (en) * | 2018-09-27 | 2019-02-19 | 郑州云海信息技术有限公司 | A kind of hard disk alarm method and device |
| CN109710495B (en) * | 2018-12-28 | 2021-06-15 | 联想(北京)有限公司 | Information processing method and electronic equipment |
| CN110147303A (en) * | 2019-06-12 | 2019-08-20 | 深圳市同泰怡信息技术有限公司 | A method of the serial port hard disk lighting based on input and output controller center |
-
2020
- 2020-08-11 CN CN202010802869.3A patent/CN111966567B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN111966567A (en) | 2020-11-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4392199A (en) | Fault-tolerant system employing multi-microcomputers using two-out-of-three majority decision | |
| US7502669B1 (en) | Apparatus and method for graphically displaying disk drive enclosures and cabling in a data storage system | |
| US20140223039A1 (en) | Hard disk board and server system using same | |
| CN111966567B (en) | Error indicator and assembly of central processing unit | |
| US4539682A (en) | Method and apparatus for signaling on-line failure detection | |
| US9164861B2 (en) | Drive mapping using a plurality of connected enclosure management controllers | |
| US20180357118A1 (en) | Apparatus and operating method for monitoring micro controller unit having multi-core | |
| JPH01293450A (en) | Troubled device specifying system | |
| EP3096196B1 (en) | System and method for diagnosing line replaceable unit failure | |
| US8224182B2 (en) | Switch device, connection system and connection control method | |
| US10228664B2 (en) | Field device for determining or monitoring a process variable in automation technology | |
| US9285791B2 (en) | Monitoring system | |
| US20090257444A1 (en) | Slave assembly for determining source of data received over a two-wire master-slave communications bus | |
| JP2011145208A (en) | Substrate | |
| US20070286087A1 (en) | Distributed Network Enhanced Wellness Checking | |
| CN103191484B (en) | A kind of infusion pump | |
| KR930002856B1 (en) | Diagnosing apparatus for multi-processor system | |
| US20120307650A1 (en) | Multiplex system | |
| JP5405912B2 (en) | Node device and information processing device | |
| RU2792920C1 (en) | Control method for functional reconfiguration of a computing system | |
| CN111338911A (en) | Server hard disk indicator lamp control system and control method thereof | |
| KR200204972Y1 (en) | Apparatus for hardware error detection using idle high-way channel in data processing system | |
| CN218824433U (en) | Testing device | |
| JP2000193489A (en) | Position detector and cable used therefor | |
| JPS61216063A (en) | Information processing device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |