CN111965477A - Method and system for determining short-circuit current by considering zero sequence mutual inductance influence - Google Patents

Method and system for determining short-circuit current by considering zero sequence mutual inductance influence Download PDF

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CN111965477A
CN111965477A CN202010621122.8A CN202010621122A CN111965477A CN 111965477 A CN111965477 A CN 111965477A CN 202010621122 A CN202010621122 A CN 202010621122A CN 111965477 A CN111965477 A CN 111965477A
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matrix
mutual inductance
fault
line
bus
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黄彦浩
丁平
安宁
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China Electric Power Research Institute Co Ltd CEPRI
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China Electric Power Research Institute Co Ltd CEPRI
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/081Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/085Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution lines, e.g. overhead
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/081Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/086Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution networks, i.e. with interconnected conductors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/088Aspects of digital computing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/52Testing for short-circuits, leakage current or ground faults
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/58Testing of lines, cables or conductors

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

The invention discloses a method and a system for determining a short-circuit current by considering zero sequence mutual inductance influence, and belongs to the technical field of power systems. The method comprises the following steps: generating a set L of fault lines and zero sequence mutual inductance lines; obtaining a sub-matrix YBThe mirror matrix Y'; for sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting; adding a fault point into Y ', and correcting the mirror image matrix Y'; obtaining a shrinkage matrix YS(ii) a Obtaining a collection containing set B2Matrix Y "of busbars in; determining the injection current of Y' and set B2The voltage of the bus in (1); injection current of Y' and set B2Voltage of the bus in (1), and matrix YSDetermining a fault point current, said fault point current being calculatedShort-circuit current influenced by zero-sequence mutual inductance. The invention can simultaneously consider zero sequence mutual inductance and fault points among lines and fault points on the zero sequence mutual inductance line, and obtains the fault point current without directly modifying the system admittance matrix Y.

Description

Method and system for determining short-circuit current by considering zero sequence mutual inductance influence
Technical Field
The invention relates to the technical field of power systems, in particular to a method and a system for determining a short-circuit current by considering zero sequence mutual inductance influence.
Background
Short-circuit fault is a common fault in the operation of an electric power system, and is generally a direct cause or initial cause of damage to equipment, system oscillation, and loss of stability of the electric power system, when a short-circuit fault occurs, a fault current much larger than a normal operation current is generated in a system near a fault point, impact is caused to adjacent generator sets and loads, and for an electric power system, no matter the size of the electric power system, if protection and safety automatic devices are not properly set, a sudden short-circuit fault may cause the electric power system to lose stability and lose a large amount of loads, and even the whole system collapses. Since the last century, the power failure accidents of large scale in the world are almost related to short circuit faults, the short circuit is a 'first-occurring' fault, or is promoted in the process of system operation state deterioration, or both.
When the system is in an asymmetric short circuit, zero sequence mutual inductance between lines needs to be considered for the zero sequence network. In the power grid, the situation that two or more loops of alternating current lines are arranged in parallel at short intervals often occurs, and even the lines are arranged on the same tower in a parallel mode due to the limitation of power transmission corridors. When the distance between the alternating current lines is small, a relatively obvious magnetic connection exists between the alternating current lines, and for the positive sequence network and the negative sequence network, the influence of the magnetic connection is small and can be ignored because the three-phase currents are symmetrical. However, for a zero-sequence network, since the three phases are in phase, the magnetic connection induces a zero-sequence voltage on the line, and thus cannot be ignored. This zero sequence electromagnetic interaction between parallel ac transmission lines is commonly referred to as zero sequence mutual inductance.
The zero sequence mutual inductance has a large influence on the calculation result of the asymmetric short-circuit current, particularly the zero sequence current result.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method for determining a short-circuit current by considering zero-sequence mutual inductance influence, which comprises:
determining a fault line and a zero sequence mutual inductance line after the power system power grid line fault as a line to be processed, and generating a set L of the fault line and the zero sequence mutual inductance line;
and (3) searching buses connected with all lines in the line set L, eliminating repeated records, and generating a bus set B, wherein in the bus set B, all buses of which the connected lines are in the L form a set B1The remaining busbars form a set B2
Determining an admittance matrix Y of a power grid node of the power system, and determining a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
for sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
adding fault points into Y 'and correcting a mirror image matrix Y'
For the corrected sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a contracted matrix YS
Eliminating the shrinkage matrix YSAcquiring a bus and an added fault point in the middle set B1 to obtain a set B2Matrix Y "of busbars in;
determining the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
Optionally, the set B is the set B1∪B2
Optionally, the mirror matrix Y' is-1 × YS
Optionally, matrix Y' is elimination YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
The invention also provides a system for determining the short-circuit current by considering the influence of zero sequence mutual inductance, which comprises the following steps:
the calculation preparation module is used for determining a fault line and a zero sequence mutual inductance line after the power grid line of the power system has a fault as a line to be processed and generating a set L of the fault line and the zero sequence mutual inductance line;
the processing module searches buses connected with all lines in the line set L, eliminates repeated records and generates a bus set B, and all buses of all connected lines in the line set B in the L form a set B1The remaining busbars form a set B2(ii) a The first calculation module is used for determining an admittance matrix Y of a power grid node of the power system and determining a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
a first correction module for the sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
the second correction module adds a fault point into Y 'and corrects the mirror image matrix Y';
a contraction module for the corrected sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a contracted matrix YS
Elimination module, elimination shrinkage matrix YSAcquiring a bus and an added fault point in the middle set B1 to obtain a set B2Matrix Y "of busbars in;
the second calculation module determines the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
output module, injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
Optionally, the set B is the set B1∪B2
Optionally, the mirror matrix Y' is-1 × YS
Optionally, matrix Y' is elimination YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
The invention can simultaneously consider zero sequence mutual inductance and fault points among lines and fault points on the zero sequence mutual inductance line, and obtains the fault point current without directly modifying the system admittance matrix Y.
Drawings
FIG. 1 is a flow chart of a method for determining a short-circuit current by considering the influence of zero-sequence mutual inductance according to the present invention;
fig. 2 is a system structure diagram for determining short-circuit current by considering zero-sequence mutual inductance influence according to the present invention.
Detailed Description
The exemplary embodiments of the present invention will now be described with reference to the accompanying drawings, however, the present invention may be embodied in many different forms and is not limited to the embodiments described herein, which are provided for complete and complete disclosure of the present invention and to fully convey the scope of the present invention to those skilled in the art. The terminology used in the exemplary embodiments illustrated in the accompanying drawings is not intended to be limiting of the invention. In the drawings, the same units/elements are denoted by the same reference numerals.
Unless otherwise defined, terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Further, it will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense.
The invention provides a method for determining short-circuit current by considering zero sequence mutual inductance influence, which comprises the following steps of:
determining a fault line and a zero sequence mutual inductance line after the power system power grid line fault as a line to be processed, and generating a set L of the fault line and the zero sequence mutual inductance line;
and (3) searching buses connected with all lines in the line set L, eliminating repeated records, and generating a bus set B, wherein in the bus set B, all buses of which the connected lines are in the L form a set B1The remaining busbars form a set B2
Determining an admittance matrix Y of a power grid node of the power system, and determining a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
for sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
adding a fault point into Y ', and correcting the mirror image matrix Y';
for the corrected sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a contracted matrix YS
Eliminating the shrinkage matrix YSAcquiring a bus and an added fault point in the middle set B1 to obtain a set B2Matrix Y "of busbars in;
determining the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
Wherein, the set B is the set B1∪B2
Wherein the mirror matrix Y' is-1 × YS
Wherein the matrix Y' is erasure YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
The invention is further illustrated by the following examples:
and forming a line set L to be processed, searching lines containing zero sequence mutual inductance and lines related to the fault, forming the line set L to be processed, and recording once if the fault line is repeated with the zero sequence mutual inductance line.
Forming a bus set B, searching buses connected with all lines in the line set L, eliminating repeated records to form the bus set B, wherein all the buses with the connected lines in the line set L form a set B in the bus set B1The rest buses form a set B2,B1And B2All subsets of B, there are:
B1∪B2=B
B1as a set of internal bus bars, B2Is a set of boundary bus bars.
Forming a pending sub-admittance matrix YBCopying a sub-matrix Y with rows and columns of elements in B from the system node admittance matrix Y according to the bus set BB
Forming a matrix Y' to be mirrored, Y ═ 1 × YB
At YBAdding a fault in, according to the fault setting, at YBAdding the fault.
Firstly, according to the position of the fault point, the fault line is positionedfA new bus b is addedfIs prepared byfInto two new lines,/fThe line impedance and the capacitance to ground B/2 are also divided into two parts according to the percentage of the fault point position, as the impedance and the capacitance to ground B/2 of two new lines, if the fault point position coincides with the bus connected with the line at the two ends of the line, no new bus needs to be added, then according to the fault type, at BfAdding admittance correction treatment to positive, negative and zero sequence networks, and finally adding new line and bfThe treatment of (b) is incorporated into YBIn, replace original lfIf a plurality of fault points exist on the line, a plurality of corresponding buses are added on the similar line, and the line is divided into a plurality of corresponding sections. Adding admittance correction treatment of positive, negative and zero sequence networks at each fault point, and replacing Y with treatment of the segmented line and fault pointBChinese character offThe relevant parameters of (1).
At YBZero-sequence mutual inductance is added, and lines with zero-sequence mutual inductance are grouped pairwise, for example, zero-sequence mutual inductance exists before lines AC1, AC2 and AC3, and three zero-sequence mutual inductance groups of AC1, AC2, AC1, AC3, AC2 and AC3 are formed.
According to the grouping result and the zero sequence mutual inductance value between the lines in the group, at YBZero sequence mutual inductance is added, and the condition that the zero sequence mutual inductance circuit is also a fault circuit is processed according to the following method:
dividing the line into a plurality of sections according to fault points on the two lines;
mutual inductance between the newly added branch circuit and other branch circuits, which appears due to the division points, is multiplied by the original mutual inductance by the ratio of the total length of the circuit to the total length of the circuit;
and transforming the mutual inductance among all groups of branches into newly added branches, and treating the newly added branches as common branches.
Correcting the mirror image matrix Y ', adding a fault point into Y ', and correcting Y ';
forming a matrix Y to be shrunkS. Mixing Y' with YBAnd, form YS
Forming a post-shrinkage matrix Y ". Using a matrix elimination method, Y isSShrinking to contain only B2Matrix Y' of bus bars, i.e. elimination YSOnly the boundary bus is reserved, and the internal bus comprises a B1 bus and an added fault point;
calculating the injection current sum B of Y' from Y and the known injection current2The voltage of the bus;
injection current according to Y' and B2Voltage of bus bar, from matrix YSAnd calculating the current of the fault point.
The present invention further provides a system 200 for determining a short-circuit current by considering the influence of zero-sequence mutual inductance, as shown in fig. 2, including:
the calculation preparation module 201 is used for determining a fault line and a zero sequence mutual inductance line after the power grid line of the power system has a fault as a line to be processed, and generating a set L of the fault line and the zero sequence mutual inductance line;
the processing module 202 searches the buses connected to each line in the line set L, eliminates the duplicate records, and generates a bus set B in which all the buses connected to the lines in L form a set B1The remaining busbars form a set B2
The first calculation module 203 determines an admittance matrix Y of the power grid node of the power system, and determines a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
a first modification module 204 for modifying the first parameter,for sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
the second correction module 205 adds a fault point to Y 'and corrects the mirror matrix Y';
a contraction module 206 for contracting the modified sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a contracted matrix YS
An elimination module 207 eliminating the shrinkage matrix YSAcquiring a bus and an added fault point in the middle set B1 to obtain a set B2Matrix Y "of busbars in;
the second calculation module 208 determines the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
output module 209, injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
Wherein, the set B is the set B1∪B2
Wherein the mirror matrix Y' is-1 × YS
Wherein the matrix Y' is erasure YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
The invention can simultaneously consider zero sequence mutual inductance and fault points among lines and fault points on the zero sequence mutual inductance line, and obtains the fault point current without directly modifying the system admittance matrix Y.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The scheme in the embodiment of the application can be implemented by adopting various computer languages, such as object-oriented programming language Java and transliterated scripting language JavaScript.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (8)

1. A method of determining a short circuit current taking into account zero sequence mutual inductance effects, the method comprising:
determining a fault line and a zero sequence mutual inductance line after the power system power grid line fault as a line to be processed, and generating a set L of the fault line and the zero sequence mutual inductance line;
and (3) searching buses connected with all lines in the line set L, eliminating repeated records, and generating a bus set B, wherein in the bus set B, all buses of which the connected lines are in the L form a set B1The remaining busbars form a set B2;;
Determining an admittance matrix Y of a power grid node of the power system, and determining a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
for sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
adding a fault point into Y ', and correcting the mirror image matrix Y';
for the corrected sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a matrix Y to be shrunkS
Eliminating the shrinkage matrix YSMiddle set B1The bus and the added fault point in the collection B are obtained2Matrix Y "of busbars in;
determining the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
2. The method of claim 1, the set B ═ set B1∪B2
3. The method of claim 1, the mirror matrix Y ═ -1 xy YS
4. The method of claim 1, the matrix Y "being elimination YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
5. A system for determining a short circuit current taking into account zero sequence mutual inductance effects, the system comprising:
the calculation preparation module is used for determining a fault line and a zero sequence mutual inductance line after the power grid line of the power system has a fault as a line to be processed and generating a set L of the fault line and the zero sequence mutual inductance line;
the processing module searches buses connected with all lines in the line set L, eliminates repeated records and generates a bus set B, and all buses of all connected lines in the line set B in the L form a set B1The remaining busbars form a set B2(ii) a The first calculation module is used for determining an admittance matrix Y of a power grid node of the power system and determining a sub-matrix Y of the admittance matrix Y according to the bus set BBAnd obtaining a sub-matrix YBThe mirror matrix Y';
a first correction module for the sub-matrix YBIn the sub-matrix YBAdding fault and zero sequence mutual inductance to the submatrix YBCorrecting;
the second correction module adds a fault point into Y 'and corrects the mirror image matrix Y';
a contraction module for the corrected sub-matrix YBMerging with the corrected mirror image matrix Y' to obtain a contracted matrix YS
Elimination module, elimination shrinkage matrix YSMiddle setB1, obtaining the bus containing the set B and the added fault point2Matrix Y "of busbars in;
the second calculation module determines the injection current of Y' and the set B according to the admittance matrix Y and the injection current of the power system grid2The voltage of the bus in (1);
output module, injection current according to Y' and set B2Voltage of the bus in (1), and matrix YSAnd determining a fault point current, namely a short-circuit current considering the influence of zero sequence mutual inductance.
6. The system of claim 5, wherein set B ═ set B1∪B2
7. The system of claim 5, the mirror matrix Y' ═ -1 xYS
8. The system of claim 5, the matrix Y "being a cancellation YSOnly the set of boundary bus bars remains for all internal bus bars in the array.
CN202010621122.8A 2020-06-30 2020-06-30 Method and system for determining short-circuit current by considering zero sequence mutual inductance influence Pending CN111965477A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112904226A (en) * 2021-01-19 2021-06-04 国网河北省电力有限公司 Method for rapidly judging short-circuit fault of high-voltage bus based on induced electricity

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102427223A (en) * 2011-10-21 2012-04-25 浙江省电力公司 Method for judging lock by zero sequence voltage and current
CN103762569A (en) * 2014-02-18 2014-04-30 国家电网公司 Two phrase grounding short circuit fault direction discriminating method of double circuit lines on the same tower
CN106253215A (en) * 2016-08-31 2016-12-21 江苏创能电器有限公司 A kind of controller of intelligent leakage circuit breaker
CN206834725U (en) * 2017-06-30 2018-01-02 艾迪迪电气(苏州)有限公司 Protection device for arc faults circuit structure
US20180090292A1 (en) * 2015-03-19 2018-03-29 Hebei Bao Kay Electric Co., Ltd Miniature circuit breaker capable of rapid breaking
CN110333420A (en) * 2019-04-15 2019-10-15 国网河南省电力公司漯河供电公司 A kind of monitoring system of single-phase grounded malfunction in grounded system of low current

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102427223A (en) * 2011-10-21 2012-04-25 浙江省电力公司 Method for judging lock by zero sequence voltage and current
CN103762569A (en) * 2014-02-18 2014-04-30 国家电网公司 Two phrase grounding short circuit fault direction discriminating method of double circuit lines on the same tower
US20180090292A1 (en) * 2015-03-19 2018-03-29 Hebei Bao Kay Electric Co., Ltd Miniature circuit breaker capable of rapid breaking
CN106253215A (en) * 2016-08-31 2016-12-21 江苏创能电器有限公司 A kind of controller of intelligent leakage circuit breaker
CN206834725U (en) * 2017-06-30 2018-01-02 艾迪迪电气(苏州)有限公司 Protection device for arc faults circuit structure
CN110333420A (en) * 2019-04-15 2019-10-15 国网河南省电力公司漯河供电公司 A kind of monitoring system of single-phase grounded malfunction in grounded system of low current

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
李欣然: "并联双回线路中间接地短路的互感消去算法", 《长沙电力学院学报(自然科学版)》 *
陶晓丽等: "短路电流计算中两种算法实现阻抗矩阵的比较", 《电网技术》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112904226A (en) * 2021-01-19 2021-06-04 国网河北省电力有限公司 Method for rapidly judging short-circuit fault of high-voltage bus based on induced electricity
CN112904226B (en) * 2021-01-19 2022-08-23 国网河北省电力有限公司 Method for rapidly judging short-circuit fault of high-voltage bus based on induced electricity

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