CN111934893A - Problem positioning processing method and device for uplink abnormal data - Google Patents

Problem positioning processing method and device for uplink abnormal data Download PDF

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CN111934893A
CN111934893A CN201910348632.XA CN201910348632A CN111934893A CN 111934893 A CN111934893 A CN 111934893A CN 201910348632 A CN201910348632 A CN 201910348632A CN 111934893 A CN111934893 A CN 111934893A
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bit data
data
hard bit
comparison result
hard
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CN111934893B (en
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张丽虹
田琨
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Datang Mobile Communications Equipment Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0631Management of faults, events, alarms or notifications using root cause analysis; using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1812Hybrid protocols; Hybrid automatic repeat request [HARQ]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0677Localisation of faults

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  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The embodiment of the invention discloses a problem positioning processing method and a device for uplink abnormal data, wherein the method comprises the following steps: if alarm information of uplink abnormal data is received, acquiring hard bit data, bit level decoding parameters, channel estimation equalization results and HARQ (hybrid automatic repeat request) combined space soft bit data in a base station; performing off-line simulation according to a channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with bit-level decoding parameters and HARQ (hybrid automatic repeat request) combined space soft bit data respectively to obtain a first comparison result; comparing the first hard bit data, the second hard bit data and the third hard bit data to obtain a second comparison result; and obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result. A set of comprehensive and detailed analysis method and an operation scheme are provided, the analysis range can be quickly reduced, and modules possibly having problems can be pertinently located according to different analysis results, and finally the problem is found.

Description

Problem positioning processing method and device for uplink abnormal data
Technical Field
The embodiment of the invention relates to the technical field of communication, in particular to a problem positioning processing method and device for uplink abnormal data.
Background
When a base station sends data to a terminal, each time a packet of data is sent, an RLC (Radio Link Control) layer correspondingly adds one to an SN (Serial Number, product Serial Number) Number; when the terminal receives downlink data sent by the base station, the RLC of the terminal adds one to the SN number when receiving one packet of data, so that the data receiving and sending on the two sides are kept corresponding and no disorder occurs. Finally, whether the data from the base station side is successfully received and analyzed by the terminal or not also requires that the terminal feeds back Acknowledgement information to the base station, that is, what we usually refer to is ACK (Acknowledgement)/NACK (Negative Acknowledgement) feedback. When the terminal feeds back, the SN number recorded by the RLC layer is carried in the uplink data, the base station side receives the uplink data of the terminal and analyzes the uplink data, when the data decoding is correct, the MAC (Media Access Control) layer uploads the data to the RLC layer, the RLC compares the SN number carried in the data with the SN number recorded when the data is initially sent, if the SN numbers are consistent, the data sent by the base station is successfully received and analyzed correctly, otherwise, the feedback of a certain packet of data by the terminal is judged not to be matched with the data initially sent by the base station, and the data belongs to abnormal data.
However, in the LTE (Long Term Evolution) system in the prior art, there is no standardized method for problem location of uplink abnormal data, so a method for problem location of uplink abnormal data is urgently needed.
Disclosure of Invention
Because the existing method has the problems, the embodiment of the invention provides a method and a device for positioning and processing the problems of uplink abnormal data.
In a first aspect, an embodiment of the present invention provides a method for problem location processing of uplink abnormal data, including:
if alarm information of uplink abnormal data is received, acquiring first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, a channel estimation equalization result and hybrid automatic repeat request (HARQ) combined space soft bit data in a base station;
performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with the bit level decoding parameters and the HARQ combined space soft bit data respectively to obtain a first comparison result;
comparing the first hard bit data, the second hard bit data and the third hard bit data to obtain a second comparison result;
obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result;
wherein, the first hard bit data is the hard bit data received by the RLC layer; the second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer; and the third hard bit data is hard bit data which is stored in a PCIE (peripheral component interface express) buffer interval of the expansion bus standard of the high-speed serial computer through data transfer.
In a second aspect, an embodiment of the present invention further provides a device for problem location processing of uplink abnormal data, where the device includes:
the data acquisition module is used for acquiring first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, channel estimation equalization results and hybrid automatic repeat request HARQ (hybrid automatic repeat request) combined space soft bit data in a base station if alarm information of uplink abnormal data is received;
the first comparison module is used for performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with the bit level decoding parameters and the HARQ combined space soft bit data respectively to obtain a first comparison result;
a second comparison module, configured to compare the first hard bit data, the second hard bit data, and the third hard bit data to obtain a second comparison result;
the problem positioning module is used for obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result;
wherein, the first hard bit data is the hard bit data received by the RLC layer; the second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer; and the third hard bit data is hard bit data which is stored in a PCIE (peripheral component interface express) buffer interval of the expansion bus standard of the high-speed serial computer through data transfer.
In a third aspect, an embodiment of the present invention further provides an electronic device, including:
at least one processor; and
at least one memory communicatively coupled to the processor, wherein:
the memory stores program instructions executable by the processor, which when called by the processor are capable of performing the above-described methods.
In a fourth aspect, an embodiment of the present invention further provides a non-transitory computer-readable storage medium storing a computer program, which causes the computer to execute the above method.
According to the technical scheme, the embodiment of the invention provides a set of comprehensive and detailed analysis method and operation scheme by obtaining three types of hard bit data, bit level decoding parameters, channel estimation equalization results and HARQ combined space soft bit data in the base station for comparison and positioning the problem of uplink abnormal data according to the comparison result, so that the analysis range can be quickly reduced, and a module which possibly has problems can be pertinently positioned according to different analysis results to finally find the problem.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic flowchart of a problem location processing method for uplink abnormal data according to an embodiment of the present invention;
fig. 2 is a flowchart illustrating an uplink data processing according to an embodiment of the present invention;
fig. 3 is a flowchart illustrating an uplink data processing according to another embodiment of the present invention;
fig. 4 is a schematic flowchart of a problem location processing method for uplink abnormal data according to another embodiment of the present invention;
fig. 5 is a schematic structural diagram of a problem location processing device for uplink abnormal data according to an embodiment of the present invention;
fig. 6 is a logic block diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The following further describes embodiments of the present invention with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Fig. 1 shows a schematic flow chart of a problem location processing method for uplink abnormal data provided in this embodiment, including:
s101, if alarm information of uplink abnormal data is received, acquiring first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, channel estimation equalization results and Hybrid Automatic Repeat reQuest (HARQ) merged space soft bit data in a base station.
Wherein the first hard bit data is hard bit data received by an RLC layer.
The second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer.
The third hard bit data is hard bit data passing through a PCIE (Peripheral Component Interconnect Express) buffer section.
Specifically, after the base station judges that the received uplink data is abnormal data, alarm information is generated, then mutual cooperation among a plurality of systems is triggered, receiving and decoding of bottom layer data are cut off, a series of parameters, important node data and reporting results at the time of occurrence of the abnormal data are reserved as far as possible, the possibility of covering a site is reduced, and then the data are captured and analyzed to complete positioning. During specific positioning, first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, channel estimation equalization results and HARQ combined spatial soft bit data are obtained for subsequent positioning analysis.
S102, performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with the bit level decoding parameters and the HARQ combined space soft bit data respectively to obtain a first comparison result.
And comparing the simulated soft bit data obtained by simulation with bit-level decoding parameters and HARQ combined spatial soft bit data.
Specifically, when positioning the problem of the uplink abnormal data, it is necessary to determine whether the reported uplink data is real data on the base station side, and then determine whether the data transmission between the modules is error-free after the decoding is completed.
In order to confirm the authenticity of a data source, a base station side needs to keep a channel estimation equalization result at a time when abnormal data is suspected to be generated, and decoding parameters provided by an ARM (Advanced RISC Machines, which is a Reduced Instruction Set Computer) side, so as to perform demodulation descrambling and decoding offline. If the off-line simulation decoding is also correct, it can be proved that the entry data is consistent with the base station scheduling, the data source is reasonable, the symbol-level operation and bit-level decoding of the whole PL (Presentation Layer) are all correct, and the error stage occurs in the data transmission between the modules.
S103, comparing the first hard bit data, the second hard bit data and the third hard bit data to obtain a second comparison result.
Wherein the second comparison result is a result of comparing three hard bit data.
Specifically, when data transmission between the positioning modules is correct, it is necessary to capture hard bit data in a hard bit storage space at a side of a Field Programmable Gate Array (FPGA) of a PL layer, a corresponding codeword offset address, hard bit data cached in a PCIE region, a series of decoding parameters obtained by an ARM of the PL layer through MAC scheduling, and a message that the ARM needs to report to an MAC layer, in particular, absolute information such as Radio Network Temporary Identity (RNTI) and the like, which determines user rationality. According to the parameters and data, whether the hard bit data (first hard bit data, marked as A) received by the RLC layer is consistent with the hard bit data (second hard bit data, marked as B) which is still stored in the hard bit storage space without data movement and the hard bit data (third hard bit data, marked as C) which has reached the PCIE storage area after data movement is confirmed.
Referring to the flow diagram of uplink data processing shown in fig. 2, after receiving uplink data reported by the terminal, the base station performs channel estimation equalization to obtain a channel estimation equalization result; then, demodulation and descrambling are carried out to obtain soft bit data before decoding. If the soft bit is newly transmitted, the bit level module directly decodes the soft bit and stores the soft bit in an HARQ merging space opened up for each user; if the retransmission is carried out, the soft bit needs to be merged with the soft bit data of the last transmission stored in the HARQ merging space firstly and then decoded, and then the hard bit obtained by decoding is stored in the specially opened hard bit space. When the required reporting time point is reached, the data of the hard bit space is moved to the PCIE storage area and reported to the MAC layer through the PCIE. Aiming at a decoding module using hard core decoding in an LTE system, a decoding core automatically completes the final code word CRC (Cyclic Redundancy Check) Check; if the CRC is correct, the MAC layer quantitatively uploads the hard bit data of the corresponding storage address to the RLC layer according to the code word address offset and the length in the reported message, and finally the RLC performs SN number detection on the received data to finish the judgment of whether the data is abnormal data.
Therefore, only the RLC layer of the base station can determine the SN number, and further determine whether uplink data received by the base station is abnormal data, and data that can reach the RLC layer must have been correctly decoded by the PL layer and reported to the MAC layer, and then is transmitted to the RLC layer through the MAC layer.
And S104, obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result.
Specifically, in order to locate the uplink abnormal data, it is necessary to analyze each stage involved in the flow shown in fig. 2 step by step to confirm the cause of the uplink abnormal data.
Firstly, aiming at the HARQ merging stage, the uplink abnormal data is the data which is decoded correctly certainly, and if the HARQ merging is wrong, the decoding is impossible to be correct, so that the uplink data abnormality caused by the HARQ merging error can be directly eliminated.
The following MAC layer reporting and PCIE moving are two stages that need to be analyzed heavily. In the two stages, all modules are in work division and cooperation, and finally decoding and upward transmission of data are completed. Decoding is completed by ARM and FPGA of PL layer:
1) the ARM side provides user decoding related parameters according to the MAC scheduling message;
2) the FPGA completes decoding by using parameters provided by the ARM side, then places hard bit data obtained by decoding in a hard bit storage space according to the sequence of subframes and users, and simultaneously returns information such as the code word length and the storage address corresponding to each user, whether the decoding is correct and the like to the ARM through decoding result information;
3) after receiving a timing interrupt representing that the decoding of the FPGA is completed, the ARM moves the data content in the corresponding storage space to a PCIE storage area according to the code word storage address offset in a decoding result message returned by the FPGA, and then reports user-related decoding result information and hard bit data to an MAC layer through the PCIE;
4) if the reported message shows that the CRC passes, the MAC layer reports the corresponding hard bit information to the RLC layer according to the user-related code word length and the code word offset address reported by the PL layer, and then the transmission of the whole data is completed.
It should be noted that the codeword related information obtained by the MAC layer includes the codeword length, and the codeword offset address is calculated by the ARM side according to the MAC scheduling message; when hard bit data are moved, the code word storage address offset returned from the decoding result provided by the FPGA is utilized, and the addresses are obtained by self accumulation of the FPGA according to the hard bit data amount processed by the FPGA; therefore, the independence among the modules in the whole decoding process can be better ensured, the mutual verification effect can be achieved, and the accidental correct decoding is reduced or even avoided.
In this embodiment, a set of comprehensive and detailed analysis method and operation scheme is provided by obtaining three types of hard bit data, bit level decoding parameters, channel estimation equalization results and HARQ combined spatial soft bit data in the base station for comparison, and positioning uplink abnormal data according to the comparison result, so that the analysis range can be quickly narrowed, and a module which may have problems can be specifically positioned according to different analysis results, and finally the problem is found.
Further, on the basis of the above method embodiment, S102 specifically includes:
and S1021, performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data.
S1022, if the simulation soft bit data is inconsistent with the HARQ merged space soft bit data, the first comparison result indicates that the soft bit data is inconsistent.
And S1023, if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is not consistent with the bit-level decoding parameters, the first comparison result is a decoding error.
S1024, if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is consistent with the bit-level decoding parameters, the first comparison result is correct decoding.
S103 specifically comprises the following steps:
and S1031, if the second hard bit data is consistent with the third hard bit data and the first hard bit data is inconsistent with the second hard bit data, the second comparison result is that the hard bit data is inconsistent.
S1032, if the first hard bit data is consistent with the third hard bit data, and the second hard bit data is inconsistent with the third hard bit data, the second comparison result is a codeword offset address error.
S1033, if the first hard bit data, the second hard bit data, and the third hard bit data are all consistent, the second comparison result is that the hard bit data are consistent.
S104 specifically comprises the following steps:
s1041, if the first comparison result is that the soft bit data are inconsistent or the decoding is wrong, the problem positioning result of the uplink abnormal data is that the base station side data or the parameters are inconsistent.
S1042, if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is consistent with the first hard bit data, the problem location result of the uplink abnormal data is that the base station side is error-free.
And S1043, if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is inconsistent with the first hard bit data, determining that the problem positioning result of the uplink abnormal data is that the data sequence at the base station side is disordered.
And S1044. if the second comparison result is that the hard bit data is inconsistent, the problem positioning result of the uplink abnormal data is that the high-speed serial computer expansion bus standard PCIE at the base station side has a problem.
And S1045, if the second comparison result is that the code word offset address is wrong, the problem positioning result of the uplink abnormal data is that the microprocessor or the field programmable gate array on the base station side has a problem.
Specifically, on the basis of the uplink data processing flow provided in fig. 2, fig. 3 provides a detailed processing procedure after the base station receives the uplink data, that is, the uplink MAC performs scheduling, obtains a PL _ ARM side bit-level decoding parameter and a symbol-level parameter, performs symbol-level operation in combination with uplink air interface data to obtain a soft bit, and further performs bit-level decoding according to the PL _ ARM side bit-level decoding parameter and the soft bit to obtain a hard bit; then, the decoding result of the hard bit offset address obtained by the FPGA side through calculation is moved to a hard bit storage space, and the data corresponds to second hard bit data, namely data B; then, the decoding result of the hard bit offset address calculated by the ARM side is moved to a PCIE cache area, and the data corresponds to third hard bit data, namely data C; and finally, reporting the decoding result, wherein the MAC/RLC receives the hard bit data, and the data corresponds to the first hard bit data, namely the data A.
Therefore, when performing problem location of uplink abnormal data, it is necessary to reverse the path of the uplink abnormal data, as shown in fig. 4, the hard bit data received by the RLC layer is a, the hard bit data still stored in the hard bit storage space without data transfer is B, and the hard bit data having reached the PCIE storage area after data transfer is C. After the grabbing number stops, the problem location of the uplink abnormal data is carried out according to the grabbed data, and the method specifically comprises the following steps:
1) if A, B disagreement, it proves that there is a problem in PCIE transmission, and at this time, the data transmitted to the RLC layer via the MAC layer is not the hard bit data actually decoded, and is inevitably determined to be abnormal data.
2) If B, C are inconsistent, the problem is that the FPGA side has a problem in calculating the code word storage address offset, which causes data confusion when the ARM side moves.
3) If the symbol-level soft bit off-line and on-line grab ratio pair fails or the bit-level decoding is incorrect, the empty data is proved to be inconsistent with the parameters, which means that the empty data is inconsistent with the scheduling at the moment.
4) If the off-line simulation decoding is also correct, it can be proved that the entry data is consistent with the base station scheduling, the data source is reasonable, and the symbol-level operation and the bit-level decoding of the whole PL layer are correct.
According to the judgment logic of fig. 4, the problem location result on the base station side of the following 5 items of uplink abnormal data can be obtained:
1) the data or parameters of the base station side do not conform;
2) the base station side is error-free;
3) the data sequence at the base station side is disordered;
4) the PCIE at the base station side has a problem;
5) a problem exists with the base station side microprocessor or field programmable gate array.
The method provided by the embodiment provides a set of comprehensive and detailed analysis method and operation scheme for positioning the uplink abnormal data problem of the LTE system, is simple and understandable to operate, and is particularly used for positioning the problem of interlayer information interaction with a plurality of modules. The method is also suitable for similar uplink abnormal data problems of other wireless communication system base stations, such as an NR system, and has important reference value.
Further, on the basis of the above embodiment of the method, S101 further includes:
and S100, if the alarm information of the uplink abnormal data is not received, performing cyclic grabbing, and sequentially storing the grabbed data to each buffer area in the plurality of buffer areas.
Specifically, in this embodiment, a base station shutdown caused by task suspension is adopted to reserve a site when the RLC layer detects uplink abnormal data, and the specific operations are as follows:
before the alarm information of the uplink abnormal data does not appear, the base station side always operates the cyclic access number, and in consideration of the time delay brought by the inter-layer message transmission, the cyclic access number opens up a plurality of Buffer areas (4 Buffer areas are set as shown in fig. 4, and are respectively Buffer1-4) so as to reserve the information of 4 nearby half frames when the RLC layer detects the abnormal data.
Once the RLC layer detects the uplink data abnormity, the log recording is stopped, the PL layer is informed through the MAC layer, the PL layer ARM side immediately triggers the PL layer FPGA side to access an illegal address to suspend the FPGA task abnormity after receiving the message, and meanwhile, the PL layer ARM side also automatically causes the process to suspend and stop the cyclic capture. Then, acquiring the half frame number of the uplink abnormal data from the base station side RLC layer log, extracting a series of information recorded by the corresponding half frame number from the cyclic catch number Buffer, and then analyzing and comparing the captured data according to the positioning thought, as shown in fig. 4, finally finding out the problem causing the uplink abnormal data.
Fig. 5 shows a schematic structural diagram of a problem location processing device for uplink abnormal data provided in this embodiment, where the device includes: a data acquisition module 501, a first comparison module 502, a second comparison module 503, and a problem location module 504, wherein:
the data obtaining module 501 is configured to obtain first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, channel estimation equalization results, and hybrid automatic repeat request HARQ combining space soft bit data in a base station if alarm information of uplink abnormal data is received;
the first comparison module 502 is configured to perform offline simulation according to the channel estimation equalization result to obtain simulated soft bit data, and compare the simulated soft bit data with the bit-level decoding parameters and the HARQ combining space soft bit data to obtain a first comparison result;
the second comparison module 503 is configured to compare the first hard bit data, the second hard bit data, and the third hard bit data to obtain a second comparison result;
the problem positioning module 504 is configured to obtain a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result;
wherein, the first hard bit data is the hard bit data received by the RLC layer; the second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer; the third hard bit data is the hard bit data still stored in the PCIE buffer interval after data transfer.
If the data obtaining module 501 receives the alarm information of the uplink abnormal data, it obtains the first hard bit data, the second hard bit data, the third hard bit data, the bit level decoding parameter, the channel estimation equalization result and the hybrid automatic repeat request HARQ combining space soft bit data in the base station; the first comparison module 502 performs off-line simulation according to the channel estimation equalization result to obtain simulated soft bit data, and compares the simulated soft bit data with the bit-level decoding parameters and the HARQ combining space soft bit data to obtain a first comparison result; the second comparison module 503 compares the first hard bit data, the second hard bit data and the third hard bit data to obtain a second comparison result; the problem positioning module 504 obtains a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result.
In this embodiment, a set of comprehensive and detailed analysis method and operation scheme is provided by obtaining three types of hard bit data, bit level decoding parameters, channel estimation equalization results and HARQ combined spatial soft bit data in the base station for comparison, and positioning uplink abnormal data according to the comparison result, so that the analysis range can be quickly narrowed, and a module which may have problems can be specifically positioned according to different analysis results, and finally the problem is found.
Further, on the basis of the above device embodiment, the first comparing module 502 is specifically configured to:
performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data;
if the simulation soft bit data is inconsistent with the HARQ merging space soft bit data, the first comparison result is that the soft bit data is inconsistent;
if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is inconsistent with the bit-level decoding parameters, the first comparison result is a decoding error;
and if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is consistent with the bit-level decoding parameters, the first comparison result is correct decoding.
Further, on the basis of the above device embodiment, the second comparing module 503 is specifically configured to:
if the second hard bit data is consistent with the third hard bit data and the first hard bit data is inconsistent with the second hard bit data, the second comparison result is that the hard bit data is inconsistent;
if the first hard bit data is consistent with the third hard bit data and the second hard bit data is inconsistent with the third hard bit data, the second comparison result is a codeword offset address error;
and if the first hard bit data, the second hard bit data and the third hard bit data are consistent, the second comparison result is that the hard bit data are consistent.
Further, on the basis of the above device embodiment, the problem location module 504 is specifically configured to:
if the first comparison result is that the soft bit data are inconsistent or the decoding is wrong, the problem positioning result of the uplink abnormal data is that the data or the parameters at the base station side are inconsistent;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is consistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the base station side is error-free;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is inconsistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the data sequence at the base station side is disordered;
if the second comparison result is that the hard bit data are inconsistent, the problem positioning result of the uplink abnormal data is that the high-speed serial computer expansion bus standard PCIE at the base station side has a problem;
and if the second comparison result is that the code word offset address is wrong, the problem positioning result of the uplink abnormal data is that a microprocessor or a field programmable gate array at the base station side has a problem.
Further, on the basis of the above embodiment of the apparatus, the apparatus further comprises:
and the data caching module is used for circularly grabbing data if the alarm information of the uplink abnormal data is not received, and sequentially storing the grabbed data to each buffer area in the plurality of buffer areas.
The problem location processing apparatus for uplink abnormal data described in this embodiment may be used to implement the above method embodiments, and the principle and technical effect are similar, which are not described herein again.
Referring to fig. 6, the electronic device includes: a processor (processor)601, a memory (memory)602, and a bus 603;
wherein the content of the first and second substances,
the processor 601 and the memory 602 communicate with each other through the bus 603;
the processor 601 is used for calling the program instructions in the memory 602 to execute the methods provided by the above-mentioned method embodiments.
The present embodiments disclose a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, enable the computer to perform the methods provided by the above-described method embodiments.
The present embodiments provide a non-transitory computer-readable storage medium storing computer instructions that cause the computer to perform the methods provided by the method embodiments described above.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
It should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (12)

1. A problem positioning processing method of uplink abnormal data is characterized by comprising the following steps:
if alarm information of uplink abnormal data is received, acquiring first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, a channel estimation equalization result and hybrid automatic repeat request (HARQ) combined space soft bit data in a base station;
performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with the bit level decoding parameters and the HARQ combined space soft bit data respectively to obtain a first comparison result;
comparing the first hard bit data, the second hard bit data and the third hard bit data to obtain a second comparison result;
obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result;
wherein, the first hard bit data is the hard bit data received by the RLC layer; the second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer; and the third hard bit data is hard bit data which is stored in a PCIE (peripheral component interface express) buffer interval of the expansion bus standard of the high-speed serial computer through data transfer.
2. The method of claim 1, wherein the performing offline simulation according to the result of channel estimation equalization to obtain simulated soft bit data, and comparing the simulated soft bit data with the bit-level decoding parameters and the HARQ combining spatial soft bit data to obtain a first comparison result specifically includes:
performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data;
if the simulation soft bit data is inconsistent with the HARQ merging space soft bit data, the first comparison result is that the soft bit data is inconsistent;
if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is inconsistent with the bit-level decoding parameters, the first comparison result is a decoding error;
and if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is consistent with the bit-level decoding parameters, the first comparison result is correct decoding.
3. The method according to claim 2, wherein the comparing the first hard bit data, the second hard bit data, and the third hard bit data to obtain a second comparison result specifically includes:
if the second hard bit data is consistent with the third hard bit data and the first hard bit data is inconsistent with the second hard bit data, the second comparison result is that the hard bit data is inconsistent;
if the first hard bit data is consistent with the third hard bit data and the second hard bit data is inconsistent with the third hard bit data, the second comparison result is a codeword offset address error;
and if the first hard bit data, the second hard bit data and the third hard bit data are consistent, the second comparison result is that the hard bit data are consistent.
4. The method according to claim 3, wherein the obtaining of the problem location result of the uplink abnormal data according to the first comparison result and/or the second comparison result specifically includes:
if the first comparison result is that the soft bit data are inconsistent or the decoding is wrong, the problem positioning result of the uplink abnormal data is that the data or the parameters at the base station side are inconsistent;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is consistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the base station side is error-free;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is inconsistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the data sequence at the base station side is disordered;
if the second comparison result is that the hard bit data are inconsistent, the problem positioning result of the uplink abnormal data is that the PCIE at the base station side has a problem;
and if the second comparison result is that the code word offset address is wrong, the problem positioning result of the uplink abnormal data is that a microprocessor or a field programmable gate array at the base station side has a problem.
5. The method according to any one of claims 1 to 4, wherein before acquiring the first hard bit data, the second hard bit data, the third hard bit data, the bit level decoding parameter, the channel estimation equalization result, and the HARQ combining spatial soft bit data in the base station if the alarm information of the uplink abnormal data is received, the method further comprises:
and if the alarm information of the uplink abnormal data is not received, performing cyclic grabbing, and sequentially storing the grabbed data to each buffer area in the plurality of buffer areas.
6. A problem positioning processing device for uplink abnormal data is characterized by comprising:
the data acquisition module is used for acquiring first hard bit data, second hard bit data, third hard bit data, bit level decoding parameters, channel estimation equalization results and hybrid automatic repeat request HARQ (hybrid automatic repeat request) combined space soft bit data in a base station if alarm information of uplink abnormal data is received;
the first comparison module is used for performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data, and comparing the simulation soft bit data with the bit level decoding parameters and the HARQ combined space soft bit data respectively to obtain a first comparison result;
a second comparison module, configured to compare the first hard bit data, the second hard bit data, and the third hard bit data to obtain a second comparison result;
the problem positioning module is used for obtaining a problem positioning result of the uplink abnormal data according to the first comparison result and/or the second comparison result;
wherein, the first hard bit data is the hard bit data received by the RLC layer; the second hard bit data is the hard bit data which is still stored in the hard bit storage space without data transfer; and the third hard bit data is hard bit data which is stored in a PCIE (peripheral component interface express) buffer interval of the expansion bus standard of the high-speed serial computer through data transfer.
7. The apparatus of claim 6, wherein the first comparison module is specifically configured to:
performing off-line simulation according to the channel estimation equalization result to obtain simulation soft bit data;
if the simulation soft bit data is inconsistent with the HARQ merging space soft bit data, the first comparison result is that the soft bit data is inconsistent;
if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is inconsistent with the bit-level decoding parameters, the first comparison result is a decoding error;
and if the simulated soft bit data is consistent with the HARQ merging space soft bit data and the simulated soft bit data is consistent with the bit-level decoding parameters, the first comparison result is correct decoding.
8. The apparatus of claim 7, wherein the second comparison module is specifically configured to:
if the second hard bit data is consistent with the third hard bit data and the first hard bit data is inconsistent with the second hard bit data, the second comparison result is that the hard bit data is inconsistent;
if the first hard bit data is consistent with the third hard bit data and the second hard bit data is inconsistent with the third hard bit data, the second comparison result is a codeword offset address error;
and if the first hard bit data, the second hard bit data and the third hard bit data are consistent, the second comparison result is that the hard bit data are consistent.
9. The apparatus of claim 8, wherein the problem location module is specifically configured to:
if the first comparison result is that the soft bit data are inconsistent or the decoding is wrong, the problem positioning result of the uplink abnormal data is that the data or the parameters at the base station side are inconsistent;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is consistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the base station side is error-free;
if the first comparison result is that the decoding is correct, the second comparison result is that the hard bit data is consistent, and the simulation soft bit data is inconsistent with the first hard bit data, the problem positioning result of the uplink abnormal data is that the data sequence at the base station side is disordered;
if the second comparison result is that the hard bit data are inconsistent, the problem positioning result of the uplink abnormal data is that the PCIE at the base station side has a problem;
and if the second comparison result is that the code word offset address is wrong, the problem positioning result of the uplink abnormal data is that a microprocessor or a field programmable gate array at the base station side has a problem.
10. The apparatus according to any one of claims 6-9, further comprising:
and the data caching module is used for circularly grabbing data if the alarm information of the uplink abnormal data is not received, and sequentially storing the grabbed data to each buffer area in the plurality of buffer areas.
11. An electronic device, comprising:
at least one processor; and
at least one memory communicatively coupled to the processor, wherein:
the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1 to 5.
12. A non-transitory computer-readable storage medium storing a computer program that causes a computer to perform the method according to any one of claims 1 to 5.
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