CN111934693A - Polarization code encoding and decoding method based on segmented double CRC (cyclic redundancy check) - Google Patents

Polarization code encoding and decoding method based on segmented double CRC (cyclic redundancy check) Download PDF

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CN111934693A
CN111934693A CN202010740097.5A CN202010740097A CN111934693A CN 111934693 A CN111934693 A CN 111934693A CN 202010740097 A CN202010740097 A CN 202010740097A CN 111934693 A CN111934693 A CN 111934693A
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CN111934693B (en
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姚渭箐
肖治华
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Information and Telecommunication Branch of State Grid Hubei Electric Power Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes

Abstract

The invention relates to a polarized code coding and decoding method based on segmented double CRC (cyclic redundancy check), which comprises the following steps of: step 1), a sending end equally divides an original information bit sequence into M sections, each section independently carries out double CRC coding and then recombines according to the original sequence, and then carries out polarization coding on a generated new information bit sequence; step 2), the generated coded bit sequence is transmitted through an AWGN noise channel; and step 3), the receiving end decodes the received information bit sequence based on the segmented double CRC check auxiliary SCL decoding method. The invention improves the decoding performance of the polarization code under the CA-SCL algorithm.

Description

Polarization code encoding and decoding method based on segmented double CRC (cyclic redundancy check)
Technical Field
The invention relates to the technical field of wireless communication channel coding, in particular to a polarization code coding and decoding method based on segmented double CRC (cyclic redundancy check).
Background
In the 2008IEEE international information research conference (ISIT 2008), Arikan proposes a new Channel coding method based on the Channel Polarization (Channel Polarization) theory, namely, Polar Codes (Polar Codes). Due to the characteristics of polar codes that are strictly proven to reach shannon limit in theory and low coding complexity, the polar codes have been determined to be a 5G communication control channel coding scheme at 3GPP RAN1#87 conferences held in 11 months in 2016.
In the aspect of decoding of a polar code, a serial Cancellation List (abbreviated as CA-SCL) assisted by a CRC (Cyclic Redundancy Check) decoding algorithm includes CRC bits through an information bit sequence, and a candidate sequence set obtained by the SCL decoding algorithm is selected by using a priori information that a correct sequence can pass CRC Check, so as to obtain a better decoding performance. However, in the process of decoding the polarization code by using the CA-SCL algorithm, decoding errors may occur in the CRC check bit sequence itself, which may cause erroneous judgment of the decoding sequence, thereby affecting the decoding performance of the polarization code.
Disclosure of Invention
Technical problem to be solved
In order to solve the problems in the prior art, the invention provides a polarization code coding and decoding method based on segmented double CRC check, which improves the decoding performance of a polarization code under a CA-SCL algorithm.
(II) technical scheme
In order to achieve the purpose, the invention adopts the main technical scheme that:
a polarized code coding and decoding method based on segmented double CRC (cyclic redundancy check) is designed, and the method comprises the following steps:
step 1), a sending end equally divides an original information bit sequence into M sections, each section independently carries out double CRC coding and then recombines according to the original sequence, and then carries out polarization coding on a generated new information bit sequence;
step 2), the generated coded bit sequence is transmitted through an AWGN noise channel;
and step 3), the receiving end decodes the received information bit sequence based on the segmented double CRC check auxiliary SCL decoding method.
In the above scheme, the step 1) specifically includes the following steps:
step 1-1), segmenting: equally dividing an original information bit sequence with the code length of K bits into M sections, wherein each section comprises K/M information bits, and M is a positive integer greater than 1;
step 1-2), double CRC encoding: performing CRC-K1 coding on K/M information bits in each information bit sequence to generate K1 check bits; CRC-k2 encoding the k1 parity bits, resulting in k2 parity bits, wherein k2< k 1; splicing K1+ K2 check bits generated by CRC-K1 and CRC-K2 coding after K/M information bits in sequence to generate a new information bit sequence segment with the code length of (K/M) + K1+ K2 bits;
step 1-3), polarization encoding: repeating double CRC encoding on each segment, and finally obtaining a new information bit sequence with the code length of K + (K1+ K2) M bits in total and inputting the new information bit sequence into an encoder; the encoder polar-encodes the new information bit sequence.
In the above scheme, the step 3) specifically includes the following steps:
step 3-1), segmented decoding: the receiving end carries out SCL decoding on the received information bit sequence to obtain L candidate paths of the ith section and a corresponding (K/M) + K1+ K2 long decoding sequence set, wherein i is 1,2, … M-1;
step 3-2), double CRC check: for the ith section of decoding sequence, selecting a candidate CRC-k1 check bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked by CRC-k 2; then, selecting a candidate K/M information bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked through CRC-K1; each section adjusts the candidate path set according to the double CRC check screening result and then serves as the input of the (i + 1) th section;
step 3-3), outputting a final decoding result: and outputting a final decoding result to the Mth section of decoding sequence by using double CRC.
In the above scheme, the double CRC check of step 3) specifically includes the following steps:
and performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if none of the CRC-k2 checks passes, outputting L paths to the decoder of the (i + 1) th section;
performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, all the L paths are replaced by correct paths, the metric value corresponding to each path is kept unchanged, and the L paths are output to the decoder of the (i + 1) th section; 2) if none of the CRC-k1 checks pass, L paths are output to the decoder in section i + 1.
In the above scheme, the outputting the final decoding result in step 3) specifically includes the following steps:
SCL decoding is carried out on the received information bit sequence to obtain L candidate paths of the M section and a corresponding (K/M) + K1+ K2 long decoding sequence set;
and performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if the CRC-k2 checks fail, directly outputting the sequence with the maximum path metric value as a final decoding result;
performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, and the decoding sequence is output; 2) if none of the CRC-k1 checks passes, the sequence with the maximum path metric value is directly output as the final decoding result.
In the technical scheme of the invention, on the encoding side, an information bit sequence comprises two times of CRC encoding: (1) CRC-k1 encoding the information bit sequence; (2) the CRC-k1 bit sequence is further CRC-k2 encoded. On the decoding side, selecting a candidate CRC-k1 bit sequence set obtained by SCL decoding by using prior information that a correct sequence can pass CRC-k2 verification; and then, selecting a candidate information bit sequence set obtained by decoding the SCL by using the prior information that the correct sequence can be checked by the CRC-k 1. In order to further improve the decoding performance, the original information bit sequence is equally divided into M sections, and the coding and decoding process is carried out on each section of the information bit sequence, wherein on the decoding side, each section is used as the input of the next section after being adjusted in a certain mode according to the double CRC check screening result.
(III) advantageous effects
Compared with the prior art, the invention has the following beneficial effects:
the invention can reduce the misjudgment probability of the received information bit sequence caused by the decoding error of the CRC check bit sequence in the traditional CA-SCL algorithm to a certain extent, and in addition, the misjudgment rate of each section of the information bit sequence is reduced in a mode of uniformly segmenting the information bit sequence, thereby improving the decoding effect of the whole information bit sequence.
Drawings
FIG. 1 is a schematic diagram of a polar code encoding algorithm for segmented double CRC check according to the present invention;
FIG. 2 is a schematic diagram of a segmented double CRC-checked polar code decoding algorithm provided by the present invention;
fig. 3 is a schematic encoding diagram of a segmented double CRC-checked polar code encoding algorithm according to an embodiment of the present invention (parameters: M ═ 2, CRC-8, and CRC-4);
fig. 4 is a decoding diagram of a segmented dual CRC-checked polar code decoding algorithm according to an embodiment of the present invention (parameters: M ═ 2, CRC-8, and CRC-4).
Detailed Description
For the purpose of better explaining the present invention and to facilitate understanding, the present invention will be described in detail by way of specific embodiments with reference to the accompanying drawings.
The invention provides a polarized code coding and decoding method based on segmented double CRC (cyclic redundancy check), which comprises the following steps of:
step 1), the sending end equally divides the original information bit sequence into M sections, each section independently carries out double CRC coding and then recombines according to the original sequence, and then carries out polarization coding on the generated new information bit sequence. As shown in fig. 1, the step 1) specifically includes the following steps:
step 1-1), segmenting: equally dividing an original information bit sequence with the code length of K bits into M sections, wherein each section comprises K/M information bits, and M is a positive integer greater than 1;
step 1-2), double CRC encoding: performing CRC-K1 coding on K/M information bits in each information bit sequence to generate K1 check bits; CRC-k2 encoding the k1 parity bits, resulting in k2 parity bits, wherein k2< k 1; splicing K1+ K2 check bits generated by CRC-K1 and CRC-K2 coding after K/M information bits in sequence to generate a new information bit sequence segment with the code length of (K/M) + K1+ K2 bits;
step 1-3), polarization encoding: repeating double CRC encoding on each segment, and finally obtaining a new information bit sequence with the code length of K + (K1+ K2) M bits in total and inputting the new information bit sequence into an encoder; the encoder polar-encodes the new information bit sequence.
And 2), transmitting the generated coded bit sequence through an AWGN noise channel.
And step 3), the receiving end decodes the received information bit sequence based on the segmented double CRC check auxiliary SCL decoding method. As shown in fig. 2, the step 3) specifically includes the following steps:
step 3-1), segmented decoding: and the receiving end carries out SCL decoding on the received information bit sequence to obtain L candidate paths of the ith section and a corresponding (K/M) + K1+ K2 long decoding sequence set, wherein i is 1,2 and … M-1.
Step 3-2), double CRC check: for the ith section of decoding sequence, selecting a candidate CRC-k1 check bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked by CRC-k 2; then, selecting a candidate K/M information bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked through CRC-K1; and each section adjusts the candidate path set according to the double CRC check screening result and then serves as the input of the (i + 1) th section. The double CRC check of step 3) specifically includes the steps of: and performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if none of the CRC-k2 checks pass, L paths are output to the decoder in section i + 1. Performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, all the L paths are replaced by correct paths, the metric value corresponding to each path is kept unchanged, and the L paths are output to the decoder of the (i + 1) th section; 2) if none of the CRC-k1 checks pass, L paths are output to the decoder in section i + 1.
Step 3-3), outputting a final decoding result: and outputting a final decoding result to the Mth section of decoding sequence by using double CRC. The outputting of the final decoding result of the step 3) specifically includes the following steps: and carrying out SCL decoding on the received information bit sequence to obtain L candidate paths of the M section and a corresponding (K/M) + K1+ K2 long decoding sequence set. And performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if none of the CRC-k2 checks passes, the sequence with the maximum path metric value is directly output as the final decoding result. Performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, and the decoding sequence is output; 2) if none of the CRC-k1 checks passes, the sequence with the maximum path metric value is directly output as the final decoding result.
The technical solution of the present invention is further described below with a specific embodiment, which takes 5G first mobile communication algorithm innovation competition parameters as an example, the length K of the information bit sequence is 512 bits (including 24 CRC bits), and the search width L of the decoding algorithm is 8.
The embodiment of the invention assumes that the original information bit sequence is divided into M2 segments on average, each segment of information bit sequence is K/M256 bits long, and comprises 244 information bits and 24/M12 CRC bits. Wherein the 12 CRC bits comprise two encodings: (1) CRC-8 encoding of the information bit sequence; (2) the CRC-8 bit sequence is further CRC-4 encoded. The segmented double CRC-checked polarization code coding and decoding method specifically comprises the following steps:
the first step is as follows: the transmitting end encodes the original information bit sequence, the encoding process is as shown in figure 3,
1.1) randomly generating an original information bit sequence with a code length of 488 bits, and averagely dividing the original information bit sequence into 2 segments, wherein each segment comprises 244 information bits;
1.2) in the 1 st information bit sequence, carrying out CRC-8 coding on 244 information bits to generate 8 check bits;
1.3) carrying out CRC-4 coding on 8 check bits generated by CRC-8 coding to generate 4 check bits;
1.4) splicing 12 check bits generated by CRC-8 and CRC-4 coding after 244 information bits in sequence to generate a 1 st new information bit sequence segment with the length of 256 bits;
1.5) repeating the steps 1.2) -1.4), generating a new information bit sequence segment with the length of 256 bits of the 2 nd segment code, and finally obtaining 512 bits of information to participate in the polar code coding.
The second step is that: the generated coded bit sequence is transmitted over an AWGN noise channel.
The third step: the receiving end decodes the received information sequence, the decoding process is as shown in figure 4,
3.1) the receiving end carries out SCL decoding on the received information bit sequence to obtain 256 bit information of the 1 st section, and the number of candidate paths is 8;
3.2) performing CRC-4 check on the 245 th and 256 th bits of the decoding sequence corresponding to the 8 candidate paths, and selecting and outputting: when a decoded sequence passes CRC-4 check, outputting the decoded sequence, and entering step 3.3); when all the decoding sequences do not pass the CRC-4 check, skipping the 2 nd check, and directly outputting 8 paths to the decoder of the 2 nd section;
3.3) carrying out CRC-8 check on the 1 st bit to the 252 th bit of the decoding sequence passing the CRC-4 check, and selecting to output: when a decoding sequence passes CRC-8 verification, all 8 paths are replaced by correct paths, and the corresponding metric value of each path is kept unchanged; when all the decoded sequences do not pass the CRC-8 check, directly outputting 8 paths to the decoder of the section 2;
3.4) the receiving end continues to carry out SCL decoding on the received information bit sequence to obtain 256 bit information of the 2 nd section, and the number of candidate paths is 8;
3.5) performing CRC-4 check on the 501 th and 512 th bit (corresponding to the 2 nd segment 245 and 256 th bit) of the decoding sequence corresponding to the 8 candidate paths, and selecting and outputting: when a decoded sequence passes CRC-4 check, outputting the decoded sequence, and entering step 3.6); when all the decoding sequences do not pass the CRC-4 check, skipping the 2 nd check, and directly outputting the sequence with the maximum path metric value as a final decoding result;
3.6) performing CRC-8 check on 257 and 508 bit (corresponding to 1-252 bit of the 2 nd segment) of the decoding sequence passing CRC-4 check, and selecting and outputting: when a decoded sequence passes CRC-8 check, outputting a final decoding result; when all the decoded sequences fail to pass the CRC-8 check, the sequence with the maximum path metric value is directly output as a final decoding result.
While the present invention has been described with reference to the particular embodiments illustrated in the drawings, which are meant to be illustrative only and not limiting, it will be apparent to those of ordinary skill in the art in light of the teachings of the present invention that numerous modifications can be made without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (5)

1. A polarized code coding and decoding method based on segmented double CRC is characterized by comprising the following steps:
step 1), a sending end equally divides an original information bit sequence into M sections, each section independently carries out double CRC coding and then recombines according to the original sequence, and then carries out polarization coding on a generated new information bit sequence;
step 2), the generated coded bit sequence is transmitted through an AWGN noise channel;
and step 3), the receiving end decodes the received information bit sequence based on the segmented double CRC check auxiliary SCL decoding method.
2. The method according to claim 1, wherein the step 1) specifically comprises the following steps:
step 1-1), segmenting: equally dividing an original information bit sequence with the code length of K bits into M sections, wherein each section comprises K/M information bits, and M is a positive integer greater than 1;
step 1-2), double CRC encoding: performing CRC-K1 coding on K/M information bits in each information bit sequence to generate K1 check bits; CRC-k2 encoding the k1 parity bits, resulting in k2 parity bits, wherein k2< k 1; splicing K1+ K2 check bits generated by CRC-K1 and CRC-K2 coding after K/M information bits in sequence to generate a new information bit sequence segment with the code length of (K/M) + K1+ K2 bits;
step 1-3), polarization encoding: repeating double CRC encoding on each segment, and finally obtaining a new information bit sequence with the code length of K + (K1+ K2) M bits in total and inputting the new information bit sequence into an encoder; the encoder polar-encodes the new information bit sequence.
3. The method according to claim 1, wherein the step 3) specifically comprises the following steps:
step 3-1), segmented decoding: the receiving end carries out SCL decoding on the received information bit sequence to obtain L candidate paths of the ith section and a corresponding (K/M) + K1+ K2 long decoding sequence set, wherein i is 1,2, … M-1;
step 3-2), double CRC check: for the ith section of decoding sequence, selecting a candidate CRC-k1 check bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked by CRC-k 2; then, selecting a candidate K/M information bit sequence set obtained by SCL decoding by using prior information that a correct sequence can be checked through CRC-K1; each section adjusts the candidate path set according to the double CRC check screening result and then serves as the input of the (i + 1) th section;
step 3-3), outputting a final decoding result: and outputting a final decoding result to the Mth section of decoding sequence by using double CRC.
4. The method as claimed in claim 3, wherein the double CRC check of step 3) specifically comprises the following steps:
and performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if none of the CRC-k2 checks passes, outputting L paths to the decoder of the (i + 1) th section;
performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, all the L paths are replaced by correct paths, the metric value corresponding to each path is kept unchanged, and the L paths are output to the decoder of the (i + 1) th section; 2) if none of the CRC-k1 checks pass, L paths are output to the decoder in section i + 1.
5. The method as claimed in claim 4, wherein the outputting of the final decoding result in step 3) comprises the following steps:
SCL decoding is carried out on the received information bit sequence to obtain L candidate paths of the M section and a corresponding (K/M) + K1+ K2 long decoding sequence set;
and performing CRC-k2 check on the k1 check bit sequence in the decoding sequence corresponding to each candidate path: 1) if the CRC-k2 passes the check, indicating that the k1 check bit sequence with the decoding sequence is decoded correctly, jumping to a CRC-k1 check step; 2) if the CRC-k2 checks fail, directly outputting the sequence with the maximum path metric value as a final decoding result;
performing CRC-K1 check on the K/M information bit sequence of the decoded sequence checked by the CRC-K2: 1) if the CRC-K1 passes the check, the K/M information bit sequence with the decoding sequence is correctly decoded, and the decoding sequence is output; 2) if none of the CRC-k1 checks passes, the sequence with the maximum path metric value is directly output as the final decoding result.
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