CN111899683A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN111899683A
CN111899683A CN202010999940.1A CN202010999940A CN111899683A CN 111899683 A CN111899683 A CN 111899683A CN 202010999940 A CN202010999940 A CN 202010999940A CN 111899683 A CN111899683 A CN 111899683A
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type
driving circuit
display
transistor
display panel
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CN202010999940.1A
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CN111899683B (en
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张蒙蒙
周星耀
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Wuhan Tianma Microelectronics Co Ltd
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Shanghai Tianma AM OLED Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation
    • G09G2330/021Power management, e.g. power saving

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The embodiment of the application provides a display panel, a display device and a driving method for driving the display panel, wherein the display panel comprises a display area and a non-display area; the display area comprises a plurality of pixel columns and a plurality of data lines electrically connected with the pixel columns; the non-display area includes a first driving circuit and a second driving circuit; the data line is electrically connected with the first driving circuit; the data line is electrically connected with the second driving circuit; the plurality of pixel columns comprise a first type of pixel column and a second type of pixel column; wherein, in the display phase: the first driving circuit provides a first data signal to the first type of pixel column; the second driving circuit provides a second data signal to the second type of pixel column; the first data signal is a constant voltage signal. The circuit for providing the constant voltage signal helps the IC to share part of work of supplying the display data signal in a standby state so as to reduce work power consumption of the IC.

Description

Display panel and display device
[ technical field ] A method for producing a semiconductor device
The application relates to the technical field of display, in particular to a display panel and a display device.
[ background of the invention ]
In a conventional display panel, a display data signal is transmitted to the entire display area of the display panel through an integrated circuit IC during normal display, and the display data signal is transmitted to the entire display area of the display panel through the integrated circuit IC also in a standby state. Since most areas of the display area are displayed in black in the standby screen, the IC still needs to supply a black state voltage to these black display areas, resulting in an increase in power consumption of the IC.
Therefore, how to reduce the power consumption of the IC while ensuring the normal display of the standby screen is becoming a very important issue in the current display technology.
[ application contents ]
In view of the above, embodiments of the present application provide a display panel and a display device, in which a circuit for providing a constant voltage signal is provided, so that the circuit for providing a constant voltage signal can help an integrated driving circuit IC share a part of the supply of display data signals when the display panel is in a standby state, thereby reducing the operating power consumption of the IC.
In one aspect, an embodiment of the present application provides a display panel, including a display area and a non-display area; the display area comprises a plurality of pixel columns and a plurality of data lines electrically connected with the pixel columns; the non-display area includes a first driving circuit and a second driving circuit; the data line is electrically connected with the first driving circuit; the data line is electrically connected with the second driving circuit; the plurality of pixel columns comprise a first type of pixel column and a second type of pixel column; wherein, in a frame scanning period of the display panel, a display phase is included, in which: the first driving circuit provides a first data signal to the first type of pixel column; the second driving circuit provides a second data signal to the second type of pixel column; the first data signal is a constant voltage signal.
On the other hand, the embodiment of the application also provides a display device, which comprises the display panel.
On the other hand, an embodiment of the present application further provides a driving method of a display panel, including: the second driving circuit acquires gray scale voltage of a picture to be displayed; the second driving circuit divides the pixel rows into a first type of pixel rows and a second type of pixel rows based on the gray scale voltage; in the display stage: the first driving circuit provides a first data signal to the first type of pixel column; the second driving circuit provides a second data signal to the second type of pixel column; the first data signal is a constant voltage signal.
According to the display panel and the display device provided by the embodiment of the application, when the voltages of data signals required by the pixels in the same column are the same, a driving circuit for providing a constant voltage signal is arranged to provide the required voltage signal for the pixels in the column; when the voltages of the data signals required by the pixels in the same column for displaying are different, the inventor provides the required voltage signals for the pixels in the column by arranging another driving circuit for providing the data signals. That is, the data signal voltages received by the pixels in the display area are not only provided by one driving circuit, but also some pixel columns having the same data signal voltage can be distinguished, and the constant voltage signal is provided by a specific driving circuit, so that the operating power consumption of one driving circuit can be reduced by such a sharing manner.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a standby screen according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a standby screen partition driving scheme according to an embodiment of the present disclosure;
FIG. 4 is a timing diagram illustrating the operation of the standby screen shown in FIG. 3;
fig. 5 is a schematic circuit structure diagram of a first driving circuit provided in the present application;
FIG. 6 is a timing diagram corresponding to the circuit diagram of FIG. 5;
fig. 7 is a schematic structural diagram of a display device provided in the present application.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present application, the following detailed descriptions of the embodiments of the present application are provided with reference to the accompanying drawings.
It should be understood that the embodiments described are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
In the description herein, it is to be understood that the terms "substantially", "approximately", "about", "substantially", and the like, as used in the claims and the examples herein, are intended to be generally accepted as not being precise, within the scope of reasonable process operation or tolerance.
It should be understood that although the terms first, second, third, etc. may be used to describe the driving circuits in the embodiments of the present application, the driving circuits should not be limited to these terms. These terms are only used to distinguish the drive circuits from each other. For example, the first driving circuit may also be referred to as a second driving circuit, and similarly, the second driving circuit may also be referred to as a first driving circuit, without departing from the scope of the embodiments of the present application.
The applicant provides a solution to the problems of the prior art through intensive research. As shown in fig. 1, the display panel 01 includes a display region 001 and a non-display region 002; the display region 001 includes a plurality of pixel columns (e.g., P1-P6 in fig. 1), and a plurality of data lines 200 electrically connected to the pixel columns; the non-display region 002 includes the first drive circuit 10 and the second drive circuit 20; the data line 200 is electrically connected to the first driving circuit 10; the data line 200 is electrically connected to the second driving circuit 20; the plurality of pixel columns includes a first type of pixel column 300 and a second type of pixel column 400; wherein, in a frame scanning period of the display panel, a display stage is included, in which: the first driving circuit 10 supplies the first data signal Ds1 to the first type pixel column 300; the second driving circuit 20 provides a second data signal Ds2 to the second type of pixel column 400; the first data signal Ds1 is a constant voltage signal.
The inventor classifies pixels according to voltage signals required by pixel display, and when the voltages of data signals required by the pixels in the same column for displaying are the same, the inventor provides the required voltage signals to the pixels in the column by arranging a driving circuit for providing constant voltage signals; when the voltages of the data signals required by the pixels in the same column for displaying are different, the inventor provides the required voltage signals for the pixels in the column by arranging another driving circuit for providing the data signals. That is, the data signal voltages received by the pixels in the display area are not only provided by one driving circuit, but also some pixel columns having the same data signal voltage can be distinguished, and the constant voltage signal is provided by a specific driving circuit, so that the operating power consumption of one driving circuit can be reduced by such a sharing manner.
For example, in the standby screen H1, as shown in fig. 2, except that some screens (such as clock, weather, etc.) are displayed in the middle area 21, the other display areas are black-state screens, i.e., the data signal voltages required for the pixel columns of the area 22 are black-state voltages. According to the present inventive concept, the pixel columns in the standby screen can be divided into two types, including a first type of pixel column (corresponding to the pixel column of the area 22 in fig. 2) and a second type of pixel column (corresponding to the pixel column of the area 21 in fig. 2). In the standby screen, the data signals of the pixel columns of the area 21 are provided by the second driving circuit (e.g., an integrated circuit IC), and the data signals of the pixel columns of the area 22 are provided by the first driving circuit (e.g., a black state voltage circuit). Therefore, in the standby screen, all the pixel columns of the display area need not be provided by the integrated circuit IC, and power consumption of the IC can be reduced.
Optionally, the first driving circuits are electrically connected to the data lines in a one-to-one correspondence manner, that is, each data line is connected to one first driving circuit.
In order to enable the first driving circuit to provide the constant voltage signal to the first type of pixel columns only and not to provide the constant voltage signal to the second type of pixel columns so as to ensure the normal display of the second type of pixel columns, the inventor of the present application further sets a signal processing stage during one frame scanning period, wherein:
the second driving circuit provides a first level signal to a first driving circuit electrically connected with the first type of pixel column, and the first level signal is used for controlling the conduction of the first driving circuit;
the second driving circuit provides a second level signal to the first driving circuit electrically connected with the second type pixel column, and the second level signal is used for controlling the cut-off of the first driving circuit.
That is, in the present application, whether the first driving circuit supplies the constant voltage signal to the pixel of a certain column depends on the level signal received by the first driving circuit in the signal processing stage. Only when the received level signal is a conducting signal, the first driving circuit transmits a constant voltage signal to the data line connected with the first driving circuit, and the correct division of work of the first driving circuit and the second driving circuit is fully ensured.
Optionally, the one-frame scanning period includes a front porch stage and a rear porch stage (e.g., stage T1 in fig. 4), and the signal processing stage is located in the front porch stage and the rear porch stage in terms of timing.
Further, in order to reduce power consumption of the first driving circuit, the inventors of the present application propose that the display region may be subjected to divisional driving. Specifically, the display panel is divided into at least one first-type display area and at least one second-type display area, wherein pixel columns in the first-type display area are all first-type pixel columns, and the second-type display area comprises second-type pixel columns; in the display stage, the first driving circuit provides a first data signal to the first type display area; the second driving circuit supplies a second data signal to a second type of pixel columns of the second type of display area.
In order to better clarify the inventive concept, the following description will be made in detail by taking the display driving in the standby screen as an example. As shown in fig. 3, the display area may be divided into 2 first-type display areas 31, which are black screens, and 1 second-type display area 32, which includes a display screen area 321, according to the standby screen H1. According to the inventive concept, during the display phase, the first driving circuit (e.g., black state voltage circuit) supplies the first data signal (e.g., black state voltage) to the first type display area 31; a second driver circuit, such as an integrated circuit IC, provides a second data signal to the second type of pixel columns 321 of the second type of display area.
As shown in fig. 3, the second type display area 32 includes a black screen area 322 in addition to a display screen area 321, that is, the second type display area further includes a first type pixel column in which the data signal voltage is a constant voltage signal; during the display phase, the first driving circuit provides first data signals to the first type of pixel columns of the second type of display area.
In fig. 2 and 3, the number of rows and columns of pixels included in the entire display area 001 is 400 and 200, respectively, and the number of rows and columns of pixels included in the display screen area 321 is 40 and 20, respectively. In a normal case (i.e., the case where the first driving circuit is not present), the number of times the IC needs to output the data signal voltage is 200 × 400. The IC of the embodiment of fig. 2 outputs the data signal voltage 20 × 400 times, which is 10% of the normal output, and can significantly reduce the power consumption of the IC. The number of times the data signal voltage is output from the IC of the embodiment of the divisional driving of fig. 3 is only 20 × 40 times, which is 1% of the usual output number. The output power consumption of the IC can be greatly reduced.
In order to make the first driving circuit only provide the constant voltage signals to the first type pixel columns of the first type display area and the second type display area, optionally, the signal processing stage may be arranged in the front and rear porch stage, and may also be arranged in the scanning gap between the two adjacent areas. FIG. 4 is a schematic timing diagram illustrating operation of the image of FIG. 3, as shown in FIG. 4, the image includes a front porch stage T1 and a rear porch stage T2 within a frame scanning time T, wherein the display stage T2 includes a first-type display period T1 and a second-type display period T2 alternately arranged in sequence; in the first-type display period t1, the scan driving circuit 500 supplies a scan signal to the first-type display region 31; in the second type display period t2, the scan driving circuit 500 supplies the scan signal to the second type display region 32; the signal processing stage td is located in the gap between the adjacent first type display period t1 and second type display period t 2.
Fig. 5 is a schematic circuit structure diagram of a first driving circuit provided in the present application, and as shown in fig. 5, the first driving circuit includes: a first transistor M1 for writing a data signal Ds1 to a first type of pixel column; a second transistor M2 for initializing the gate of the first transistor M1; a third transistor M3 for writing the gate control signal of the first transistor M1; the fourth transistor M4 is used for controlling the first transistor M1 to receive the data signal Ds 1.
The display panel further includes: a first voltage signal line HL, a first gate line S1, a second gate line S2, and a third gate line S3. As shown in fig. 5, the gate of the second transistor M2 is electrically connected to the first gate line S1, the first pole is electrically connected to the first voltage signal line HL, and the second pole is electrically connected to the gate of the first transistor M1; a gate of the fourth transistor M4 is electrically connected to the second gate line S2, a first pole is electrically connected to the first voltage signal line HL, and a second pole is electrically connected to the first pole of the first transistor M1; the gate of the third transistor M3 is electrically connected to the third gate line S3, the first pole is electrically connected to the gate of the first transistor M1, and the second pole is electrically connected to the second pole of the first transistor M1; the second pole of the first transistor M1 is electrically connected to the data line 200.
Fig. 6 is a timing chart corresponding to the circuit diagram shown in fig. 5, and the operation principle of the first driving circuit will be described below with reference to fig. 5 and 6. Note that, in the following description, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are all P-type transistors as an example. Of course, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 may all be N-type transistors.
For convenience of distinction, as shown in fig. 1, a first driving circuit electrically connected to the first-type pixel column is denoted by 10A, and a first driving circuit electrically connected to the second-type pixel column is denoted by 10B; the data line electrically connected to the first type of pixel column is denoted by 200A, and the data line electrically connected to the second type of pixel column is denoted by 200B.
In the initialization phase td1, the first gate line S1 and the second gate line S2 receive the turn-on signal, i.e., the low level signal, and the second transistor M2 and the fourth transistor M4 are turned on; the third gate line receives a turn-off signal, i.e., a high level signal, and the third transistor M3 is turned off. Meanwhile, the first voltage signal line HL transmits the data signal Ds1, the data line 200A transmits the second level signal V2, and the data line 200B transmits the second level signal V2. For the first driving circuit 10A, the data signal Ds1 is transmitted to the gate and the first pole of the first transistor through the turned-on fourth transistor M4, and the second level signal V2 is transmitted to the second pole of the first transistor through the data line 200A, completing the initialization of the first transistor M1; for the first driving circuit 10B, the data signal Ds1 is transmitted to the gate and the first pole of the first transistor through the turned-on fourth transistor M4, and the second level signal V2 is transmitted to the second pole of the first transistor through the data line 200B, thereby completing the initialization of the first transistor M1.
In the frame determination stage td2, the third gate line S3 receives an on signal, i.e., a low level signal, and the third transistor M3 is turned on; the first and second gate lines S1 and S2 receive turn-off signals, i.e., high-level signals, and the second and fourth transistors M2 and M4 are turned off. Meanwhile, the second driving circuit 20 transmits the first level signal V1 to the first driving circuit 10A through the data line 200A, and the second driving circuit 20 transmits the second level signal V2 to the first driving circuit 10B through the data line 200B. The first level signal V1 is transmitted to the gate of the first transistor M1 through the third transistor M3 for the first driving circuit 10A; for the first driving circuit 10B, the second level signal V2 is transmitted to the gate of the first transistor M1 through the third transistor M3.
The first level signal V1 is a level signal that turns on the first transistor M1; the second level signal V2 is a level signal that turns off the first transistor M1.
In the voltage holding period td 3: the first gate line S1 and the third gate line S3 receive the off signal, and the second transistor M2 and the third transistor M3 are turned off; the second gate line S2 receives the turn-on signal, and the fourth transistor M4 is turned on. For the first driving circuit 10A, due to the function of the storage potential of the capacitor C1, the gate potential of the first transistor M1 is still maintained at the V1 potential of the picture determination stage td2, the first transistor M1 is turned on, and the data signal Ds1 is transmitted to the data line 200A through the turned-on fourth transistor M4 and the turned-on first transistor M1; with the first driving circuit 10B, due to the storage potential function of the capacitor C1, the gate potential of the first transistor M1 remains at the V2 potential of the screen determination stage td2, the first transistor M1 is turned off, and the data signal Ds1 is not transmitted to the data line 200B.
In the screen display phase T2: the first gate line S1 and the third gate line S3 receive the off signal, and the second transistor M2 and the third transistor M3 are turned off; the second gate line S2 receives the turn-on signal, and the fourth transistor M4 is turned on. Meanwhile, the first voltage signal line HL transmits the first data signal Ds1, and the second driving circuit 20 transmits the second data signal Ds2 to the data line 200B. For the image display of the first type of pixel row, the first data signal Ds1 is transmitted to the data line 200A through the turned-on first driving circuit 10A, and then transmitted to the pixels of the first type of pixel row; for the picture display of the second type of pixel column, the second driving circuit supplies the second data signal Ds2 to the pixels of the second type of pixel column through the data line 200B.
Optionally, the first driving circuit and the second driving circuit are located in the non-display area on the same side of the display panel.
Optionally, the first driving circuit and the second driving circuit are respectively located in the non-display areas on two opposite sides of the display panel.
Optionally, the working frequency of the display panel is 1Hz to 30 Hz.
It should be noted that the present application illustrates the inventive concept through the standby screen, and does not mean that the inventive concept of the present application is only applicable to the driving of the standby screen. As long as the picture of the display area comprises two types of pixel columns, wherein the voltage of the data signal of one type of pixel column is a constant voltage signal, the power consumption of the driving circuit can be reduced through the inventive concept of the application.
Fig. 7 is a schematic structural diagram of a display device provided in the present application. As shown in fig. 7, the display device 1 includes any one of the display panels 01 described above. Of course, the display device shown in fig. 7 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
Because the display device provided by the embodiment of the invention comprises the display panel, when the voltages of the data signals required by the pixels in the same column are the same, the required voltage signals can be provided for the pixels in the column through the first driving circuit; when the voltages of the data signals required by the pixels in the same column for displaying are different, the second driving circuit can be arranged to provide the required voltage signals for the pixels in the column. Therefore, the data signal voltage received by the pixel of the display area is not only provided by one driving circuit, and the working power consumption of the driving circuit can be reduced.
The present application also provides a driving method of a display panel, including: the second driving circuit acquires gray scale voltage of a picture to be displayed; the second driving circuit divides the pixel rows into a first type of pixel rows and a second type of pixel rows based on the acquired gray scale voltage; in the display stage: the first driving circuit provides a first data signal to the first type of pixel column; the second driving circuit provides a second data signal to the second type of pixel column; the first data signal is a constant voltage signal.
The driving method provided by the application further comprises initializing the first driving circuit before the second driving circuit divides the pixel columns into the first type of pixel columns and the second type of pixel columns. For the detailed working principle, refer to the above description of the initialization phase td 1.
The driving method provided by the present application, after the second driving circuit divides the pixel columns into the first type of pixel columns and the second type of pixel columns, further includes: the second driving circuit is electrically connected with the first driving circuit of the first pixel column and used for providing a first level signal; the second driving circuit provides a second level signal to the first driving circuit electrically connected to the second type of pixel column. For the specific operation principle, refer to the above description of the picture judgment stage td 2.
On the basis of the above driving method, for the divisional driving shown in fig. 3, the second driving circuit divides the pixel columns into the first type pixel columns and the second type pixel columns based on the grayscale voltages, and further includes: based on the distribution of the second type of pixel columns, the second driving circuit divides the display panel into at least one first type of display area and at least one second type of display area, wherein the first type of display area is formed by the first type of pixel columns, and the second type of display area comprises the second type of pixel columns; in the display stage, the first driving circuit provides a constant voltage signal to the first type display area; the second driving circuit supplies a second data signal to a second type of pixel columns of the second type of display area.
When the second type display area also comprises the first type pixel columns, the first driving circuit provides constant voltage signals for the first type pixel columns of the second type display area in the display stage.
Optionally, the driving method provided by the present application is suitable for a display panel with a working frequency of 1Hz to 30 Hz.
It should be noted that the second driving circuit provided in the present application not only has a data storage module for acquiring data, an analysis module for performing data analysis, an execution module for performing different instructions on different data, but also has a data transmission module for outputting data.
According to the display panel, the display device and the driving method provided by the embodiment of the application, when the voltages of data signals required by the pixels in the same column are the same, a driving circuit for providing a constant voltage signal is arranged to provide the required voltage signal for the pixels in the column; when the voltages of the data signals required by the pixels in the same column for displaying are different, the inventor provides the required voltage signals for the pixels in the column by arranging another driving circuit for providing the data signals. That is, the data signal voltages received by the pixels in the display area are not only provided by one driving circuit, but also some pixel columns having the same data signal voltage can be distinguished, and the constant voltage signal is provided by a specific driving circuit, so that the operating power consumption of one driving circuit can be reduced by such a sharing manner.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.

Claims (18)

1. A display panel includes a display region and a non-display region;
the display area comprises a plurality of pixel columns and a plurality of data lines electrically connected with the pixel columns;
the non-display area includes a first driving circuit and a second driving circuit;
the data line is electrically connected with the first driving circuit; the data line is electrically connected with the second driving circuit;
the plurality of pixel columns comprise a first type of pixel column and a second type of pixel column;
wherein, in a frame scanning period of the display panel, a display phase is included, in which:
the first driving circuit provides a first data signal to the first type of pixel column; the second driving circuit provides a second data signal to the second type of pixel column;
the first data signal is a constant voltage signal.
2. The display panel of claim 1, wherein the one-frame scanning period further comprises a signal processing stage in which:
the second driving circuit provides a first level signal to a first driving circuit electrically connected with the first type of pixel column, and the first level signal is used for controlling the conduction of the first driving circuit;
the second driving circuit provides a second level signal to the first driving circuit electrically connected with the second type pixel column, and the second level signal is used for controlling the cut-off of the first driving circuit.
3. The display panel of claim 2, wherein the one frame scan period includes a front porch stage and a back porch stage, the signal processing stage being temporally located within the front porch stage.
4. The display panel according to claim 3, wherein the display panel is divided into at least one first-type display area and at least one second-type display area, wherein the pixel columns in the first-type display area are first-type pixel columns, and the second-type display area includes the second-type pixel columns;
in the display phase, the display phase is carried out,
the first driving circuit provides the first data signal to the first type display area;
the second driving circuit provides the second data signals to the second type of pixel columns of the second type of display area.
5. The display panel of claim 4, wherein the second type of display area further comprises the first type of pixel columns; in the display phase, the display phase is carried out,
the first driving circuit provides the first data signals to the first type of pixel columns of the second type of display area.
6. The display panel according to claim 4 or 5, wherein the non-display region includes a scan driving circuit;
in the display stage, a first type display time interval and a second type display time interval which are sequentially and alternately arranged in time sequence are included;
in the first type display period, the scanning driving circuit provides scanning signals for the first type display area; in the second type display time interval, the scanning driving circuit provides scanning signals for a second type display area;
the signal processing stage is positioned in the gap between the adjacent first-type display period and the second-type display period.
7. The display panel according to claim 4, wherein the first driver circuit includes:
a first transistor for writing a data signal to the first type of pixel column;
a second transistor for initializing a gate of the first transistor;
a third transistor for writing a gate control signal of the first transistor;
and the fourth transistor is used for controlling the first transistor to receive the data signal.
8. The display panel according to claim 7, wherein the display panel further comprises:
a first voltage signal line, a first gate line, a second gate line, and a third gate line;
a gate of the second transistor is electrically connected with the first gate line, a first pole of the second transistor is electrically connected with the first voltage signal line, and a second pole of the second transistor is electrically connected with the gate of the first transistor;
a gate of the fourth transistor is electrically connected to the second gate line, a first electrode of the fourth transistor is electrically connected to the first voltage signal line, and a second electrode of the fourth transistor is electrically connected to the first electrode of the first transistor;
a grid electrode of the third transistor is electrically connected with a third grid line, a first pole is electrically connected with the grid electrode of the first transistor, and a second pole is electrically connected with the second pole of the first transistor;
the second pole of the first transistor is electrically connected with the data line.
9. The display panel according to claim 8, wherein the first level signal is a level signal which turns on the first transistor, and wherein the second level signal is a level signal which turns on the first transistor.
10. The display panel of claim 1,
the first and second driving circuits are located in the non-display region on the same side of the display panel, or
The first driving circuit and the second driving circuit are respectively positioned in the non-display area on two opposite sides of the display panel.
11. The display panel according to any one of claims 1 to 10, wherein the display panel has an operating frequency of 1Hz to 30 Hz.
12. A display device comprising a display panel as claimed in claims 1-11.
13. A driving method of the display panel according to any one of claims 1 to 11, characterized by comprising:
the second driving circuit acquires gray scale voltage of a picture to be displayed;
the second driving circuit divides the pixel rows into a first type of pixel rows and a second type of pixel rows based on the gray scale voltage;
in the display stage:
the first driving circuit provides a first data signal to the first type of pixel column;
the second driving circuit provides a second data signal to the second type of pixel column;
the first data signal is a constant voltage signal.
14. The driving method of a display panel according to claim 13,
before the second driving circuit divides the pixel columns into the first type of pixel columns and the second type of pixel columns,
the first driving circuit performs initialization.
15. The driving method of a display panel according to claim 14,
after the second driving circuit divides the pixel columns into the first type of pixel columns and the second type of pixel columns,
the second driving circuit provides a first level signal to the first driving circuit which is electrically connected with the first pixel column;
and the second driving circuit is electrically connected with the first driving circuit of the second type of pixel column and provides a second level signal.
16. The driving method of a display panel according to claim 15,
the second driving circuit divides the pixel rows into a first type of pixel rows and a second type of pixel rows based on the gray scale voltages, and includes:
based on the distribution of the second type of pixel columns, the second driving circuit divides the display panel into at least one first type of display area and at least one second type of display area, wherein the first type of display area is formed by the first type of pixel columns, and the second type of display area comprises the second type of pixel columns;
in the display phase, the display phase is carried out,
the first driving circuit provides a constant voltage signal to the first type display area;
the second driving circuit provides the second data signals to the second type of pixel columns of the second type of display area.
17. The driving method of the display panel according to claim 15, wherein the second-type display region further includes first-type pixel columns; in the display phase, the display phase is carried out,
the first driving circuit supplies a constant voltage signal to the first-type pixel columns of the second-type display area.
18. The method for driving a display panel according to claim 13, wherein an operating frequency of the display panel is 1Hz to 30 Hz.
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